Patent Application
20090091576
The present invention pertains generally to systems and methods for displaying video/graphics images. More particularly, the present invention pertains to systems and methods that use a Graphics Processing Unit (GPU) to compose video/graphics images in response to an application program that is managed by a Central Processing Unit (CPU). The present invention is particularly, but not exclusively, useful as a system or method wherein the GPU is not resident with the CPU on a motherboard but, instead, is remotely distanced from the CPU and from the motherboard.
With a typical computer system, the presentation of video/graphics images is done with the intent to sequentially display images of an object from variously different perspectives (e.g. a rotating cube). To do this, a central processing unit (CPU) in the computer executes an application program that performs the required visual manipulations (e.g. rotate the cube). For this purpose, the application program is kept in the form of code in the computer's system memory. In accordance with this application program, pixels (i.e. content) from a frame buffer are organized by the CPU, and are composed by a graphics processing unit (GPU) for presentation on a video monitor. Typically, all of these components (i.e. CPU, GPU, frame buffer and system memory) reside in the computer on a same motherboard. More specifically, the GPU and frame buffer are typically located side-by-side and use a common private bus.
Not surprisingly, a more powerful GPU is capable of composing and manipulating video/graphics images faster and with greater detail than can a less powerful GPU. In addition to its increased power requirements, however, a more powerful GPU will be larger and will generate more heat during its operation than will a less powerful counterpart. These operational factors effectively preclude the use of more powerful GPUs on the smaller computers, such as notebook or laptop computers. Nevertheless, such smaller computers are widely used, and many of them have a memory with their respective frame buffers that is capable of storing the required pixels for quite complicated video/graphics images.
With the above in mind, it is an object of the present invention to provide a system and method for presenting video/graphics images on a monitor wherein a small computer (e.g. notebook or laptop computer) can use any GPU, regardless of the size or power requirements of the GPU. Another object of the present invention is to provide a system and method for presenting video/graphics images on a monitor wherein the system's GPU can be physically and structurally separated from the system's frame buffer. Yet another object of the present invention is to provide a system and method for presenting video/graphics images on a monitor wherein a remotely positioned GPU, and an associated video monitor, can accommodate a plurality of separate computers and their respective memories. Still another object of the present invention is to provide a system and method for presenting video/graphics images on a monitor that is relatively simple to manufacture, is easy to use and is comparatively cost effective.
In accordance with the present invention a system and method for presenting video/graphics images involves a computer architecture that requires two separately identifiable components. One is a control unit that determines how the image is to be presented, and the other is a display module that composes and presents the image. Importantly, the system includes an interlink connection between the control unit and the display module that allows the display module to be remotely located, at an extended distance from the control unit.
The control unit of the present invention includes a central processing unit (CPU), a frame buffer, and a system memory. These components are co-located together, and interconnected to each other on a same motherboard. Further, the system memory contains code that can be used for the execution of an application program. On the other hand, the frame buffer contains pixels for use in the application program. And, the CPU organizes pixels in the frame buffer for execution of the application program. As indicated above, all of these components (i.e. CPU, frame buffer, and system memory) are on the same motherboard. Further, as envisioned for the present invention, these components will most likely reside on a notebook or laptop computer.
Separated from the control unit, and from its motherboard, the display module includes a graphics processing unit (GPU) for composing the video/graphics images. It also includes a video monitor on which the video/graphics images are presented. As envisioned for the present invention, the combined GPU and monitor will be remotely distanced from the control unit. Functionally, although the display module itself (i.e. GPU and monitor) has no memory capability, it is nevertheless operable with a plurality of different control units. Each of these control units will, of course, have their own memory capability. Thus, a single control unit may be operable with a plurality of different display modules. Further, depending on functional requirements, various control units and various display modules may be positioned at a respective number of different locations.
An important aspect of the present invention is an interlink that connects a particular control unit with a particular display module. For purposes of the present invention, this interlink is preferably a high speed, serial bus, such as a Peripheral Component Interface Express (PCIE). It is to be appreciated, however, that the interlink may be a wire connection, a wireless connection, an internet connection or a fiber connection. In any case, the important functional aspect of the present invention is that, when an interlink is used, the GPU need not be resident on the motherboard with components of the control unit. Stated differently, the display module appears to be transparent to the individual control units.
In operation, the CPU can manipulate video/graphics images on the monitor in at least two different ways. For one, the CPU can communicate with the GPU via the frame buffer. For another, the CPU can communicate with the frame buffer, via the GPU. In either case, the GPU manipulates pixels obtained from the frame buffer, while the CPU controls execution of the application program. With this operation, the GPU is effectively able to process images (i.e. rendering, shading, orientation etc.).
The novel features of this invention, as well as the invention itself, both as to its structure and its operation, will be best understood from the accompanying drawings, taken in conjunction with the accompanying description, in which similar reference characters refer to similar parts, and in which:
Referring initially to
In detail,
For purposes of the present invention, the interlink 16 can be of several different types, all well known in the pertinent art. For one embodiment, as shown in
In the operation of the system 10, CPU 24 of control unit 12 coordinates the activities of all the other components. Specifically, to begin an operation, the CPU 24 retrieves code from the system memory 26 for use in executing an application program. The CPU 24 then organizes pixels in the frame buffer 28 for use in the application program, and it executes the application program. For this execution of the application program, the GPU 18 receives organized pixels from the frame buffer 28, via the interlink 16, and presents them as a video/graphics image 22 on the display monitor 20. Manipulation of the image 22 on the monitor 20 can then be controlled as desired by the operator of control unit 12. More specifically, due to the functional capabilities of the dual port 32, the communication between CPU 24 and GPU 18 for manipulation of the image 22 can be done in either of two ways. For one, dual port 32 allows the CPU 24 to communicate directly with the frame buffer 28 for manipulation of the image 22. Alternatively, the CPU 24 can communicate with the GPU 18 via the frame buffer 28. In each case, communications between the CPU 24 and the GPU 18 are accomplished via the interlink 16.
It is important to note that although the GPU 18 can be considered as being functionally on the motherboard 30 (i.e. transparent), structurally it is in a remote location at a distance from the control unit 12 and its motherboard 30. As a practical matter, the distance of separation between the control unit 12 and the GPU 18 may be significant (e.g. thousands of miles).
In overview, there are two modes of communication between the CPU 24 of the control unit 12 and the GPU 18 in the display unit 14. In a first mode, the CPU 24 of the control unit 12 writes the command in a designated space of the frame buffer 28 and then flags the GPU 18 in display unit 14 via the interlink 16 to service the command. The GPU 18 in turn reads the command out of the frame buffer 28 via interlink 16 and consequently reads the pixels from frame buffer 28. The GPU 18 then manipulates the pixels in accordance with the command before displaying the image 22 on the monitor 20.
In the second mode, the CPU 24 of the control unit 12 directly writes the command to the GPU 18 of the display unit 14. The GPU 18 in turn reads the pixels out of the frame buffer 28 via interlink 16 and then manipulates them in accordance with the command before displaying the image 22 on the monitor 20.
While the particular Interface Platform as herein shown and disclosed in detail is fully capable of obtaining the objects and providing the advantages herein before stated, it is to be understood that it is merely illustrative of the presently preferred embodiments of the invention and that no limitations are intended to the details of construction or design herein shown other than as described in the appended claims.
