BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a graph showing a relationship between a phase error and a Q penalty;
FIG. 2A is a diagram showing a structural example of a DQPSK receiver (DQPSK modulator);
FIG. 2B is a diagram showing a relationship between a phase shift and data;
FIG. 2C is a diagram showing FSRs of an A-branch and a B-branch;
FIG. 2D is a table showing a relationship between an intersymbol phase difference Δθ and each of currents (A-branch current and B-branch current) outputted from CDR circuits;
FIG. 3A is an explanatory plan diagram showing an interferometer module and a light reception module;
FIG. 3B is an explanatory side diagram showing the interferometer module and the light reception module shown in FIG. 3A;
FIG. 4 is a plan view showing a physical arrangement example of constituent elements of the interferometer module as shown in FIG. 3A;
FIG. 5 is a view showing an optical path (light beam) of an optical system corresponding to the B-branch which is a representative of the A- and B-branches;
FIG. 6 is a diagram showing a modified example of the structural example shown in FIG. 3B;
FIG. 7A is a graph showing an example of the amount of phase varied by a heater;
FIG. 7B is a graph showing an example of the amount of phase varied by a Peltier element;
FIG. 8 is a graph showing a thermal crosstalk to an adjacent interferometer in a case where a heater temperature is increased while a current applied to the Peltier element is held constant;
FIG. 9 is a graph showing an example of control made by an interferometer control circuit (phase control section); and
FIG. 10 is a graph showing a penalty (Q value) in a case of phase adjustment using only the Peltier element and a penalty in a case of phase adjustment using the Peltier element and a heater.
Patent Application
20070177151
