International Mini-Workshop Series: "An Assessment of Options for a Post-CMOS Information Industry"; April-September 2004; Stresa, Italy, San Francisco, CA, and Brussels, Belgium

Information

  • NSF Award
  • 0432636
Owner
  • Award Id
    0432636
  • Award Effective Date
    6/15/2004 - 20 years ago
  • Award Expiration Date
    5/31/2005 - 19 years ago
  • Award Amount
    $ 40,000.00
  • Award Instrument
    Standard Grant

International Mini-Workshop Series: "An Assessment of Options for a Post-CMOS Information Industry"; April-September 2004; Stresa, Italy, San Francisco, CA, and Brussels, Belgium

By 2016 or earlier the Semiconductor Industry will be nearing the end of CMOS scaling and that continued progress in functionality-cost ratios will require the invention of new information processing technologies. A range of new concepts for devices, fabrication techniques, and system architectures are emerging today under the general heading of nanoelectronics. That may eventually provide the basis for continuing the Moore's Law advances in information technologies that we have experienced for the last three decades.<br/>A wide range of new ideas have been proposed for post-CMOS technologies, such as molecular electronics, carbon nanotube devices etc. Characteristic of any new area, it is difficult to discern which of these concepts has the potential to provide a technological basis for information technologies of the future.<br/><br/>In 2003, the Semiconductor Industry, via the International Technology Roadmap for<br/>Semiconductors (ITRS) process, began to assess the applicability of a wide range of research devices to serve as a basis for continuing historical functionality-cost trends.<br/>Industry specialists conducted these assessments without substantial inputs from the university research community and they indicated that none of the research devices studied for logic applications is a likely candidate to continue the Moore's law cadence for information technology beyond the end of CMOS scaling. This rather bleak assessment, if correct, drives the need for new thinking in device and architecture research. On the other hand, the 2003 ITRS assessment may be the result of the ITRS Emerging Research<br/>Device Technology working Group's (ERD TWG) inadequate comprehension of the performance potential of the proposed new device technologies.<br/><br/>This proposal seeks travel funds for university researchers to attend three mini-workshops with the ITRS Roadmap's ERD Working Group members so that the 2004/2005 version of the ITRS will reflect a consensus view on candidate technologies proposed for Post-CMOS devices.

  • Program Officer
    Rajinder P. Khosla
  • Min Amd Letter Date
    6/2/2004 - 20 years ago
  • Max Amd Letter Date
    6/2/2004 - 20 years ago
  • ARRA Amount

Institutions

  • Name
    Semiconductor Research Corporation
  • City
    Durham
  • State
    NC
  • Country
    United States
  • Address
    1101 Slater Road
  • Postal Code
    277038447
  • Phone Number
    9199419400

Investigators

  • First Name
    Ralph
  • Last Name
    Cavin
  • Email Address
    cavin@src.org
  • Start Date
    6/2/2004 12:00:00 AM

FOA Information

  • Name
    Telecommunications
  • Code
    206000

Program Element

  • Text
    SPECIAL STUDIES AND ANALYSES
  • Code
    1385
  • Text
    ELECT, PHOTONICS, & MAG DEVICE
  • Code
    1517
  • Text
    NANOSCALE: SCIENCE & ENGIN CTR
  • Code
    1675

Program Reference

  • Text
    UNASSIGNED
  • Code
    0
  • Text
    OTHER RESEARCH OR EDUCATION