This document is related to video and image coding and decoding technologies.
Digital video accounts for the largest bandwidth use on the internet and other digital communication networks. As the number of connected user devices capable of receiving and displaying video increases, it is expected that the bandwidth demand for digital video usage will continue to grow.
The disclosed techniques may be used by video or image decoder or encoder embodiments for in which sub-picture based coding or decoding is performed.
In one example aspect a method of video processing is disclosed. The method includes performing a conversion between a picture of a video and a bitstream representation of the video. The picture comprises one or more sub-pictures, and the bitstream representation conforms to a format rule that specifies that a length of a syntax element is equal to Ceil(Log 2(SS)) bits. SS is greater than 0, and the syntax element indicating a horizontal or a vertical position of a top-left corner of a coding tree unit of a sub-picture of the picture.
In another example aspect a method of video processing is disclosed. The method includes performing a conversion between a picture of a video and a bitstream representation of the video, wherein the picture comprises one or more sub-pictures. The bitstream representation conforms to a format rule that specifies that different sub-pictures have different identifiers.
In another example aspect a method of video processing is disclosed. The method includes determining, for a video block in a first video region of a video, whether a position at which a temporal motion vector predictor is determined for a conversion between the video block and a bitstream representation of the current video block using an affine mode is within a second video region; and performing the conversion based on the determining.
In another example aspect, another method of video processing is disclosed. The method includes determining, for a video block in a first video region of a video, whether a position at which an integer sample in a reference picture is fetched for a conversion between the video block and a bitstream representation of the current video block is within a second video region, wherein the reference picture is not used in an interpolation process during the conversion; and performing the conversion based on the determining.
In another example aspect, another method of video processing is disclosed. The method includes determining, for a video block in a first video region of a video, whether a position at which a reconstructed luma sample value is fetched for a conversion between the video block and a bitstream representation of the current video block is within a second video region; and performing the conversion based on the determining.
In another example aspect, another method of video processing is disclosed. The method includes determining, for a video block in a first video region of a video, whether a position at which a check regarding splitting, depth derivation or split flag signaling for the video block is performed during a conversion between the video block and a bitstream representation of the current video block is within a second video region; and performing the conversion based on the determining.
In another example aspect, another method of video processing is disclosed. The method includes performing a conversion between a video comprising one or more video pictures comprising one or more video blocks, and a coded representation of the video, wherein the coded representation complies with a coding syntax requirement that the conversion is not to use sub-picture coding/decoding and a dynamic resolution conversion coding/decoding tool or a reference picture resampling tool within a video unit.
In another example aspect, another method of video processing is disclosed. The method includes performing a conversion between a video comprising one or more video pictures comprising one or more video blocks, and a coded representation of the video, wherein the coded representation complies with a coding syntax requirement that a first syntax element subpic_grid_idx[i][j] is not larger than a second syntax element max_subpics_minus1.
In yet another example aspect, the above-described method may be implemented by a video encoder apparatus that comprises a processor.
In yet another example aspect, the above-described method may be implemented by a video decoder apparatus that comprises a processor.
In yet another example aspect, these methods may be embodied in the form of processor-executable instructions and stored on a computer-readable program medium.
These, and other, aspects are further described in the present document.
The present document provides various techniques that can be used by a decoder of image or video bitstreams to improve the quality of decompressed or decoded digital video or images. For brevity, the term “video” is used herein to include both a sequence of pictures (traditionally called video) and individual images. Furthermore, a video encoder may also implement these techniques during the process of encoding in order to reconstruct decoded frames used for further encoding.
Section headings are used in the present document for ease of understanding and do not limit the embodiments and techniques to the corresponding sections. As such, embodiments from one section can be combined with embodiments from other sections.
This document is related to video coding technologies. Specifically, it is related to palette coding with employing base colors based representation in video coding. It may be applied to the existing video coding standard like High Efficiency Video Coding (HEVC), or the standard (e.g., Versatile Video Coding (VVC)) to be finalized. It may be also applicable to future video coding standards or video codec.
Video coding standards have evolved primarily through the development of the well-known International Telecommunication Union-Telecommunication Standardization Sector (ITU-T) and International Organization for Standardization (ISO)/International Electrotechnical Commission (IEC) standards. The ITU-T produced H.261 and H.263, ISO/IEC produced Moving Picture Experts Group (MPEG)-1 and MPEG-4 Visual, and the two organizations jointly produced the H.262/MPEG-2 Video and H.264/MPEG-4 Advanced Video Coding (AVC) and H.265/HEVC standards [1,2]. Since H.262, the video coding standards are based on the hybrid video coding structure wherein temporal prediction plus transform coding are utilized. To explore the future video coding technologies beyond HEVC, Joint Video Exploration Team (JVET) was founded by Video Coding Experts Group (VCEG) and MPEG jointly in 2015. Since then, many new methods have been adopted by JVET and put into the reference software named Joint Exploration Model (JEM). In April 2018, the Joint Video Expert Team (JVET) between VCEG (Q6/16) and ISO/IEC Joint technical committee (JTC)1 sub-committee (SC)29/working group (WG)11 (MPEG) was created to work on the VVC standard targeting at 50% bitrate reduction compared to HEVC.
In some embodiments, sub-picture-based coding techniques based on flexible tiling approach can be implemented. Summary of the sub-picture-based coding techniques includes the following:
Sequence Parameter Set RBSP Syntax
}
The variables SubPicTop[subpic_grid_idx[i][j]], SubPicLeft[subpic_grid_idx[i][j]], SubPicWidth[subpic_grid_idx [i][j]], SubPicHeight[subpic_grid_idx[i][j]], and NumSubPics are derived as follows:
It is a requirement of bitstream conformance that the following constraints apply:
The list CtbToSubPicIdx[ctbAddrRs] for ctbAddrRs ranging from 0 to PicSizeInCtbsY−1, inclusive, specifying the conversion from a CTB address in picture raster scan to a sub-picture index, is derived as follows:
The variable NumBricksInCurrSlice, which specifies the number of bricks in the current slice, and SliceBrickIdx[i], which specifies the brick index of the i-th brick in the current slice, are derived as follows:
The variables SubPicIdx, SubPicLeftBoundaryPos, SubPicTopBoundaryPos, SubPicRightBoundaryPos, and SubPicBotBoundaryPos are derived as follows:
Derivation Process for Temporal Luma Motion Vector Prediction
Inputs to this Process are:
The variable currCb specifies the current luma coding block at luma location (xCb, yCb).
The variables mvLXCol and availableFlagLXCol are derived as follows:
Otherwise, both components of mvLXCol are set equal to 0 and availableFlagLXCol is set equal to 0.
. . .
Luma Sample Bilinear Interpolation Process
Inputs to this Process are:
Output of this process is a predicted luma sample value predSampleLXL
The variables shift1, shift2, shift3, shift4, offset1, offset2 and offset3 are derived as follows:
shift1=BitDepthY−6 (8-453)
offset1=1<<(shift1−1) (8-454)
shift2=4 (8-455)
offset2=1<<(shift2−1) (8-456)
shift3=10−BitDepthY (8-457)
shift4=BitDepthY−10 (8-458)
offset4=1<<(shift4−1) (8-459)
The variable picW is set equal to pic_width_in_luma_samples and the variable picH is set equal to pic_height_in_luma_samples.
The luma interpolation filter coefficients fbL[p] for each 1/16 fractional sample position p equal to xFracL or yFracL are specified in Table 8-10.
The luma locations in full-sample units (xInti, yInti) are derived as follows for i=0 . . . 1:
. . .
Derivation Process for Subblock-Based Temporal Merging Candidates
Inputs to this Process are:
The availability flag availableFlagSbCol is derived as follows.
. . .
Derivation Process for Subblock-Based Temporal Merging Base Motion Data
Inputs to this Process are:
The variable currPic specifies the current picture.
When availableFlagA1 is equal to TRUE, the following applies:
The location (xColCb, yColCb) of the collocated block inside ColPic is derived as follows.
. . .
Luma Sample Interpolation Filtering Process
Inputs to this Process are:
Output of this process is a predicted luma sample value predSampleLXL
The variables shift1, shift2 and shift3 are derived as follows:
The luma interpolation filter coefficients fL[p] for each 1/16 fractional sample position p equal to xFracL or yFracL are derived as follows:
The luma locations in full-sample units (xInti, yInti) are derived as follows for i=0 . . . 7:
. . .
Chroma Sample Interpolation Process
Inputs to this Process are:
Output of this process is a predicted chroma sample value predSampleLXC
The variables shift1, shift2 and shift3 are derived as follows:
The chroma interpolation filter coefficients fc[p] for each 1/32 fractional sample position p equal to xFracC or yFracC are specified in Table 8-13.
The variable xOffset is set equal to (sps_ref_wraparound_offset_minus1+1)*MinCbSizeY)/SubWidthC.
The chroma locations in full-sample units (xInti, yInti) are derived as follows for i=0 . . . 3:
In some embodiments, an encoder-only temporal filter can be implemented. The filtering is done at the encoder side as a pre-processing step. Source pictures before and after the selected picture to encode are read and a block based motion compensation method relative to the selected picture is applied on those source pictures. Samples in the selected picture are temporally filtered using sample values after motion compensation.
The overall filter strength is set depending on the temporal sub layer of the selected picture as well as the QP. Only pictures at temporal sub layers 0 and 1 are filtered and pictures of layer 0 are filter by a stronger filter than pictures of layer 1. The per sample filter strength is adjusted depending on the difference between the sample value in the selected picture and the co-located samples in motion compensated pictures so that small differences between a motion compensated picture and the selected picture are filtered more strongly than larger differences.
GOP Based Temporal Filter
A temporal filter is introduced directly after reading picture and before encoding. Below are the steps described in more detail.
The overall filter strength, so, is set according to the equation below for RA.
where n is the number of pictures read.
For the LD case, so(n)=0.95 is used.
A hierarchical motion estimation scheme is used and the layers L0, L1 and L2, are illustrated in
First, motion estimation is done for each 16×16 block in L2. The squared difference is calculated for each selected motion vector and the motion vector corresponding to the smallest difference is selected. The selected motion vector is then used as initial value when estimating the motion in L1. Then the same is done for estimating motion in L0. As a final step, subpixel motion is estimated for each 8×8 block by using an interpolation filter on L0.
The VVC test model (VTM) 6-tap interpolation filter can used:
Where Io is the sample value of the original sample, Ir(i) is the intensity of the corresponding sample of motion compensated picture i and wr(i, a) is the weight of motion compensated picture i when the number of available motion compensated pictures is a.
In the luma channel, the weights, wr(i, a), is defined as follows:
Where
For all other cases of i, and a: sr(i, a)=0.3
σl(QP)=3*(QP−10)
ΔI(i)=Ir(i)−Io
For the chroma channels, the weights, wr(i, a), is defined as follows:
Where sc=0.55 and σc=30
In some embodiments, a picture is divided into one or more tile rows and one or more tile columns. A tile is a sequence of CTUs that covers a rectangular region of a picture.
A tile is divided into one or more bricks, each of which consisting of a number of CTU rows within the tile.
A tile that is not partitioned into multiple bricks is also referred to as a brick. However, a brick that is a true subset of a tile is not referred to as a tile.
A slice either contains a number of tiles of a picture or a number of bricks of a tile.
A sub-picture contains one or more slices that collectively cover a rectangular region of a picture.
Two modes of slices are supported, namely the raster-scan slice mode and the rectangular slice mode. In the raster-scan slice mode, a slice contains a sequence of tiles in a tile raster scan of a picture. In the rectangular slice mode, a slice contains a number of bricks of a picture that collectively form a rectangular region of the picture. The bricks within a rectangular slice are in the order of brick raster scan of the slice.
Picture Parameter Set RBSP Syntax
...
...
It is a requirement of bitstream conformance that the value of single_tile_in_pic_flag shall be the same for all PPSs that are referred to by coded pictures within a CVS.
The variable NumTilesInPic is set equal to (num_tile_columns_minus1+1)*(num_tile_rows_minus1+1).
When single_tile_in_pic_flag is equal to 0, NumTilesInPic shall be greater than 1.
The following variables are derived, and, when uniform_tile_spacing_flag is equal to 1, the values of num_tile_columns_minus1 and num_tile_rows_minus1 are inferred, and, for each i ranging from 0 to NumTilesInPic−1, inclusive, when uniform_brick_spacing_flag[i] is equal to 1, the value of num_brick_rows_minus2[i] is inferred, by invoking the CTB raster and brick scanning conversion process as specified in clause 6.5.1:
It is a requirement of bitstream conformance that a slice shall include either a number of complete tiles or only a consecutive sequence of complete bricks of one tile.
The variable TopLeftBrickIdx[i], BottomRightBrickIdx[i], NumBricksInSlice[i] and BricksToSliceMap[j], which specify the brick index of the brick located at the top left corner of the i-th slice, the brick index of the brick located at the bottom right corner of the i-th slice, the number of bricks in the i-th slice and the mapping of bricks to slices, are derived as follows:
General Slice Header Semantics
When present, the value of each of the slice header syntax elements slice_pic_parameter_set_id, non_reference_picture_flag, colour_plane_id, slice_pic_order_cnt_lsb, recovery_poc_cnt, no_output_of_prior_pics_flag, pic_output_flag, and slice_temporal_mvp_enabled_flag shall be the same in all slice headers of a coded picture.
The variable CuQpDeltaVal, specifying the difference between a luma quantization parameter for the coding unit containing cu_qp_delta_abs and its prediction, is set equal to 0. The variables CuQpOffsetCb, CuQpOffsetCr, and CuQpOffsetCbCr, specifying values to be used when determining the respective values of the Qp′Cb, Qp′Cr, and Qp′CbCr quantization parameters for the coding unit containing cu_chroma_qp_offset_flag, are all set equal to 0.
It is a requirement of bitstream conformance that the value of TemporalId of the current picture shall be greater than or equal to the value of TemporalId of the PPS that has pps_pic_parameter_set_id equal to slice_pic_parameter_set_id.
If rect_slice_flag is equal to 0, the following applies:
Otherwise (rect_slice_flag is equal to 1), the following applies:
It is a requirement of bitstream conformance that the following constraints apply:
The variable NumBricksInCurrSlice, which specifies the number of bricks in the current slice, and SliceBrickIdx[i], which specifies the brick index of the i-th brick in the current slice, are derived as follows:
The variables SubPicIdx, SubPicLeftBoundaryPos, SubPicTopBoundaryPos, SubPicRightBoundaryPos, and SubPicBotBoundaryPos are derived as follows:
Sequence Parameter Set RBSP Syntax
Picture Parameter Set RBSP Syntax
Picture Header RBSP Syntax
It is a requirement of bitstream conformance that the following constraints apply:
It is a requirement of bitstream conformance that the value of TemporalId of the picture header shall be greater than or equal to the value of TemporalId of the PPS that has pps_pic_parameter_set_id equal to ph_pic_parameter_set_id.
It is a requirement of bitstream conformance that the value of ph_subpic_id_len_minus1 shall be the same for all picture headers that are referred to by coded pictures in a CVS.
The list SubpicIdList[i] is derived as follows:
General
Inputs to this process are the reconstructed picture prior to deblocking, i.e., the array recPictureL and, when ChromaArrayType is not equal to 0, the arrays recPictureCb and recPictureCr.
Outputs of this process are the modified reconstructed picture after deblocking, i.e., the array recPictureL and, when ChromaArrayType is not equal to 0, the arrays recPictureCb and recPictureCr.
The vertical edges in a picture are filtered first. Then the horizontal edges in a picture are filtered with samples modified by the vertical edge filtering process as input. The vertical and horizontal edges in the CTBs of each CTU are processed separately on a coding unit basis. The vertical edges of the coding blocks in a coding unit are filtered starting with the edge on the left-hand side of the coding blocks proceeding through the edges towards the right-hand side of the coding blocks in their geometrical order. The horizontal edges of the coding blocks in a coding unit are filtered starting with the edge on the top of the coding blocks proceeding through the edges towards the bottom of the coding blocks in their geometrical order.
The deblocking filter process is applied to all coding subblock edges and transform block edges of a picture, except the following types of edges:
. . .
Deblocking Filter Process for One Direction
Inputs to this Process are:
For each coding unit and each coding block per colour component of a coding unit indicated by the colour component index cIdx ranging from firstCompIdx to lastCompIdx, inclusive, with coding block width nCbW, coding block height nCbH and location of top-left sample of the coding block (xCb, yCb), when cIdx is equal to 0, or when cIdx is not equal to 0 and edgeType is equal to EDGE_VER and xCb % 8 is equal 0, or when cIdx is not equal to 0 and edgeType is equal to EDGE_HOR and yCb % 8 is equal to 0, the edges are filtered by the following ordered steps:
Triangular Prediction Mode (TPM) in VVC divides a block into two triangles with different motion information.
History-based Motion vector Prediction (HMVP) in VVC maintains a table of motion information to be used for motion vector prediction. The table is updated after decoding an inter-coded block, but it is not updated if the inter-coded block is TPM-coded.
Geometry partition mode (GEO) is an extension of TPM. With GEO, a block can be divided by a straight-line into two partitions, which may be or may not be triangles.
Adaptive Loop-Filter (ALF) in VVC is applied after a picture has been decoded, to enhance the picture quality.
Virtual Boundary (VB) is adopted in VVC to make ALF friendly to hardware design. With VB, ALF is conducted in an ALF processing unit bounded by two ALF virtual boundaries.
Cross-component ALF (CC-ALF) as filters the chroma samples by referring to the information of luma samples.
The detailed listing below should be considered as examples to explain general concepts. These items should not be interpreted in a narrow way. Furthermore, these items can be combined in any manner. Hereinafter, temporal filter is used to represent filters that require samples in other pictures. Max(x, y) returns the larger one of x and y. Min(x, y) returns the smaller one of x and y.
...
num_slices_in_pic_minus1
bottom_right_brick_idx_length_minus1
bottom_right_brick_idx_delta[i ]
brick_idx_delta_sign_flag[i ]
...
&& slice
_address < NumBricksInPic −1)
num_bricks_in_slice_minus1
...
non_reference_picture_flag
gdr_pic_flag
no_output_of_prior_pics_flag
recovery_poc_cnt
ph_pic_parameter_set_id
...
log2_transform_skip_max_size_minus2
...
...
...
...
In the following embodiments, the newly added texts are bold italicized and the deleted texts are marked by “[[ ]]”.
8.5.5.6 Derivation Process for Constructed Affine Control Point Motion Vector Merging Candidates
Inputs to this Process are:
The fourth (collocated bottom-right) control point motion vector cpMvLXCorner[3], reference index refIdxLXCorner[3], prediction list utilization flag predFlagLXCorner[3] and the availability flag availableFlagCorner[3] with X being 0 and 1 are derived as follows:
8.5.5.6 Derivation Process for Constructed Affine Control Point Motion Vector Merging Candidates
Inputs to this Process are:
The fourth (collocated bottom-right) control point motion vector cpMvLXCorner[3], reference index refIdxLXCorner[3], prediction list utilization flag predFlagLXCorner[3] and the availability flag availableFlagCorner[3] with X being 0 and 1 are derived as follows:
8.5.6.3.3 Luma Integer Sample Fetching Process
Inputs to this Process are:
Output of this process is a predicted luma sample value predSampleLXL
The variable shift is set equal to Max(2, 14−BitDepthY).
The variable picW is set equal to pic_width_in_luma_samples and the variable picH is set equal to pic_height_in_luma_samples.
The luma locations in full-sample units (xInt, yInt) are derived as follows:
The predicted luma sample value predSampleLXL is derived as follows:
predSampleLXL=refPicLXL[xInt][yInt]<<shift3 (8-784)
8.7.5.3 Picture Reconstruction with Luma Dependent Chroma Residual Scaling Process for Chroma Samples
Inputs to this Process are:
Output of this process is a reconstructed chroma picture sample array recSamples.
The variable sizeY is set equal to Min(CtbSizeY, 64).
The reconstructed chroma picture sample recSamples is derived as follows for i=0 . . . nCurrSw−1, j=0 . . . nCurrSh−1:
7.4.3.3 Sequence Parameter Set RBSP Semantics
The variable NumSubPicGridCols is derived as follows:
NumSubPicGridCols=(pic_width_max_in_luma_samples+subpic_grid_col_width_minus1*[[4+3]])/(subpic_grid_col_width_minus1*[[4+3]]) (7-5)
The variables SubPicIdx, SubPicLeftBoundaryPos, SubPicTopBoundaryPos, SubPicRightBoundaryPos, and SubPicBotBoundaryPos are derived as follows:
7.4.3.3 Sequence Parameter Set RBSP Semantics
6.4.2 Allowed Binary Split Process
The variable allowBtSplit is derived as follows:
The variable allowTtSplit is derived as follows:
7.3.8.4 Coding Tree Syntax
)
)))
) ) ? 1 : 0
sps_decoding_parameter_set_id
...
pic_width_max_in_luma_samples
pic_height_max_in_luma_samples
[
[subpics_present_flag
max_subpics_minus1
subpic_grid_col_width_minus1
subpic_grid_row_height_minus1
subpic_treated_as_pic_flag[i ]
loop_filter_across_subpic_enabled_flag[ i ]
...
...
sps_decoding_parameter_set_id
...
pic_width_max_in_luma_samples
pic_height_max_in_luma_samples
[
[
subpics_present_flag
max_subpics_minus1
subpic_grid_col_width_minus1
subpic_grid_row_height_minus1
subpic_treated_as_pic_flag[ i ]
loop_filter_across_subpic_enabled_flag[ i ]
...
log2_ctu_size_minus5
...
...
sps_decoding_parameter_set_id
...
pic_width_max_in_luma_samples
pic_height_max_in_luma_samples
[
[
subpics_present_flag
max_subpics_minus1
subpic_grid_col_width_minus1
subpic_grid_row_height_minus1
subpic_treated_as_pic_flag[ i ]
loop_filter_across_subpic_enabled_flag[ i ]
...
log2_ctu_size_minus5
...
subpic_addr_x_length_minus1
subpic_addr_y_length_minus1
...
sps_decoding_parameter_set_id
...
pic_width_max_in_luma_samples
pic_height_max_in_luma_samples
[
[subpics_present_flag
max_subpics_minus1
subpic_grid_col_width_minus1
subpic_grid_row_height_minus1
subpic_treated_as_pic_flag[ i ]
loop_filter_across_subpic_enabled_flag[ i ]
...
log2_ctu_size_minus5
...
subpic_addr_x_length_minus1
subpic_addr_y_length_minus1
...
NumSubPics=num_subpics_minus2+2.
Deblocking Filter Process
General
Inputs to this process are the reconstructed picture prior to deblocking, i.e., the array recPictureL and, when ChromaArrayType is not equal to 0, the arrays recPictureCb and recPictureCr.
Outputs of this process are the modified reconstructed picture after deblocking, i.e., the array recPictureL and, when ChromaArrayType is not equal to 0, the arrays recPictureCb and recPictureCr.
The vertical edges in a picture are filtered first. Then the horizontal edges in a picture are filtered with samples modified by the vertical edge filtering process as input. The vertical and horizontal edges in the CTBs of each CTU are processed separately on a coding unit basis. The vertical edges of the coding blocks in a coding unit are filtered starting with the edge on the left-hand side of the coding blocks proceeding through the edges towards the right-hand side of the coding blocks in their geometrical order. The horizontal edges of the coding blocks in a coding unit are filtered starting with the edge on the top of the coding blocks proceeding through the edges towards the bottom of the coding blocks in their geometrical order.
The deblocking filter process is applied to all coding subblock edges and transform block edges of a picture, except the following types of edges:
For each coding unit and each coding block per colour component of a coding unit indicated by the colour component index cIdx ranging from firstCompIdx to lastCompIdx, inclusive, with coding block width nCbW, coding block height nCbH and location of top-left sample of the coding block (xCb, yCb), when cIdx is equal to 0, or when cIdx is not equal to 0 and edgeType is equal to EDGE_VER and xCb % 8 is equal 0, or when cIdx is not equal to 0 and edgeType is equal to EDGE_HOR and yCb % 8 is equal to 0, the edges are filtered by the following ordered steps:
. . .
Filtering Process for a Luma Sample Using Short Filters
Inputs to this Process are:
When nDp is greater than 0 and pred_mode_plt_flag of the coding unit that includes the coding block containing the sample p0 is equal to 1, nDp is set equal to 0
When nDq is greater than 0 and pred_mode_plt_flag of the coding unit that includes the coding block containing the sample q0 is equal to 1 nDq is set equal to 0
Filtering Process for a Luma Sample Using Long Filters
Inputs to this Process are:
refMiddle=(p5+p4+p3+p2+2*(p1+p0+q0+q1)+q2+q3+q4+q5+8)>>4 (8-1166)
The variables refP and refQ are derived as follows:
refP=(pmaxFilterLengtP+pmaxFilterLengthP-1+1)>>1 (8-1179)
refQ=(qmaxFilterLengtQ+qmaxFilterLengthQ-1+1)>>1 (8-1171)
The variables fi and tCPDi are defined as follows:
The variables gj and tCQDj are defined as follows:
The filtered sample values pi′ and gj′ with i=0 . . . maxFilterLengthP−1 and j=0 . . . maxFilterLengthQ−1 are derived as follows:
pi′=Clip3(pi−(tC*tCPDi)>>1,pi+(tC*tCPDi)>>1,(refMiddle*fi+refP*(64−fi)+32)>>6) (8-1184)
qj′=Clip3(qj−(tC*tCQDj)>>1,qj+(tC*tCQDj)>>1,(refMiddle*gj+refQ*(64−gj)+32)>>6) (8-1185)
When pred_mode_plt_flag of the coding unit that includes the coding block containing the sample pi is equal to 1, the filtered sample value, pi′ is substituted by the corresponding input sample value pi with i=0 . . . maxFilterLengthP−1.
When pred_mode_plt_flag of the coding unit that includes the coding block containing the sample qi is equal to 1, the filtered sample value, qi′ is substituted by the corresponding input sample value qj with i=0 . . . maxFilterLengthQ−1.
Filtering Process for a Chroma Sample
This process is only invoked when ChromaArrayType is not equal to 0.
Inputs to this Process are:
Outputs of this process are the filtered sample values pi′ and qi′ with i=0 . . . maxFilterLengthCbCr−1.
The filtered sample values pi′ and qi′ with i=0 . . . maxFilterLengthCbCr−1 are derived as follows:
When pred_mode_plt_flag of the coding unit that includes the coding block containing the sample pi is equal to 1, the filtered sample value, pi′ is substituted by the corresponding input sample value pi with i=0 . . . maxFilterLengthCbCr−1.
When pred_mode_plt_flag of the coding unit that includes the coding block containing the sample qi is equal to 1, the filtered sample value, qi′ is substituted by the corresponding input sample value qi with i=0 . . . maxFilterLengthCbCr−1:
The following solutions may be implemented as preferred solutions in some embodiments.
The following solutions may be implemented together with additional techniques described in items listed in the previous section (e.g., item 1).
The following solutions may be implemented together with additional techniques described in items listed in the previous section (e.g., item 2).
The following solutions may be implemented together with additional techniques described in items listed in the previous section (e.g., item 3).
The following solutions may be implemented together with additional techniques described in items listed in the previous section (e.g., item 4).
The following solutions may be implemented together with additional techniques described in items listed in the previous section (e.g., item 8).
The following solutions may be implemented together with additional techniques described in items listed in the previous section (e.g., item 10).
The following solutions may be implemented together with additional techniques described in items listed in the previous section (e.g., item 11).
The following solutions may be implemented together with additional techniques described in items listed in the previous section (e.g., item 12).
The following solutions may be implemented together with additional techniques described in items listed in the previous section (e.g., item 13).
The following solutions may be implemented together with additional techniques described in items listed in the previous section (e.g., item 15).
The following solutions may be implemented together with additional techniques described in items listed in the previous section (e.g., item 10).
The system 800 may include a coding component 804 that may implement the various coding or encoding methods described in the present document. The coding component 804 may reduce the average bitrate of video from the input 802 to the output of the coding component 804 to produce a coded representation of the video. The coding techniques are therefore sometimes called video compression or video transcoding techniques. The output of the coding component 804 may be either stored, or transmitted via a communication connected, as represented by the component 806. The stored or communicated bitstream (or coded) representation of the video received at the input 802 may be used by the component 808 for generating pixel values or displayable video that is sent to a display interface 810. The process of generating user-viewable video from the bitstream representation is sometimes called video decompression. Furthermore, while certain video processing operations are referred to as “coding” operations or tools, it will be appreciated that the coding tools or operations are used at an encoder and corresponding decoding tools or operations that reverse the results of the coding will be performed by a decoder.
Examples of a peripheral bus interface or a display interface may include universal serial bus (USB) or high definition multimedia interface (HDMI) or Displayport, and so on. Examples of storage interfaces include serial advanced technology attachment (SATA), peripheral component interconnect (PCI), integrated drive electronics (IDE) interface, and the like. The techniques described in the present document may be embodied in various electronic devices such as mobile phones, laptops, smartphones or other devices that are capable of performing digital data processing and/or video display.
As shown in
Source device 110 may include a video source 112, a video encoder 114, and an input/output (I/O) interface 116.
Video source 112 may include a source such as a video capture device, an interface to receive video data from a video content provider, and/or a computer graphics system for generating video data, or a combination of such sources. The video data may comprise one or more pictures. Video encoder 114 encodes the video data from video source 112 to generate a bitstream. The bitstream may include a sequence of bits that form a coded representation of the video data. The bitstream may include coded pictures and associated data. The coded picture is a coded representation of a picture. The associated data may include sequence parameter sets, picture parameter sets, and other syntax structures. I/O interface 116 may include a modulator/demodulator (modem) and/or a transmitter. The encoded video data may be transmitted directly to destination device 120 via I/O interface 116 through network 130a. The encoded video data may also be stored onto a storage medium/server 130b for access by destination device 120.
Destination device 120 may include an I/O interface 126, a video decoder 124, and a display device 122.
I/O interface 126 may include a receiver and/or a modem. I/O interface 126 may acquire encoded video data from the source device 110 or the storage medium/server 130b. Video decoder 124 may decode the encoded video data. Display device 122 may display the decoded video data to a user. Display device 122 may be integrated with the destination device 120, or may be external to destination device 120 which be configured to interface with an external display device.
Video encoder 114 and video decoder 124 may operate according to a video compression standard, such as the High Efficiency Video Coding (HEVC) standard, Versatile Video Coding (VVC) standard and other current and/or further standards.
Video encoder 200 may be configured to perform any or all of the techniques of this disclosure. In the example of
The functional components of video encoder 200 may include a partition unit 201, a prediction unit 202 which may include a mode select unit 203, a motion estimation unit 204, a motion compensation unit 205 and an intra prediction unit 206, a residual generation unit 207, a transform unit 208, a quantization unit 209, an inverse quantization unit 210, an inverse transform unit 211, a reconstruction unit 212, a buffer 213, and an entropy encoding unit 214.
In other examples, video encoder 200 may include more, fewer, or different functional components. In an example, prediction unit 202 may include an intra block copy (IBC) unit. The IBC unit may perform prediction in an IBC mode in which at least one reference picture is a picture where the current video block is located.
Furthermore, some components, such as motion estimation unit 204 and motion compensation unit 205 may be highly integrated, but are represented in the example of
Partition unit 201 may partition a picture into one or more video blocks. Video encoder 200 and video decoder 300 may support various video block sizes.
Mode select unit 203 may select one of the coding modes, intra or inter, e.g., based on error results, and provide the resulting intra- or inter-coded block to a residual generation unit 207 to generate residual block data and to a reconstruction unit 212 to reconstruct the encoded block for use as a reference picture. In some example, mode select unit 203 may select a combination of intra and inter prediction (CIIP) mode in which the prediction is based on an inter prediction signal and an intra prediction signal. Mode select unit 203 may also select a resolution for a motion vector (e.g., a sub-pixel or integer pixel precision) for the block in the case of inter-prediction.
To perform inter prediction on a current video block, motion estimation unit 204 may generate motion information for the current video block by comparing one or more reference frames from buffer 213 to the current video block. Motion compensation unit 205 may determine a predicted video block for the current video block based on the motion information and decoded samples of pictures from buffer 213 other than the picture associated with the current video block.
Motion estimation unit 204 and motion compensation unit 205 may perform different operations for a current video block, for example, depending on whether the current video block is in an I slice, a P slice, or a B slice.
In some examples, motion estimation unit 204 may perform uni-directional prediction for the current video block, and motion estimation unit 204 may search reference pictures of list 0 or list 1 for a reference video block for the current video block. Motion estimation unit 204 may then generate a reference index that indicates the reference picture in list 0 or list 1 that contains the reference video block and a motion vector that indicates a spatial displacement between the current video block and the reference video block. Motion estimation unit 204 may output the reference index, a prediction direction indicator, and the motion vector as the motion information of the current video block. Motion compensation unit 205 may generate the predicted video block of the current block based on the reference video block indicated by the motion information of the current video block.
In other examples, motion estimation unit 204 may perform bi-directional prediction for the current video block, motion estimation unit 204 may search the reference pictures in list 0 for a reference video block for the current video block and may also search the reference pictures in list 1 for another reference video block for the current video block. Motion estimation unit 204 may then generate reference indexes that indicate the reference pictures in list 0 and list 1 containing the reference video blocks and motion vectors that indicate spatial displacements between the reference video blocks and the current video block. Motion estimation unit 204 may output the reference indexes and the motion vectors of the current video block as the motion information of the current video block. Motion compensation unit 205 may generate the predicted video block of the current video block based on the reference video blocks indicated by the motion information of the current video block.
In some examples, motion estimation unit 204 may output a full set of motion information for decoding processing of a decoder.
In some examples, motion estimation unit 204 may do not output a full set of motion information for the current video. Rather, motion estimation unit 204 may signal the motion information of the current video block with reference to the motion information of another video block. For example, motion estimation unit 204 may determine that the motion information of the current video block is sufficiently similar to the motion information of a neighboring video block.
In one example, motion estimation unit 204 may indicate, in a syntax structure associated with the current video block, a value that indicates to the video decoder 300 that the current video block has the same motion information as the another video block.
In another example, motion estimation unit 204 may identify, in a syntax structure associated with the current video block, another video block and a motion vector difference (MVD). The motion vector difference indicates a difference between the motion vector of the current video block and the motion vector of the indicated video block. The video decoder 300 may use the motion vector of the indicated video block and the motion vector difference to determine the motion vector of the current video block.
As discussed above, video encoder 200 may predictively signal the motion vector. Two examples of predictive signaling techniques that may be implemented by video encoder 200 include advanced motion vector prediction (AMVP) and merge mode signaling.
Intra prediction unit 206 may perform intra prediction on the current video block. When intra prediction unit 206 performs intra prediction on the current video block, intra prediction unit 206 may generate prediction data for the current video block based on decoded samples of other video blocks in the same picture. The prediction data for the current video block may include a predicted video block and various syntax elements.
Residual generation unit 207 may generate residual data for the current video block by subtracting (e.g., indicated by the minus sign) the predicted video block(s) of the current video block from the current video block. The residual data of the current video block may include residual video blocks that correspond to different sample components of the samples in the current video block.
In other examples, there may be no residual data for the current video block for the current video block, for example in a skip mode, and residual generation unit 207 may not perform the subtracting operation.
Transform processing unit 208 may generate one or more transform coefficient video blocks for the current video block by applying one or more transforms to a residual video block associated with the current video block.
After transform processing unit 208 generates a transform coefficient video block associated with the current video block, quantization unit 209 may quantize the transform coefficient video block associated with the current video block based on one or more quantization parameter (QP) values associated with the current video block.
Inverse quantization unit 210 and inverse transform unit 211 may apply inverse quantization and inverse transforms to the transform coefficient video block, respectively, to reconstruct a residual video block from the transform coefficient video block. Reconstruction unit 212 may add the reconstructed residual video block to corresponding samples from one or more predicted video blocks generated by the prediction unit 202 to produce a reconstructed video block associated with the current block for storage in the buffer 213.
After reconstruction unit 212 reconstructs the video block, loop filtering operation may be performed reduce video blocking artifacts in the video block.
Entropy encoding unit 214 may receive data from other functional components of the video encoder 200. When entropy encoding unit 214 receives the data, entropy encoding unit 214 may perform one or more entropy encoding operations to generate entropy encoded data and output a bitstream that includes the entropy encoded data.
The video decoder 300 may be configured to perform any or all of the techniques of this disclosure. In the example of
In the example of
Entropy decoding unit 301 may retrieve an encoded bitstream. The encoded bitstream may include entropy coded video data (e.g., encoded blocks of video data). Entropy decoding unit 301 may decode the entropy coded video data, and from the entropy decoded video data, motion compensation unit 302 may determine motion information including motion vectors, motion vector precision, reference picture list indexes, and other motion information. Motion compensation unit 302 may, for example, determine such information by performing the AMVP and merge mode.
Motion compensation unit 302 may produce motion compensated blocks, possibly performing interpolation based on interpolation filters. Identifiers for interpolation filters to be used with sub-pixel precision may be included in the syntax elements.
Motion compensation unit 302 may use interpolation filters as used by video encoder 20 during encoding of the video block to calculate interpolated values for sub-integer pixels of a reference block. Motion compensation unit 302 may determine the interpolation filters used by video encoder 200 according to received syntax information and use the interpolation filters to produce predictive blocks.
Motion compensation unit 302 may use some of the syntax information to determine sizes of blocks used to encode frame(s) and/or slice(s) of the encoded video sequence, partition information that describes how each macroblock of a picture of the encoded video sequence is partitioned, modes indicating how each partition is encoded, one or more reference frames (and reference frame lists) for each inter-encoded block, and other information to decode the encoded video sequence.
Intra prediction unit 303 may use intra prediction modes for example received in the bitstream to form a prediction block from spatially adjacent blocks. Inverse quantization unit 304 inverse quantizes, i.e., de-quantizes, the quantized video block coefficients provided in the bitstream and decoded by entropy decoding unit 301. Inverse transform unit 305 applies an inverse transform.
Reconstruction unit 306 may sum the residual blocks with the corresponding prediction blocks generated by motion compensation unit 302 or intra-prediction unit 303 to form decoded blocks. If desired, a deblocking filter may also be applied to filter the decoded blocks in order to remove blockiness artifacts. The decoded video blocks are then stored in buffer 307, which provides reference blocks for subsequent motion compensation/intra prediction and also produces decoded video for presentation on a display device.
In some embodiments, the format rule further specifies that a default value of a length of a second syntax element is equal to Ceil(Log 2(SS))−P, where SS is greater than 0. The second syntax element indicating a default width or a default height of a sub-picture of the picture. In some embodiments, a maximum picture width in luma samples is represented as pic_width_max_in_luma_samples and a dimension of a coding tree block is represented as CtbSizeY. SS is equal to (pic_width_max_in_luma_samples+RR)/CtbSizeY in case the syntax element specifies the horizontal position of the top-left corner of the coding tree unit or the default width of the sub-picture, RR being a non-zero integer. In some embodiments, a maximum picture height in luma samples is represented as pic_height_max_in_luma_samples and a dimension of a coding tree block is represented as CtbSizeY. SS is equal to (pic_height_max_in_luma_samples+RR)/CtbSizeY in case the syntax element specifies the vertical position of the top-left corner of the coding tree unit or the default height of the sub-picture, RR being a non-zero integer. In some embodiments, RR=CtbSizeY−1.
In some embodiments, the format rule specifies that identifiers of one or more sub-pictures are included at a video unit level, the video unit comprising a sequence parameter set, a picture parameter set, or a picture header. In some embodiments, a first syntax flag at the sequence parameter set indicates whether signaling of the identifiers of the one or more sub-pictures is present at the sequence parameter set level, a second syntax flag at the picture parameter set indicates whether signaling of the identifiers of the one or more sub-pictures is present at the picture parameter set level, and a third syntax flag at the picture header indicates whether signaling of the identifiers of the one or more sub-pictures is present at the picture header level. At least one of the first syntax flag, the second syntax flag, or the third syntax flag is equal to 1. In some embodiments, signaling of the identifiers of the one or more sub-pictures is omitted at the picture header level in case the first syntax flag indicates that signaling of the identifiers of the one or more sub-pictures is present at the sequence parameter set level.
In some embodiments, the format rule specifies that identifiers of one or more sub-pictures are included in a list of sub-picture identifiers. In some embodiments, the identifier of a first sub-picture in the list is denoted as SubpicIdList[i] and the identifier of a second sub-picture is denoted as SubpicIdList[j], where j=i−P. The format rule specifies that a difference D[i] between SubpicIdList[i] and SubpicIdList[j] is indicated in the bitstream representation. In some embodiments, P is equal to 1. In some embodiments, i>P. In some embodiments, D[i] is greater than 0. In some embodiments, D[i]−1 is included in the bitstream representation.
In some embodiments, the list of sub-picture identifiers is determined based on an order that the sequence parameter set is considered first, the picture parameter set is considered next, and the picture header is considered last. In some embodiments, the list of sub-picture identifiers is determined based on an order that the picture head is considered first, the picture parameter set is considered next, and the sequence parameter set is considered last.
In some embodiments, the format rule specifies that, in case identifiers of one or more sub-pictures are omitted at one or more video unit levels, default values are assigned to the identifiers in a list of sub-picture identifiers. The one or more video units comprise at least a sequence parameter set, a picture parameter set, or a picture header. In some embodiments, an identifier of a sub-picture in the list is denoted as SubpicIdList[i], and a default value for SubpicIdList[i] is i+P, P being an offset value.
In some embodiments, a first syntax flag indicates whether the loop filtering process is allowed to access samples across boundaries for the first side of the edge and a second syntax flag indicates whether the loop filtering process is allowed to access samples across boundaries for the second side of the edge. The edge is not filtered in case at least one of the first syntax flag or the second syntax flag indicates that the loop filtering process is disallowed. In some embodiments, the first syntax flag indicates that the loop filtering process is allowed to access samples across boundaries for the first side of the edge, and the edge is not filtered due to the second syntax flag indicating that the loop filtering process is disallowed to access samples across boundaries for the second side of the edge.
In some embodiments, the first side of the edge is filtered and whether the second side of the edge is filtered are determined separately from each other. In some embodiments, samples on the first side of the edge are filtered due to the first syntax flag being 1. In some embodiments, samples on the second side of the edge are filtered due to the second syntax flag being 1. In some embodiments, the first side of the edge is in the first sub-picture, and the second side of the edge is in the second sub-picture.
In some embodiments, the syntax element is included in a sequence parameter set or a picture header. In some embodiments, the syntax element comprises log 2_transform_skip_max_size_minus2. In some embodiments, the syntax flag in the sequence parameter set comprises sps_transform_skip_enabled_flag.
In some embodiments, the history-based motion vector prediction table is not updated in case the current block is coded using the geometry partition mode. In some embodiments, the history-based motion vector prediction table is updated in case the current block is coded using the geometry partition mode. In some embodiments, the history-based motion vector prediction table is updated using motion information of one prediction of the current block. In some embodiments, the history-based motion vector prediction table is updated using motion information of multiple predictions of the current block.
In some embodiments, the luma samples that are located outside of the current processing unit are padded, and the padded luma samples are used for filtering the chroma samples of the current processing unit.
In some embodiments, the conversion generates the video from the bitstream representation. In some embodiments, the conversion generates the bitstream representation from the video.
Some embodiments of the disclosed technology include making a decision or determination to enable a video processing tool or mode. In an example, when the video processing tool or mode is enabled, the encoder will use or implement the tool or mode in the processing of a block of video, but may not necessarily modify the resulting bitstream based on the usage of the tool or mode. That is, a conversion from the block of video to the bitstream representation of the video will use the video processing tool or mode when it is enabled based on the decision or determination. In another example, when the video processing tool or mode is enabled, the decoder will process the bitstream with the knowledge that the bitstream has been modified based on the video processing tool or mode. That is, a conversion from the bitstream representation of the video to the block of video will be performed using the video processing tool or mode that was enabled based on the decision or determination.
Some embodiments of the disclosed technology include making a decision or determination to disable a video processing tool or mode. In an example, when the video processing tool or mode is disabled, the encoder will not use the tool or mode in the conversion of the block of video to the bitstream representation of the video. In another example, when the video processing tool or mode is disabled, the decoder will process the bitstream with the knowledge that the bitstream has not been modified using the video processing tool or mode that was enabled based on the decision or determination.
The disclosed and other solutions, examples, embodiments, modules and the functional operations described in this document can be implemented in digital electronic circuitry, or in computer software, firmware, or hardware, including the structures disclosed in this document and their structural equivalents, or in combinations of one or more of them. The disclosed and other embodiments can be implemented as one or more computer program products, e.g., one or more modules of computer program instructions encoded on a computer readable medium for execution by, or to control the operation of, data processing apparatus. The computer readable medium can be a machine-readable storage device, a machine-readable storage substrate, a memory device, a composition of matter effecting a machine-readable propagated signal, or a combination of one or more of them. The term “data processing apparatus” encompasses all apparatus, devices, and machines for processing data, including by way of example a programmable processor, a computer, or multiple processors or computers. The apparatus can include, in addition to hardware, code that creates an execution environment for the computer program in question, e.g., code that constitutes processor firmware, a protocol stack, a database management system, an operating system, or a combination of one or more of them. A propagated signal is an artificially generated signal, e.g., a machine-generated electrical, optical, or electromagnetic signal, that is generated to encode information for transmission to suitable receiver apparatus.
A computer program (also known as a program, software, software application, script, or code) can be written in any form of programming language, including compiled or interpreted languages, and it can be deployed in any form, including as a stand-alone program or as a module, component, subroutine, or other unit suitable for use in a computing environment. A computer program does not necessarily correspond to a file in a file system. A program can be stored in a portion of a file that holds other programs or data (e.g., one or more scripts stored in a markup language document), in a single file dedicated to the program in question, or in multiple coordinated files (e.g., files that store one or more modules, sub programs, or portions of code). A computer program can be deployed to be executed on one computer or on multiple computers that are located at one site or distributed across multiple sites and interconnected by a communication network.
The processes and logic flows described in this document can be performed by one or more programmable processors executing one or more computer programs to perform functions by operating on input data and generating output. The processes and logic flows can also be performed by, and apparatus can also be implemented as, special purpose logic circuitry, e.g., an field programmable gate array (FPGA) or an application specific integrated circuit (ASIC).
Processors suitable for the execution of a computer program include, by way of example, both general and special purpose microprocessors, and any one or more processors of any kind of digital computer. Generally, a processor will receive instructions and data from a read only memory or a random-access memory or both. The essential elements of a computer are a processor for performing instructions and one or more memory devices for storing instructions and data. Generally, a computer will also include, or be operatively coupled to receive data from or transfer data to, or both, one or more mass storage devices for storing data, e.g., magnetic, magneto optical disks, or optical disks. However, a computer need not have such devices. Computer readable media suitable for storing computer program instructions and data include all forms of non-volatile memory, media and memory devices, including by way of example semiconductor memory devices, e.g., erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), and flash memory devices; magnetic disks, e.g., internal hard disks or removable disks; magneto optical disks; and compact disc, read-only memory (CD ROM) and digital versatile disc read-only memory (DVD-ROM) disks. The processor and the memory can be supplemented by, or incorporated in, special purpose logic circuitry.
While this patent document contains many specifics, these should not be construed as limitations on the scope of any subject matter or of what may be claimed, but rather as descriptions of features that may be specific to particular embodiments of particular techniques. Certain features that are described in this patent document in the context of separate embodiments can also be implemented in combination in a single embodiment. Conversely, various features that are described in the context of a single embodiment can also be implemented in multiple embodiments separately or in any suitable subcombination. Moreover, although features may be described above as acting in certain combinations and even initially claimed as such, one or more features from a claimed combination can in some cases be excised from the combination, and the claimed combination may be directed to a subcombination or variation of a subcombination.
Similarly, while operations are depicted in the drawings in a particular order, this should not be understood as requiring that such operations be performed in the particular order shown or in sequential order, or that all illustrated operations be performed, to achieve desirable results. Moreover, the separation of various system components in the embodiments described in this patent document should not be understood as requiring such separation in all embodiments.
Only a few implementations and examples are described and other implementations, enhancements and variations can be made based on what is described and illustrated in this patent document.
Number | Date | Country | Kind |
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PCT/CN2019/111807 | Oct 2019 | WO | international |
This application is a continuation of U.S. application Ser. No. 17/723,175, filed on Apr. 18, 2022, which is a continuation of International Patent Application No. PCT/CN2020/121768, filed on Oct. 19, 2020, which claims the priority to and benefits of International Patent Application No. PCT/CN2019/111807, filed on Oct. 18, 2019. The entire disclosure of the aforementioned applications is incorporated by reference as part of the disclosure of this application.
Number | Name | Date | Kind |
---|---|---|---|
6047112 | Wise | Apr 2000 | A |
8988531 | Zhou | Mar 2015 | B2 |
9525861 | Zhang | Dec 2016 | B2 |
9743066 | Zhang | Aug 2017 | B2 |
9912966 | Hannuksela | Mar 2018 | B2 |
9924168 | Zhang | Mar 2018 | B2 |
10057594 | Xiu | Aug 2018 | B2 |
10097846 | Deshpande | Oct 2018 | B2 |
10165252 | An | Dec 2018 | B2 |
10200709 | Chen | Feb 2019 | B2 |
10205968 | Liu | Feb 2019 | B2 |
10455231 | Xu | Oct 2019 | B2 |
10483493 | Sargent | Nov 2019 | B2 |
10523964 | Chuang | Dec 2019 | B2 |
10523967 | Lee | Dec 2019 | B2 |
10587859 | An | Mar 2020 | B2 |
10757417 | Zhang | Aug 2020 | B2 |
10798385 | Lee | Oct 2020 | B2 |
10805639 | Lee | Oct 2020 | B2 |
10819891 | Wang | Oct 2020 | B2 |
10841609 | Liu | Nov 2020 | B1 |
10880547 | Xu | Dec 2020 | B2 |
10904565 | Chuang | Jan 2021 | B2 |
11095898 | Lim | Aug 2021 | B2 |
11095917 | Zhang | Aug 2021 | B2 |
11109061 | Chen | Aug 2021 | B2 |
11128884 | Liu | Sep 2021 | B2 |
11146810 | Chen | Oct 2021 | B2 |
11212523 | Chiu | Dec 2021 | B2 |
11343529 | Zhang | May 2022 | B2 |
11470309 | Zhang | Oct 2022 | B2 |
11496733 | Zhang | Nov 2022 | B2 |
11523108 | Zhang | Dec 2022 | B2 |
11523109 | Li | Dec 2022 | B2 |
11533513 | Zhang | Dec 2022 | B2 |
11539950 | Zhang | Dec 2022 | B2 |
11546593 | Zhang | Jan 2023 | B2 |
11553177 | Zhang | Jan 2023 | B2 |
11627313 | Zhang | Apr 2023 | B2 |
20040008766 | Wang | Jan 2004 | A1 |
20040177383 | Martinolich | Sep 2004 | A1 |
20050019006 | Suh | Jan 2005 | A1 |
20080204472 | Maertens | Aug 2008 | A1 |
20080267297 | Sampedro | Oct 2008 | A1 |
20080273597 | Kovalenko | Nov 2008 | A1 |
20100086052 | Park | Apr 2010 | A1 |
20120294353 | Fu | Nov 2012 | A1 |
20130089145 | Guo | Apr 2013 | A1 |
20130101018 | Chong | Apr 2013 | A1 |
20130101035 | Wang | Apr 2013 | A1 |
20130182755 | Chen | Jul 2013 | A1 |
20130182774 | Wang | Jul 2013 | A1 |
20130202051 | Zhou | Aug 2013 | A1 |
20130266075 | Wang | Oct 2013 | A1 |
20130294524 | Van der Auwera | Nov 2013 | A1 |
20130322531 | Chen | Dec 2013 | A1 |
20130336406 | Zhang | Dec 2013 | A1 |
20140003492 | Chen | Jan 2014 | A1 |
20140003504 | Ugur | Jan 2014 | A1 |
20140003535 | Haque | Jan 2014 | A1 |
20140185682 | Chen | Jul 2014 | A1 |
20140192892 | Van der Auwera | Jul 2014 | A1 |
20140198844 | Hsu | Jul 2014 | A1 |
20140218473 | Hannuksela | Aug 2014 | A1 |
20140301441 | Wang | Oct 2014 | A1 |
20140301476 | Deshpande | Oct 2014 | A1 |
20150010050 | Chen | Jan 2015 | A1 |
20150010091 | Hsu | Jan 2015 | A1 |
20150103924 | Misra | Apr 2015 | A1 |
20150195577 | Hannuksela | Jul 2015 | A1 |
20150215631 | Zhou | Jul 2015 | A1 |
20150271515 | Pang | Sep 2015 | A1 |
20150341655 | Joshi | Nov 2015 | A1 |
20150341664 | Zhang | Nov 2015 | A1 |
20160100189 | Pang | Apr 2016 | A1 |
20160100196 | Wu | Apr 2016 | A1 |
20160105690 | Denoual | Apr 2016 | A1 |
20160165248 | Lainema | Jun 2016 | A1 |
20160173887 | Deshpande | Jun 2016 | A1 |
20160219278 | Chen | Jul 2016 | A1 |
20160234522 | Lu | Aug 2016 | A1 |
20160316215 | Minoo | Oct 2016 | A1 |
20160337661 | Pang | Nov 2016 | A1 |
20160381385 | Ugur | Dec 2016 | A1 |
20170006302 | Lee | Jan 2017 | A1 |
20170006304 | Miyoshi | Jan 2017 | A1 |
20170064339 | Van der Auwera | Mar 2017 | A1 |
20170237999 | Hendry | Aug 2017 | A1 |
20170272758 | Lin | Sep 2017 | A1 |
20170289566 | He | Oct 2017 | A1 |
20170295369 | Nakagami | Oct 2017 | A1 |
20170302951 | Joshi | Oct 2017 | A1 |
20170332095 | Zou | Nov 2017 | A1 |
20180048909 | Liu | Feb 2018 | A1 |
20180091829 | Liu | Mar 2018 | A1 |
20180098063 | Chen | Apr 2018 | A1 |
20180098090 | Lin | Apr 2018 | A1 |
20180184083 | Panusopone | Jun 2018 | A1 |
20180192072 | Chen | Jul 2018 | A1 |
20180199057 | Chuang | Jul 2018 | A1 |
20180270500 | Li | Sep 2018 | A1 |
20180310017 | Chen | Oct 2018 | A1 |
20180343463 | Xiu | Nov 2018 | A1 |
20180376126 | Hannuksela | Dec 2018 | A1 |
20190058884 | Zhou | Feb 2019 | A1 |
20190058896 | Huang | Feb 2019 | A1 |
20190082191 | Chuang | Mar 2019 | A1 |
20190104319 | Zhang | Apr 2019 | A1 |
20190110064 | Zhang | Apr 2019 | A1 |
20190116376 | Chen | Apr 2019 | A1 |
20190138889 | Jiang | May 2019 | A1 |
20190149838 | Zhang | May 2019 | A1 |
20190158865 | Park | May 2019 | A1 |
20190208234 | Van Brandenburg | Jul 2019 | A1 |
20190246143 | Zhang | Aug 2019 | A1 |
20190273937 | Yu | Sep 2019 | A1 |
20200112733 | Li | Apr 2020 | A1 |
20200221117 | Liu | Jul 2020 | A1 |
20200221122 | Ye | Jul 2020 | A1 |
20200228827 | Hannuksela | Jul 2020 | A1 |
20200252619 | Zhang | Aug 2020 | A1 |
20200296405 | Huang | Sep 2020 | A1 |
20200304805 | Li | Sep 2020 | A1 |
20200329246 | Yu | Oct 2020 | A1 |
20200382795 | Zhang | Dec 2020 | A1 |
20200396453 | Zhang | Dec 2020 | A1 |
20210029351 | Zhang | Jan 2021 | A1 |
20210029362 | Liu | Jan 2021 | A1 |
20210029378 | He | Jan 2021 | A1 |
20210044818 | Furht | Feb 2021 | A1 |
20210044838 | Chen | Feb 2021 | A1 |
20210058637 | Zhang | Feb 2021 | A1 |
20210076029 | Han | Mar 2021 | A1 |
20210076050 | Zhang | Mar 2021 | A1 |
20210084295 | Chen | Mar 2021 | A1 |
20210084340 | Li | Mar 2021 | A1 |
20210092393 | Chao | Mar 2021 | A1 |
20210136363 | Jang | May 2021 | A1 |
20210136407 | Aono | May 2021 | A1 |
20210136422 | Huang | May 2021 | A1 |
20210185347 | Liu | Jun 2021 | A1 |
20210195177 | Zhang | Jun 2021 | A1 |
20210211707 | Liu | Jul 2021 | A1 |
20210211713 | Zhang | Jul 2021 | A1 |
20210211714 | Zhang | Jul 2021 | A1 |
20210219001 | Jang | Jul 2021 | A1 |
20210227250 | Liu | Jul 2021 | A1 |
20210235109 | Liu | Jul 2021 | A1 |
20210243467 | Zhang | Aug 2021 | A1 |
20210243468 | Zhang | Aug 2021 | A1 |
20210266530 | Liu | Aug 2021 | A1 |
20210266560 | Jang | Aug 2021 | A1 |
20210266577 | Zhang | Aug 2021 | A1 |
20210266584 | Zhang | Aug 2021 | A1 |
20210266585 | Liu | Aug 2021 | A1 |
20210266591 | Zhang | Aug 2021 | A1 |
20210274208 | Zhang | Sep 2021 | A1 |
20210274209 | He | Sep 2021 | A1 |
20210274213 | Xiu | Sep 2021 | A1 |
20210281865 | Liu | Sep 2021 | A1 |
20210281875 | Liu | Sep 2021 | A1 |
20210289209 | Lee | Sep 2021 | A1 |
20210337184 | Meng | Oct 2021 | A1 |
20210337228 | Wang | Oct 2021 | A1 |
20210352302 | Zhang | Nov 2021 | A1 |
20210352315 | Zhang | Nov 2021 | A1 |
20210368198 | Zhang | Nov 2021 | A1 |
20210368199 | Zhang | Nov 2021 | A1 |
20210368203 | Zhang | Nov 2021 | A1 |
20210385481 | Liu | Dec 2021 | A1 |
20210385482 | Liu | Dec 2021 | A1 |
20210392367 | Zhang | Dec 2021 | A1 |
20210409730 | Wang | Dec 2021 | A1 |
20220007048 | He | Jan 2022 | A1 |
20220014735 | Chen | Jan 2022 | A1 |
20220053207 | Deshpande | Feb 2022 | A1 |
20220060695 | Zhang | Feb 2022 | A1 |
20220060696 | Zhang | Feb 2022 | A1 |
20220060718 | Zhang | Feb 2022 | A1 |
20220070442 | Jang | Mar 2022 | A1 |
20220094909 | Hannuksela | Mar 2022 | A1 |
20220132148 | Wang | Apr 2022 | A1 |
20220159246 | Zhang | May 2022 | A1 |
20220166971 | Zhang | May 2022 | A1 |
20220166985 | Zhang | May 2022 | A1 |
20220174322 | Zhang | Jun 2022 | A1 |
20220217342 | Hannuksela | Jul 2022 | A1 |
20220239912 | Zhang | Jul 2022 | A1 |
20220239926 | Jhu | Jul 2022 | A1 |
20220248007 | Misra | Aug 2022 | A1 |
20220256148 | Zhang | Aug 2022 | A1 |
20220256195 | Zhang | Aug 2022 | A1 |
20220272332 | Lai | Aug 2022 | A1 |
20220272378 | Samuelsson | Aug 2022 | A1 |
20220303571 | Zhang | Sep 2022 | A1 |
20220394301 | Deshpande | Dec 2022 | A1 |
Number | Date | Country |
---|---|---|
2016273973 | Jul 2018 | AU |
1593065 | Mar 2005 | CN |
1609957 | Apr 2005 | CN |
1750659 | Mar 2006 | CN |
101668219 | Mar 2010 | CN |
101990103 | Mar 2011 | CN |
103202016 | Jul 2013 | CN |
103891292 | Jun 2014 | CN |
103891293 | Jun 2014 | CN |
103975596 | Aug 2014 | CN |
104041033 | Sep 2014 | CN |
104054347 | Sep 2014 | CN |
104641648 | May 2015 | CN |
104702963 | Jun 2015 | CN |
104756495 | Jul 2015 | CN |
104823449 | Aug 2015 | CN |
104885464 | Sep 2015 | CN |
105009587 | Oct 2015 | CN |
105027567 | Nov 2015 | CN |
105074819 | Nov 2015 | CN |
105144720 | Dec 2015 | CN |
105393536 | Mar 2016 | CN |
105531999 | Apr 2016 | CN |
105556975 | May 2016 | CN |
105684448 | Jun 2016 | CN |
106165419 | Nov 2016 | CN |
106303543 | Jan 2017 | CN |
106464893 | Feb 2017 | CN |
106537915 | Mar 2017 | CN |
106664424 | May 2017 | CN |
106797229 | May 2017 | CN |
106797476 | May 2017 | CN |
107105295 | Aug 2017 | CN |
107211156 | Sep 2017 | CN |
107801039 | Mar 2018 | CN |
107852490 | Mar 2018 | CN |
108028929 | May 2018 | CN |
108432250 | Aug 2018 | CN |
108781284 | Nov 2018 | CN |
108781294 | Nov 2018 | CN |
108965871 | Dec 2018 | CN |
109076214 | Dec 2018 | CN |
109076216 | Dec 2018 | CN |
109076218 | Dec 2018 | CN |
109076236 | Dec 2018 | CN |
109155855 | Jan 2019 | CN |
109600611 | Apr 2019 | CN |
109691102 | Apr 2019 | CN |
109792531 | May 2019 | CN |
109792533 | May 2019 | CN |
109996072 | Jul 2019 | CN |
110097889 | Aug 2019 | CN |
110140355 | Aug 2019 | CN |
110662036 | Jan 2020 | CN |
110677678 | Jan 2020 | CN |
114208166 | Mar 2022 | CN |
114631321 | Jun 2022 | CN |
1672930 | Nov 2010 | EP |
3468190 | Apr 2019 | EP |
3942823 | Jan 2022 | EP |
201815444 | Nov 2018 | GB |
201902829 | Apr 2019 | GB |
201911952 | Oct 2019 | GB |
2015015575 | Jan 2015 | JP |
2017520162 | Jul 2017 | JP |
6280679 | Feb 2018 | JP |
2020017970 | Jan 2020 | JP |
20140056342 | May 2014 | KR |
1020150057591 | May 2015 | KR |
20170018819 | Feb 2017 | KR |
20180128955 | Dec 2018 | KR |
20180129584 | Dec 2018 | KR |
20200126813 | Nov 2020 | KR |
2686559 | Apr 2019 | RU |
2820844 | Jun 2024 | RU |
2014106692 | Jul 2014 | WO |
2015008477 | Jan 2015 | WO |
2015008479 | Jan 2015 | WO |
2015011339 | Jan 2015 | WO |
2015038877 | Mar 2015 | WO |
2015056941 | Apr 2015 | WO |
2015142556 | Sep 2015 | WO |
2016100424 | Jun 2016 | WO |
2016120468 | Aug 2016 | WO |
2016127889 | Aug 2016 | WO |
2017083784 | May 2017 | WO |
2017137444 | Aug 2017 | WO |
2017157259 | Sep 2017 | WO |
2018099269 | Jun 2018 | WO |
2018113658 | Jun 2018 | WO |
2019008174 | Jan 2019 | WO |
2019010156 | Jan 2019 | WO |
2019073112 | Apr 2019 | WO |
2019078169 | Apr 2019 | WO |
2019132577 | Jul 2019 | WO |
2019145262 | Aug 2019 | WO |
2019194507 | Oct 2019 | WO |
2019194568 | Oct 2019 | WO |
2019222060 | Nov 2019 | WO |
2020003273 | Jan 2020 | WO |
2020146582 | Jul 2020 | WO |
2020222588 | Nov 2020 | WO |
2021049586 | Mar 2021 | WO |
2021052794 | Mar 2021 | WO |
Entry |
---|
Document: JVET-O0530-v2, Li, G., et al., “Non-CE4: Adaptive subblock size for affine motion compensation,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 15th Meeting: Gothenburg, SE, Jul. 3-12, 2019, 5 pages. |
Document: JVET-O0336, Choi, B., et al., “AHG8: Region-wise scalability support with reference picture resampling,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 15th Meeting: Gothenburg, SE, Jul. 3-12, 2019, 5 pages. |
Document: JVET-N1001-v8, Bross, B., et al., “Versatile Video Coding (Draft 5),” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 14th Meeting: Geneva, CH, Mar. 19-27, 2019, 400 pages. |
Document: JVET-R2002-v2, Chen, J., et al., “Algorithm description for Versatile Video Coding and Test Model 9 (VTM 9),” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 18th Meeting: by teleconference, Apr. 15-24, 2020, 14 pages. |
Xu, J., et al., “Overview of the Emerging HEVC Screen Content Coding Extension”, IEEE Transactions on Circuits and Systems for Video Technology, vol. 26, No. 1, ISSN: 1051-8215, DOI: 10.1109/TCSVT.2015.2478706, Jan. 2016, 19 pages. |
Document: JVET-M0247, Liu, H., et al., “CE2-related: Joint Test of AMVR for Affine Inter Mode (Test 2.1.1 and Test 2.1.2),” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 13th Meeting: Marrakech, MA, Jan. 9-18, 2019, 3 pages. |
Document: JVET-O2001-vE, Bross, B., et al., “Versatile Video Coding (Draft 6),” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 15th Meeting: Gothenburg, SE, Jul. 3-12, 2019, 457 pages. |
Document: JVET-P0126, Hannuksela et al. “AHG12: Signalling of Subpicture IDs and Layout,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 16th Meeting: Geneva, CH, Oct. 1-11, 2019, 2 pages. |
Document: JVET-N0055-v2, Choi, B., et al., “AHG12: On sub-picture partitioning,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 14th Meeting: Geneva, CH, Mar. 19-27, 2019, 8 pages. |
Document: JCTVC-R1014, Joshi, R., et al. “Screen Content Coding Test Model 2 (SCM 2),” Joint Collaborative Team on Video Coding (JCT-VC) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 17th Meeting: Valencia, ES, Mar. 27-Apr. 4, 2014, 10 pages. |
Document: JVET-N0052, Wenger, S., et al. “[AHG19] On Signaling of Adaptive Resolution Change,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 14th Meeting: Geneva, CH, Mar. 19-27, 2019, 11 pages. |
Non-Final Office Action from U.S. Appl. No. 17/831,074 dated Dec. 19, 2023, 67 pages. |
Final Office Action from U.S. Appl. No. 17/861,728 dated Nov. 21, 2023, 21 pages. |
Non-Final Office Action from U.S. Appl. No. 17/950,411 dated Nov. 27, 2023, 22 pages. |
Document: JVET-Q0311-v2, Wang, Y., et al., “Non-CE5: On CC-ALF padding for ALF virtual boundaries,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC WG 11 17th Meeting: Brussels, BE, Jan. 7-17, 2020, 6 pages. |
Document: JVET-Q0310, Wang, Y., et al., “Non-CE5: Suggested text for CC-ALF padding process with raster scan slices,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC WG 11 17th Meeting: Brussels, BE, Jan. 7-17, 2020, 3 pages. |
Document: JVET-Q0780, Segall, A., et al., “BoG Report on CE5 Related Contributions,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC WG 11 17th Meeting: Brussels, BE, Jan. 7-17, 2020, 10 pages. |
Document: JVET-P0080, Misra, K., et al., CE5-2.1, CE5-2.2: Cross-Component Adaptive Loop Filter, Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC WG 11 16th Meeting: Geneva, CH, Oct. 1-11, 2019, 7 pages. |
“Test Model 6 of versatile Video Coding (VTM 6),” 127. MPEG Meeting; Jul. 8, 2019-Jul. 12, 2019; Gothenburg; (Motion Picture Expert Group or ISO/IEC JTC1/SC29/WG11) , No. n18693 (Oct. 7, 2019),Retrieved from the Internet: URL: http://phenix.int-evry.fr/mpeg/doc_end_user/documents/I27_Gothenburg/wg11/w18693.zip w18693.docx, Jul. 12, 2019, 88 pages. |
Document: JVET-P2001-v9, Bross, B., et al., “Versatile Video Coding (Draft 7),” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 16th Meeting: Geneva, CH, Oct. 1-11, 2019, 495 pages. |
Document: JVET-P1033, Norkin, A., et al., “BoG report on CE5 loop filtering related contributions,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 16th Meeting: Geneva, CH, Oct. 1-11, 2019, 34 pages. |
Document: JVET-P0016-v1, Zhou, M., et al., “JVET AHG report: Implementation studies, (AHG16),” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 16th Meeting: Geneva, CH, Oct. 1-11, 2019, 34 pages. |
Xu, X., et al., “Intra Block Copy in HEVC Screen Content Coding Extensions”, IEEE Journal on Emerging and Selected Topics in Circuits and Systems, vol. 6, No. 4, ISSN: 2156-3357, DOI: 10.1109/JETCAS.2016.2597645, 2016, 11 pages. |
Sun, Y., et al., “Improvements of HEVC SCC Palette Mode and Intra Block Copy”, IEEE Journal on Emerging and Selected Topics in Circuits and Systems, vol. 6, No. 4, ISSN: 2156-3357, DOI: 10.1109/JETCAS.2016.259819, Dec. 2016, 13 pages. |
Pu, W., et al., “Palette Mode Coding in HEVC Screen Content Coding Extension”, IEEE Journal on Emerging and Selected Topics in Circuits and Systems, vol. 6, No. 4, ISSN: 2156-3357, DOI: 10.1109/JETCAS.2016.2605661, Dec. 2016, , 13 pages. |
Liu, S., et al., “Overview of HEVC extensions on screen content coding”, APSIPA Transactions on Signal and Information Processing, Cambridge University Press, vol. 4 URL: https://www. cambridge.org/core/journals/apsipa-transactions-on-signal-and-information-processing/article/overview-of-hevc-extensions-on-screen-content-coding/E12DCF69B0A59DD269EFE14CD1AFBFBE, DOI: https://doi.org/10.1017/ATSIP.2015.11, Sep. 22, 2015, 12 pages. |
Extended European Search Report from European Application No. 23214125.9 dated Feb. 6, 2024, 17 pages. |
Choi et al. “AHG12: on Sub-Picture Partitioning,” Joint Video Experts Teams (JVET) of ITU-T SG 16 WP 3 and iSO/IEC JTC 1/SC 29/WG 11 14th Meeting, Geneva, CH, Mar. 19-27, 2019, document JVET-N0055, 2019. |
Han et al. “CE4.1.3: Affine Motion Compensation Prediction,” Joint Video Exploration Team (JVET)of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 1111th Meeting: Ljubljana, SI, Jul. 10-18, 2018, document JVET-K0337, 2018. |
He et al. “AHG12: On Subpicture Grid Syntax,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 16th Meeting: Geneva, CH, Oct. 1-11, 2019, document JVET-P0129, 2019. |
Huang et al. “CE4.2.5: Simplification of Affine Merge List Construction and Move ATMVP to Affine Merge List,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 12th Meeting: Macao, CN, Oct. 3-12, 2018, document JVET-L0278, 2018. |
“High Efficiency Video Coding,” Series H: Audiovisual and Multimedia Systems: Infrastructure of Audiovisual Services—Coding of Moving Video, ITU-T Telecommunication Standardization Sector of ITU, H.265, Feb. 2018. |
“Information Technology—High Efficiency Coding and Media Delivery in Heterogeneous Environments—Part 2: High Efficiency Video Coding” Apr. 20, 2018, ISO/DIS 23008, 4th Edition. |
Lai et al. “CE4.3.4: Removal of AMVR Flag Constraint,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 1111th Meeting: Ljubljana, SI, Jul. 10-18, 2018, document JVET-K0247, 2018. |
Laroche et al. “CE2: On Subblock Merge Index Coding (Test CE2.2.2),” Joint Video Experts Team (JVET)of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 1113th Meeting: Marrakech, MA, Jan. 9-18, 2019, document JVET-M0381, 2019. |
Lee et al. “CE4: Simplification of the Common Base for Affine Merge (Test 4.2.6),” Joint Video Experts Team (JVET)of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 1112th Meeting: Macau, CN, Oct. 8-12, 2018, document JVET-L0142, 2018. |
Lee et al. “Cross-check of JCTVC-L0279 on Motion Data Compression,” Joint Collaborative Team on Video Coding (JCT-VC)of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 1112th Meeting: Geneva, CH, Jan. 14-23, 2013, document JCTVC-L0368, 2013. |
Lee et al. “CE2-related: Simplification of Subblock-Based Temporal Merging Candidates,” Joint Video Experts Team (JVET)of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 1113th Meeting: Marrakech, MA, Jan. 9-18, 2019, document JVET-M0240, 2019. |
Li et al. “Non-CE4: On Prediction Refinement with Optical Flow,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 15th Meeting: Gothenburg, SE, Jul. 3-12, 2019, document JVET-O0553, 2019. |
Li, Guichun, “Crosscheck of JVET-N0236 (CE2-Related: Prediction Refinement with Optical Flow for Affine Mode),” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 14th Meeting: Geneva, CH, Mar. 19-27, 2019, document JVET-M0651, 2019. |
Liao et al. “CE10.3.1.b: Triangular Prediction Unit Mode,” Joint Video Exploration Team (JVET)of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 1112th Meeting: Macao, CN, Oct. 3-12, 2018, document JVET-L0124, 2018. |
Liu et al. “CE4-related: Adaptive Motion Vector Resolution for Affine Inter Mode,” Joint Video Experts Team (JVET)of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 1112th Meeting: Macao, CN, Oct. 3-12, 2018, document JVET-L0332, 2018. |
Liu et al. “CE2: Adaptive Motion Vector Resolution for Affine Inter Mode (Test 2.1.2),” Joint Video Experts Team (JVET)of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 1113th Meeting: Marrakech, MA, Jan. 9-18, 2019. document JVET-M0246, 2019. |
“Luo et al. ““CE2-Related: Prediction Refinement with Optical Flow for Affine Mode,”” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 14th Meeting: Geneva, CH, Mar. 19-27, 2019, document JVET-N0236, 2019.” |
Luo et al. “CE4: Prediction Refinement with Optical Flow for Affine Mode (Test 2.1),” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 15th Meeting: Gothenburg, SE, Jul. 3-12, 2019, document JVET-O0070, 2019. |
Petersson et al. “AHG9: On Picture Header Modifications,” Joint Video Experts Team (JVET of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 1117th Meeting: Brussels, BE, Jan. 7-17, 2020, document JVET-Q0270, 2020. |
Rosewarne et al. “High Efficiency Video Coding (HEVC) Test Model 16 (HM 16) Improved Encoder Description Update 7,” Joint Collaborative Team on Video Coding (JCT-VC) of ITU-T SG16 WP3 and ISO/IEC JTC1/SC29/ WG1125th Meeting: Chengdu, CN, Oct. 14-21, 2016, document JCTVC-Y1002, 2016. |
Xu et al. “Bitstream Conformance with a Virtual IBC Buffer Concept,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and iSO/IEC JTC 1/SC 29/WG 11 15th Meeting, Gothenburg, SE Jul. 3-12, 2019, document JVET-O1170, 2019. |
Ye et al. “CE8: Palette Predictor List Enhancement (Test 8.2.6),” Joint Video Experts Team (JVET) of ITU-T SG WP 3 and ISO/IEC JTC 1/SC 29/WG 11 13th Meeting, Marrakech, MA, Jan. 9-18, 2019, document JVET-M0457, 2019. |
Zhang et al. “CE2-Related: Early Awareness of Accessing Temporal Blocks in Sub-Block Merge List Construction,” Joint Video Experts Team (JVET)of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 1113th Meeting: Marrakech, MA, Jan. 9-18, 2019, document JVET-M0273, 2019. |
Zhang et al. “AHG12: Cleanups on Syntax Design of Sub-Pictures,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 16th Meeting: Geneva, CH, Oct. 1-11, 2019, document JVET-P0377, 2019. |
JEM-7.0: https://jvet.hhi.fraunhofer.de/svn/svn_HMJEMSoftware/tags/ HM-16.6-JEM-7.0, Apr. 11, 2023. |
VTM software: https://vcgit.hhi.fraunhofer.de/jvet/VVCSoftware_VTM.git, Apr. 11, 2023. |
Li et al. “AHG12: Modification for Subpicture,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 16th Meeting: Geneva, CH, Oct. 1-11, 2019, document JVET-P0171, 2019. |
Document: JVET-N0195-v1, Li, J., et al., “CE2: Memory bandwidth reduction for the affine mode (Test 2.4.3),” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 14th Meeting: Geneva, CH, Mar. 19-27, 2019, 4 pages. |
Chen et al. “Algorithm description for Versatile Video Coding and Test Model 8 (VTM 8),” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 17th Meeting: Brussels, BE, Jan. 7-17, 2020, document JVET-Q2002, 2020. |
Non Final Office Action from U.S. Appl. No. 17/861,728 dated Apr. 20, 2023. |
Extended European Search Report from European Patent Application No. 20810559.3 dated May 19, 2022 (7 pages). |
Extended European Search Report from European Patent Application No. 20809576.0 dated May 19, 2022 (7 pages). |
Extended European Search Report from European Patent Application No. 20852734.1 dated Jan. 20, 2023 (8 pages). |
Extended European Search Report from European Patent Application No. 21774361.6 dated Mar. 22, 2023 (8 pages). |
Examination Report from Indian Patent Application No. 202247055012 dated Jan. 25, 2023 (7 pages). |
International Search Report and Written Opinion from International Patent Application No. PCT/CN2020/091537 dated Jul. 29, 2020 (8 pages). |
International Search Report and Written Opinion from International Patent Application No. PCT/CN2020/091538 dated Aug. 19, 2020 (10 pages). |
International Search Report and Written Opinion from International Patent Application No. PCT/CN2020/091539 dated Aug. 21, 2020 (9 pages). |
International Search Report and Written Opinion from International Patent Application No. PCT/CN2020/091540 dated Jul. 30, 2020 (10 pages). |
International Search Report and Written Opinion from International Patent Application No. PCT/CN2020/133271 dated Mar. 8, 2021 (10 pages). |
International Search Report and Written Opinion from International Patent Application No. PCT/CN2021/082242 dated Jun. 22, 2021 (11 pages). |
International Search Report and Written Opinion from International Patent Application No. PCT/CN2021/082243 dated Jun. 21, 2021 (13 pages). |
Non Final Office Action from U.S. Appl. No. 17/521,012 dated Jan. 24, 2022. |
Non Final Office Action from U.S. Appl. No. 17/521,043 dated Feb. 4, 2022. |
Non Final Office Action from U.S. Appl. No. 17/520,975 dated Mar. 3, 2022. |
Final Office Action from U.S. Appl. No. 17/521,012 dated May 6, 2022. |
Non Final Office Action from U.S. Appl. No. 17/950,443 dated Feb. 16, 2023. |
Non Final Office Action from U.S. Appl. No. 17/950,411 dated Mar. 13, 2023. |
Extended European Search Report from European Patent Application No. 20852929.7 dated Sep. 26, 2022 (15 pages). |
Extended European Search Report from European Patent Application No. 20871705.8 dated Oct. 31, 2022 (10 pages). |
Extended European Search Report from European Patent Application No. 20876854.9 dated Oct. 31, 2022 (13 pages). |
Examination Report from Indian Patent Application No. 202247022804 dated Sep. 8, 2022 (6 pages). |
Examination Report from Indian Patent Application No. 202247023112 dated Aug. 18, 2022 (6 pages). |
Examination Report from Indian Patent Application No. 202247039697 dated Oct. 12, 2022 (7 pages). |
Notice of Allowance from U.S. Appl. No. 17/665,220 dated Sep. 29, 2022. |
Non Final Office Action from U.S. Appl. No. 17/861,728 dated Sep. 26, 2022. |
Extended European Search Report from European Patent Application No. 21738561.6 dated Dec. 22, 2022 (12 pages). |
Examination Report from Indian Patent Application No. 202247007118 dated Jul. 6, 2022 (7 pages). |
Non Final Office Action from U.S. Appl. No. 17/723,089 dated Aug. 1, 2022. |
International Search Report and Written Opinion from International Patent Application No. PCT/CN2020/108142 dated Oct. 28, 2020 (9 pages). |
International Search Report and Written Opinion from International Patent Application No. PCT/CN2020/108159 dated Nov. 12, 2020 (9 pages). |
International Search Report and Written Opinion from International Patent Application No. PCT/CN2020/108175 dated Nov. 18, 2020 (10 pages). |
International Search Report and Written Opinion from International Patent Application No. PCT/CN2020/108182 dated Nov. 16, 2020 (11 pages). |
International Search Report and Written Opinion from International Patent Application No. PCT/CN2020/119931 dated Jan. 12, 2021 (10 pages). |
International Search Report and Written Opinion from International Patent Application No. PCT/CN2020/119932 dated Dec. 30, 2020 (9 pages). |
International Search Report and Written Opinion from International Patent Application No. PCT/CN2020/121767 dated Jan. 27, 2021 (12 pages). |
International Search Report and Written Opinion from International Patent Application No. PCT/CN2020/121768 dated Jan. 8, 2021 (13 pages). |
International Search Report and Written Opinion from International Patent Application No. PCT/CN2020/139389 dated Mar. 24, 2021 (9 pages). |
International Search Report and Written Opinion from International Patent Application No. PCT/CN2021/071008 dated Apr. 12, 2021 (13 pages). |
International Search Report and Written Opinion from International Patent Application No. PCT/CN2021/071360 dated Apr. 18, 2021 (10 pages). |
Non Final Office Action from U.S. Appl. No. 17/665,242 dated Apr. 15, 2022. |
Non Final Office Action from U.S. Appl. No. 17/665,220 dated May 24, 2022. |
Non Final Office Action from U.S. Appl. No. 17/665,275 dated May 25, 2022. |
Non Final Office Action from U.S. Appl. No. 171711,294 dated Jun. 7, 2022. |
Non Final Office Action from U.S. Appl. No. 171711,319 dated Jun. 8, 2022. |
Non Final Office Action from U.S. Appl. No. 17/723,175 dated Oct. 12, 2022. |
Boyce, Jill, “AHG15: On Interoperability Point Signalling,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 14th Meeting: Geneva, CH, Mar. 19-27, 2019, document JVET-N0276, 2019. |
Boyce et al. “Sub-Pictures and Sub-Picture Sets with Level Derivation,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 15th Meeting: Gothenburg, SE, Jul. 3-12, 2019, document JVET-O0555, 2019. |
Bross et al. “Versatile Video Coding (Draft 4),” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 13th Meeting: Marrakech, MA, Jan. 9-18, 2019, document JVET-M1001, 2019. |
Bross et al. “Versatile Video Coding (Draft 6),” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 15th Meeting: Gothenburg, SE, Jul. 3-12, 2019, document JVET-O2001, 2019. |
Bross et al. “Versatile Video Coding (Draft 7),” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 16th Meeting: Geneva, CH, Oct. 1-11, 2019, document JVET-P2001, 2019. |
Chen et al. “AHG17: [SYS-VVC] Signalling Subpicture Coded Video Sequence,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 14th Meeting: Geneva, Switzerland, Mar. 19-27, 2019, document JVET-N0073, 2019. |
Chen et al. “AHG17/AHG12: On Signalling the Subpicture IDs,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 16th Meeting: Geneva, CH, Oct. 1-11, 2019, document JVET-P0141, 2019. |
Chen et al. “AHG17/AHG12: On Signalling of Subpicture Structure in the SPS,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 16th Meeting: Geneva, CH, Oct. 1-11, 2019, document JVET-P0143, 2019. |
Chen et al. “AHG17/AHG12: On Associating Slices with a Subpicture,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 16th Meeting: Geneva, CH, Oct. 1-11, 2019, document JVET-P0144, 2019. |
Choi et al. “AHG17: On Decoded Picture Buffer Management for VVC,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 13th Meeting: Marrakech, MA, Jan. 9-18, 2019, document JVET-M0154, 2019. |
Choi et al. “AHG8/AHG12: On Sub-Picture Partitioning Support with Layers,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 15th Meeting: Gothenburg, SE, Jul. 3-12, 2019, document JVET-O0334, 2019. |
Choi et al. “AHG8/AHG17: On Signaling Reference Picture Resampling,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 16th Meeting: Geneva, CH, Oct. 1-11, 2019, document JVET-P0219, 2019. |
Fu et al. “CE4-Related: Quadtree-Based Merge Estimation Region for VVC,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 13th Meeting: Marrakech, MA, Jan. 9-18, 2019, document JVET-M0350, 2019. |
Gao et al. “Simplified GEO without Multiplication and Minimum Blending Mask Storage (Harmonization of JVET-P0107, JVET-P0264 and JVET-P0304),” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 16th Meeting: Geneva, CH, Oct. 1-11, 2019, document JVET-P0884, 2019. |
Hannuksela et al. “AHG12: On Grouping of Tiles,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 13th Meeting: Marrakech, MA, Jan. 9-18, 2019, document JVET-M0261, 2019. |
Hannuksela et al. “AHG12: Summary of HLS Proposals on Subpictures,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 16th Meeting: Geneva, CH, Oct. 1-11, 2019, document JVET-P0693, 2019. |
He et al. “AHG12: On Picture and Sub-Picture Signaling,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 15th Meeting: Gothenburg, SE, Jul. 3-12, 2019, document JVET-O0182, 2019. |
Misra et al. “Cross-Component Adaptive Loop Filter for Chroma,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 1115th Meeting: Gothenburg, SE, Jul. 3-12, 2019, document JVET-O0636, 2019. |
Misra et al. “CE5-related: On the Design of CC-ALF,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 16th Meeting: Geneva, CH, Oct. 1-11, 2019, document JVET-P1008, 2019. |
Sullivan et al. “Meeting Report of the 15th Meeting of the Joint Video Experts Team (JVET), Gothenburg, SE, Jul. 3-12, 2019,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 15th Meeting: Gothenburg, SE, Jul. 3-12, 2019, document JVET-O2000, 2019. |
Wang et al. “AHG12: Sub-Picture-Based Coding for VVC,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 14th Meeting: Geneva, CH, Mar. 19-27, 2019, document JVET-N0107, 2019. |
Wang et al. “AHG12: Harmonized Proposal for Sub-Picture-based Coding for VVC,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 14th Meeting: Geneva, CH, Mar. 19-27, 2019, document JVET-N0826, 2019. |
Wang et al. “AHG12: Sub-Picture Based Motion-Constrained Independent Regions,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 15th Meeting: Gothernburg, SE, Jul. 3-12, 2019, document JVET-O0141, 2019. |
Wennersten et al. “Encoder-Only GOP-Based Temporal Filter,” Joint Collaborative Team on Video Coding (JCT-VC) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 35th Meeting: Geneva, CH, Mar. 22-27, 2019, document JCTVC-AI0023, 2019. |
Xu et al. “Non-CE8: On IBC Reference Buffer Design,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 14th Meeting: Geneva, CH, Mar. 19-27, 2019, document JVET-N0472, 2019. |
Zhang et al.a “CE4: History-Based Motion Vector Prediction (Test 4.4.7),” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 12th Meeting: Macao, CN, Oct. 3-12, 2018, document JVET-L0266, 2018. |
Zhang et al. “CE4-Related: Restrictions on History-Based Motion Vector Prediction,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 13th Meeting: Marrakech, MA, Jan. 9-18, 2019, document JVET-M0272, 2019. |
Zhu et al. “CE8-related: Palette Mode Coding,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 14th Meeting: Geneva, CH, Mar. 19-27, 2019, document JVET-N0258, 2019. |
http://phenix.it-sudparis.eu/jvet/doc_end_user/current_document.phpid=5755, Jul. 5, 2022. |
https://vcgit.hhi.fraunhofer.de/jvet/VVCSoftware_VTM/tags/VTM-5.0, Jul. 5, 2022. |
Chen et al. “AHG8: Adaptive Resolution Change,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 15th Meeting: Gothenburg, SE, Jul. 3-12, 2019, document JVET-O0303, 2019. |
Chen et al. “AHG8: Integrated Specification Text for Reference Picture Resampling,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 15th Meeting: Gothenburg, SE, Jul. 3-12, 2019, document JVET-O1164, 2019. |
Fan et al. “CE6-2.3-Related: Reduced 8×8 Matrices for LFNST,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 16th Meeting: Geneva, CH, Oct. 1-11, 2019, document JVET-P0545, 2019. |
Hendry et al. “HG8: Support for Reference Picture Resampling—Handling of Picture Size Signalling, Conformance Windows, and DPB Management,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 15th Meeting: Gothernburg, SE, Jul. 3-12, 2019, document JVET-O0133, 2019. |
Hsiang et al. “AHG9/AHG12: Modifications Related to Subpicture Signalling and RPR,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP3 and ISO/IEC JTC 1/SC 29/WG 11 17th Meeting Brussels, BE, Jan. 7-17, 2020, document JVET-Q0290, 2020. |
Nishi et al. “AHG9: Constraint About Usage of Reference Picture Resampling and Subpictures,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP3 and ISO/IEC JTC 1/SC 29/WG 11 17th Meeting Brussels, BE, Jan. 7-17, 2020, document JVET-Q0043, 2020. |
Samuelsson et al. “AHG 8: Adaptive Resolution Change (ARC) High-Level Syntax (HLS),” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 15th Meeting, Gothenburg, SE Jul. 3-12, 2019, document JVET-O0204, 2019. |
Senanayake et al. “High Performance Hardware Architectures for Intra Block Copy and Palette Coding for HEVC Screen Content Coding Extension,” 2017 IEEE, 978-1-5090-4825-0/17/$31.00. |
Suehring et al. “AHG9: Subpicture Location Signalling Bugfix,” Joint Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 17th Meeting, Brussels, BE, Jan. 7-17, 2020, document JVET-Q0787, 2020. |
Sullivan et al. “Meeting Report of the 17th Meeting of the Joint Video Experts Team (JVET), Brussels, BE, Jan. 7-17, 2020,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 17th Meeting, Brussels, BE Jan. 7-17, 2020, document JVET-Q2000, 2020. |
Wang et al. “AHG12: A Summary of Proposals on Subpicture ID Signalling,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and iSO/IEC JTC 1/SC 29/WG 11 17th Meeting, Brussels, BE Jan. 7-17, 2020, document JVET-Q0590, 2020. |
Huang et al. “AHG16: Merge Estimation Region with Constrain in HMVP Update,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 17th Meeting, Brussels, Jan. 6-17, 2020, document JVET-Q0297, 2020. |
“Text of DIS ISO/IEC 23008-2:201x: High Efficiency Coding and Media Delivery in Heterogeneous Environment—Part 2: High Efficiency Video Coding,” (4th Edition). 122 MPEG Meeting Apr. 16-20, 2018, San Diego, Motion Picture Expert Group or ISO/IEC JTC1/SC 29/WG 11, No. n17661, May 11, 2018, XP030024288, retrieved from the internet May 11, 2018. |
Alshin et al. “Bi-Directional Optical Flow for Improving Motion Compensation,” Dec. 8-10, 2010, 28th Picture Coding Symposium, PCS2010, Nagoya, Japan, pp. 422-425. |
Bross et al. “Versatile Video Coding (Draft 3),” Joint Video Experts Team (JVET)of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 1112th Meeting: Macao, CN, Oct. 3-12, 2018, document JVET-L1001, 2018. |
Bross et al. “Versatile Video Coding (Draft 5),” Joint Video Experts Team (JVET)of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 1114th Meeting: Geneva, CH, Mar. 19-27, 2019, document JVET-N1001, 2019. |
Bross et al. “Versatile Video Coding (Draft 8),” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 17th Meeting: Brussels, BE, Jan. 7-17, 2020, document JVET-Q2001 vD vE, 2020. |
Chen et al. “Algorithm Description of Joint Exploration Test Model 7 (JEM 7),” Joint Video Exploration Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11, 7th Meeting: Torino, IT, Jul. 13-21, 2017, document JVET-G1001, 2017. |
Chen et al. “Crosscheck of JVET-L0142 (CE4: Simplification of the Common Base for Affine Merge (Test 4.2.6)).” Joint Video Experts Team (JVET)of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 1112th Meeting: Macao, CN, Oct. 3-12, 2018, document JVET-L0632, 2018. |
Chen et al. ““Algorithm Description for Versatile Video Coding and Test Model 6 (VTM 6),”” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 15th Meeting: Gothenburg, SE, Jul. 3-12, 2019, document JVET-O2002, 2019. |
Document: JVET-N0236-r4, Luo, J., et al., “CE2-related: Prediction refinement with optical flow for affine mode,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 14th Meeting: Geneva, CH, Mar. 19-27, 2019, 23 pages. |
Document: JVET-P0378-v1, Zhang, K., et al., “AHG12: Removal of dependency between sub-pictures,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 16th Meeting: Geneva, CH, Oct. 1-11, 2019, 3 pages. |
Chinese Office Action from Chinese Application No. 202080056646.5 dated Apr. 3, 2024, 13 pages. |
Japanese Notice of Reasons for Rejection from Japanese Application No. 2023-122288 dated May 7, 2024, 6 pages. |
Extended European Search Report From European Application No. 23214088.9 dated Jun. 7, 2024, 12 pages. |
Non-Final Office Action from U.S. Appl. No. 18/182,803 dated Apr. 12, 2024, 79 pages. |
Number | Date | Country | |
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20240048699 A1 | Feb 2024 | US |
Number | Date | Country | |
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Parent | 17723175 | Apr 2022 | US |
Child | 18320782 | US | |
Parent | PCT/CN2020/121768 | Oct 2020 | WO |
Child | 17723175 | US |