Claims
- 1. An interrupt system, comprising:
- a plurality of electrical devices, each electrically operatively coupled to a first line and a second line in a parallel arrangement;
- means for issuing an interrupt signal on the first line such that each electrical device receives the interrupt signal;
- each electrical device configured to determine whether the interrupt signal received on the first line is intended for itself and respond thereto during an interrupt acknowledgment cycle, by asserting a common interrupt acknowledgement signal on the second line, if the interrupt signal was intended for itself;
- a plurality of discrete time frames each having a predetermined length and located at a predetermined position within the interrupt acknowledgment cycle, each time frame corresponding to one electrical device of the plurality of electrical devices;
- each electrical device asserting the common interrupt acknowledgment signal on the second line only during its time frame if the interrupt signal was intended for itself, said assertion of the common interrupt acknowledgment signal indicating that the interrupt acknowledgment cycle is being serviced such that removal of any one of the electrical devices does not prevent remaining electrical devices from receiving the interrupt signal and asserting the common interrupt acknowledgment signal if the interrupt signal was intended for itself.
- 2. The interrupt system according to claim 1 wherein each time frame corresponding to each electrical device is arranged in a non-overlapping sequential manner within the interrupt acknowledgment cycle.
- 3. The interrupt system according to claim 1 wherein each of the electrical devices is configured to respond to the interrupt signal during its time frame and is prevented from responding during a time frame assigned to a another electrical device.
- 4. The interrupt system according to claim 1 wherein each of the electrical devices receives the interrupt signal at the same time, and if the interrupt signal was intended for itself, the electrical device asserts the common interrupt acknowledgment signal at a different time from the time that any other electrical device asserts the common interrupt acknowledgment signal in its time frame within the interrupt acknowledgment cycle.
Parent Case Info
This is a continuation of application Ser. No. 08/517,936, filed on Aug. 22, 1995, and now abandoned.
US Referenced Citations (3)
Number |
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Date |
Kind |
4918566 |
Brodsky et al. |
Apr 1990 |
|
5293589 |
Skordov et al. |
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5455760 |
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Continuations (1)
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Number |
Date |
Country |
Parent |
517936 |
Aug 1995 |
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