Patent Grant
11727289
The present invention relates to the electrical, electronic, and computer arts, and more specifically, to artificial intelligence and related technologies.
Automated planning is a long-standing sub-area of Artificial Intelligence (AI) that aims at solving problems that involve finding a strategy of action, provided that the problems are modeled in a suitable input language. Optimal planning seeks to find the one best solution to a problem. A variety of optimal planners exist, which are able to solve rather large problems. The problems are PSPACE-hard in general, and no one tool can work well on all planning problems. As the skilled artisan will appreciate, in computational complexity theory, PSPACE is the set of all decision problems that can be solved by a Turing machine using a polynomial amount of space.
Top K planning seeks to find the K best solutions, and is used within several tools, such as the research prototype Scenario Planning Advisor (SPA).
Current techniques are restricted to searching in the problem's state space using a K* search algorithm and an admissible and consistent heuristic; this does not work well on many problems, and a long time is typically required till the first solution.
Embodiments of the present disclosure provide techniques for iterative generation of top quality plans in automated plan generation. According to an embodiment of the present invention, an exemplary method for improving performance of at least one hardware processor solving a top-k planning problem includes obtaining, in a memory coupled to the at least one processor, a specification of the planning problem in a planning language; obtaining, in a first iteration carried out by the at least one processor, at least one solution to the planning problem; modifying, in the first iteration carried out by the at least one processor, the planning problem to forbid the at least one solution; and repeating, by the at least one processor, the obtaining of the at least one solution and the modifying to forbid the at least one solution, for a plurality of additional iterations, after the first iteration, until a desired number, k, of solutions to the planning problem are found or until no further solutions exist, whichever comes first
According to another embodiment of the present invention, an exemplary computer system for controlling an industrial robot by solving a top-k planning problem includes a memory; an interface to the industrial robot; and at least one processor, coupled to the memory and the interface, and operative to: obtain a specification of the planning problem in a planning language; obtain, in a first iteration, at least one solution to the planning problem; modify, in the first iteration, the planning problem to forbid the at least one solution; repeat the obtaining of the at least one solution and the modifying to forbid the at least one solution, for a plurality of additional iterations, after the first iteration, until a desired number, k, of solutions to the planning problem are found or until no further solutions exist, whichever comes first; and provide a signal to the interface to cause the industrial robot to operate in accordance with the k solutions to the planning problem.
As used herein, “facilitating” an action includes performing the action, making the action easier, helping to carry the action out, or causing the action to be performed. Thus, by way of example and not limitation, instructions executing on one processor might facilitate an action carried out by instructions executing on a remote processor, by sending appropriate data or commands to cause or aid the action to be performed. For the avoidance of doubt, where an actor facilitates an action by other than performing the action, the action is nevertheless performed by some entity or combination of entities.
One or more embodiments of the invention or elements thereof can be implemented in the form of a computer program product including a computer readable storage medium with computer usable program code for performing the method steps indicated. Furthermore, one or more embodiments of the invention or elements thereof can be implemented in the form of a system (or apparatus) including a memory, and at least one processor that is coupled to the memory and operative to perform exemplary method steps. Yet further, in another aspect, one or more embodiments of the invention or elements thereof can be implemented in the form of means for carrying out one or more of the method steps described herein; the means can include (i) hardware module(s), (ii) software module(s) stored in a computer readable storage medium (or multiple such media) and implemented on a hardware processor, or (iii) a combination of (i) and (ii); any of (i)-(iii) implement the specific techniques set forth herein.
Techniques of the present invention can provide substantial beneficial technical effects. For example, one or more embodiments provide one or more of:
provides an “anytime” approach, obtaining solutions incrementally;
provides shorter time to first solution than current techniques; and/or
can be implemented using existing optimal planners.
These and other features and advantages of the present invention will become apparent from the following detailed description of illustrative embodiments thereof, which is to be read in connection with the accompanying drawings.
As noted, automated planning is a long-standing sub-area of Artificial Intelligence (AI) that aims at solving problems that involve finding a strategy of action, provided that the problems are modeled in a suitable input language. Optimal planning seeks to find the one best solution to a problem. A variety of optimal planners exist, which are able to solve rather large problems. The problems are PSPACE-hard in general, and no one tool can work well on all planning problems. As the skilled artisan will appreciate, in computational complexity theory, PSPACE is the set of all decision problems that can be solved by a Turing machine using a polynomial amount of space.
Top K planning seeks to find the K best solutions, and is used within several tools, such as the research prototype Scenario Planning Advisor (SPA).
Current techniques are restricted to searching in the problem's state space using a K* search algorithm and an admissible and consistent heuristic; this does not work well on many problems, and a long time is typically required till the first solution.
Refer now to
Referring now to
Giving attention now to
The aforementioned technique M2 addresses planning problem reformulation to forbid a set of solutions. Provided herein is a novel method M2.1 that receives a planning problem and a set of plans (solutions to the planning problem) and returns a planning problem that preserves exactly all solutions of the input planning problem, except for the input solutions. See Definition 6 of
The curves are as follows:
One or more embodiments provide a system and/or method for anytime solution of the top K planning problem, including receiving a description of a model in one of the planning languages, such as, for example, PDDL, STRIPS, SAS+, ADL, or the like; receiving a numeric value k identifying the number of plans to be obtained; and producing a set of at most k plans iteratively. The producing step can include, for example, (a) finding one single optimal plan for the input model; (b) extending the found plan p to a set of plans P of an equivalent quality; (c) modifying the input model to a new model with solution set equal to the input model solution set minus P; and (d) repeating the previous three sub-steps (a)-(c) with the new model as an input model until k solutions are found or no other solution exists.
Regarding sub-step (a), in some cases, at each step, an optimal solution can be obtained using any optimal planner. Non-limiting examples of suitable optimal planners include Metis; BJOLP; Fast Downward (a configurable planning system, implementing many components, and, depending on the input configuration, can serve as many planners); appropriate ones of those listed in the booklet summarizing the participants on the Deterministic Track of the International Planning Competition (IPC) 2014 (the complete disclosure of which is hereby expressly incorporated by reference herein in its entirety for all purposes); and the like. In particular, optimal planners in the aforementioned booklet are mentioned under “Sequential Optimal Track” and include AllPACA, cGamer, DPMPlan, Dynamic-Gamer, Gamer, Fast Downward Cedalion, hflow, hpp, hppce, Metis, MIPlan, NuCeLaR, RIDA, Rational Lazy A*, SPM&S, SymBA*-1, and SymBA*-2.
Also regarding sub-step (a), in some cases, different planners can be used at different iterations.
Regarding sub-step (b), in some cases, the set of plans P includes only those found in sub-step (a) plan p.
Also regarding sub-step (b), in some cases, the plan found in step (a), plan p, can be extended to a set P using reordering of the operators in p.
Further regarding sub-step (b), in some cases, the set P can further be extended to a larger set of plans using symmetries of the input model, by adding symmetrical plans.
Regarding sub-step (c), in some cases, the input model can be modified to preserve exactly all solutions of the input model, except for the input set of plans.
Thus, consider that while cost-optimal planning aims at finding one best quality plan, top-k planning deals with finding a set of solutions, such that no better quality solution exists outside that set. One or more embodiments provide a novel iterative approach to top-k planning, capable of employing any cost-optimal planner and reformulating a planning task to forbid exactly the given set of solutions. In addition, to compare to existing approaches to finding top-k solutions, one or more embodiments implement the K* algorithm in an existing PDDL planner, creating the first K* based solver for PDDL planning tasks. As demonstrated herein, the iterative approach performs better for up to a large required size solution sets (thousands), while the K* based approach excels on extremely large ones.
Cost-optimal planning is the problem of finding one goal-achieving sequence of actions or a plan of a minimal summed up cost in any units (including but not limited to monetary cost; e.g., also including distances between locations or probabilities of how good a particular object can be perceived or grasped, time (e.g., execution time), loss of efficiency, etc.). Such plans are of interest in many applications, where the quality of solution is of extreme importance; in particular, in problems where preferences or likelihoods are encoded as cost of the actions. In many cases, one best solution is not sufficient, and the desire is to obtain a set of solutions of a high quality. Top-k planning is one way of obtaining such a set. It is the problem of finding a set of solutions of size k, such that no better solution exists outside the set. While finding a set of plans is motivated by several applications including plan repair, often within the context of diverse planning, other applications including risk management, hypothesis and explanation generation require to focus on high-quality plans instead, as the underlying approach of plan-recognition-as-planning works best with such plans.
Recently, the use of a k-shortest path algorithm called K* has been proposed to address the top-k planning problem. Experimental results have shown that the planning time to compute top-k plans is comparable to finding the optimal plan; in addition, the quality of the solutions found is much higher compared to the use of the diverse version of the LPG planner which computes a set of diverse plans. Note that the focus of diverse planning is not on plan quality, and accordingly, top-k planning the more suitable approach to the applications above.
One major limitation of K* is the consistency requirement for the heuristic function. This poses a restriction on the usability of the approach, disallowing the use of one of the most successful heuristics to date (discussed further below). Further, all plans are found almost simultaneously, requiring a long time until the first solution is found. Moreover, the existing implementation of K* for planning is in a planner that supports Stream Processing Planning Language (SPPL), and not in PDDL. Thus, there are no experimental results for K* on the standard planning benchmarks. To alleviate these problems, an iterative approach to top-k planning has been suggested: given a solution to a planning task, encode a set of new planning tasks which, cumulatively, preserve all solutions of the original task, except for the given one. Then, a search is performed on a tree of reformulations, invoking an existing planner in each node. As the number of successors of each node is the number of actions in the found plan, the clear down side of such an approach is the large number of invocations of the underlying planner. On the positive side, the approach exhibits an anytime behavior, with the first plan found rather quickly.
One or more embodiments advantageously provide an alternative iterative approach to top-k planning, finding additional solutions by reformulating the planning task at hand into a single task, preserving all solutions except for the given one. To this end, such reformulations are formally defined and one such instance is presented. Additional ways of deriving solutions from the previously found ones are suggested, further reducing the number of invocations of the underlying cost-optimal planner. The reformulation is extended to forbid multiple plans at once, alleviating the increase in task formulation size. Additionally, the K* algorithm is implemented on top of the Fast Downward planning system, allowing performance of the experimental evaluation on International Planning Competition (IPC) benchmarks, comparing the disclosed new iterative approach to K*. Results disclosed herein show that K* works better for extremely large values of k, while the iterative approach excels otherwise.
Consider classical planning tasks as captured by the well-known SAS+ formalism, extended with action costs. In such a planning task Π=O, s0, s*, cost
, V is a finite set of finite-domain state variables. Each variable v∈V is associated with a finite domain D(v) of variable values. A partial assignment p maps a subset of variables vars(p)⊆V to values in their domains. For a variable v∈V and partial assignment p, the value of v in p is denoted by p[v] if v∈vars(p) and it is said that p[v] is undefined if v∉vars(p). A partial assignment s with vars(s)=V, is called a state. State s is consistent with partial assignment p if they agree on all variables in vars(p), shortly denoted by p⊆s. The product S=Πv∈D(v) is called the state space of planning task Π. The state s0 is called initial state of Π and the partial assignment s* is called the goal of Π. A state s is called a goal state if s*⊆s and the set of all goal states is denoted by Ss*. The finite set O is a set of actions, each action is a pair
pre, eff
where pre is a partial assignment called precondition and eff is a partial assignment called effect. Further each action o has an associated natural number cost(o), called cost. An action o=
pre, eff
is applicable in state s if pre⊆s. Applying action o in state s results in a state denoted by s[[o]] where s[[o]][v]=eff[v] for all v∈vars(eff) and =s[[o]][v]=s[v] for all other variables. An action sequence π=
o1, . . . , on
is applicable in state s if there are states s0, . . . , sn, such that oi is applicable in si−1 and si−1[[oi]]=s; for 0≤i≤n. The variable sn is denoted by s[[π]]. For convenience, o1, . . . , on is used instead of
o1, . . . , on
. An action sequence with s[[π]]∈Ss* is called a plan. The cost of a plan π, denoted by cost(π) is the summed cost of the actions in the plan. For a planning task Π=
V, O, s0, s*, cost
, the set of all plans is denoted by PΠ. A plan π is optimal if its cost is minimal among all plans in PΠ. Let Π, Π′ be two planning tasks with actions O and O′ respectively. A total function r:O′→O is called an action mapping. The mapping r′:O*n→On for a non-negative integer n, is called the extension of action mapping r if for every action sequence π′=
o′1, . . . , o′n
with oi∈O′ for 0≤i≤n there is an action sequence π=
r(o′1), . . . , r(o′n)
and r′(π′)=π.
The top-k planning problem is defined in Definition 1 of
The objective of top-k planning is finding the k-plans of lowest costs for a planning task Π and thus optimal planning is the special case of top-1 planning.
Repeatedly Forbidding Plans
An exemplary algorithmic scheme for solving a top-k planning problem Π, k
is now introduced. One pertinent aspect of this scheme is an iteration of the following steps: (1) Find an optimal plan π for planning task Π. (2) Reformulate II to a planning task with the same set of plans but excluding π. (3) Repeat (1) with Π=Π′ and π=π′ unless either k solutions have been found or the Π′ is provably unsolvable. The scheme is summarized in the Algorithm illustrated in
One pertinent challenge of turning this algorithmic scheme into a concrete algorithm lies in the reformulation—more concretely, in how to forbid exactly one plan while at the same time preserving every other plan. Refer now to Definition 2 of
Soundness and completeness of an exemplary scheme, given some plan forbidding reformulation, will now be demonstrated. Construction of a specific exemplary reformulation will be presented herein below.
Consider now Theorem 1, I
By way of proof, let P be the set of plans returned by the algorithm, π1 . . . πm be the ordering in which the plans were found and let Π1 . . . Πm be the sequence of task reformulations constructed by the algorithm such that πi is the optimal plan found for Πi. Then cost(π1)≤cost(π2)≤ . . . ≤cost(πm). If there exists a plan π for Π such that cost(π)<cost(πi) for some (assume without loss of generality smallest such) i, and π≠πj for j<i, then from Definition 2, there exists a plan π′ for Πi such that r(π′)=π and cost(π′)=cost(π)<cost(πi), contradicting the optimality of the plan πi for Πi. If m<k, then the planning task Πm+1 is unsolvable, and therefore no other solution exists for Πm and thus for Π.
Theorem 1 opens the door to a novel family of algorithms for top-k planning. Yet, what is missing is to provide a concrete plan forbidding reformulation Ππ− for planning task Π and a plan π∈PΠ. As mentioned earlier the idea here is that planning task Ππ− forbids the sequence of actions π from being a plan, accepting all other plans of Π.
Refer now to Definition 3 of
In the following Theorem 2, it will be demonstrated that the planning task in Definitions 3 is indeed a plan-forbidding reformulation. In this regard, let Π be a planning task and π be its plan. The task Ππ− is a plan forbidding reformulation of Π and π.
By way of proof, let r:O1→O be the mapping defined by r(oe)=o and r(o1)=r(o2)=r(oi3)=o for all 1≤i≤n. Note that Ππ− restricted to the variables V equals to the task Π, modulo the three equal instances of the actions in π. Thus, for each plan π′ for Ππ−, r(π) is a plan for Π.
Still continuing the proof, for the second direction, since for each o∈π at most one of the actions o1, o2, o3 is applicable in each state s of Ππ−, given a sequence of actions ρ applicable in the initial state of Π, it can be mapped to an applicable in the initial state of Ππ− sequence of action ρ′ such that r(ρ′)=ρ, by choosing in each state the relevant representative out of oe, o1, o2, and o3. In other words, r restricted to applicable in the initial state sequences of actions is invertible, and it is thus appropriate to denote its inverse mapping described above by r−1.
Further continuing with the proof, first, let π′=r−1(π) be the inverse of the plan π=o1 . . . on for Π. Then π′=o13 . . . on3, since at step i we have
Yet further continuing with the proof, now, let ρ be a plan for Π such that ρ≠π. Let o be the first action on ρ that differs from the corresponding action of π. In other words, there exists a prefix ρ′=o1 . . . om of ρ such that (i) ρ′o is a prefix of ρ, (ii) ρ′ is a prefix of π, and (iii) ρ′o is not a prefix of π. Then we have r−1(ρ′)=o13 . . . om3, and since o≠om+1, the next action on r−1(ρ) will not be om+13. If o∈π, then the next action will be o2 (applicability of which is shown next), and otherwise it will be oe, in both cases setting the value of
The proof can be finalized by showing the applicability of o2 in the state sm′:=s0′[[o13 . . . om3]] for o∈π such that o≠Om+1. Naturally, pre(o) holds in sm′. Further, since s0′[
Devising Additional Plans
Consider now devising additional plans. The top-k planning approach disclosed above reformulates a planning task of a solvable top-k planning instance exactly k times. While in each iteration, the reformulated planning task grows only linearly in the plan size, for larger k, such an approach is prohibitively expensive for anything but small tasks. Consider now how this problem can be bypassed. Given an optimal plan π for Π, it is often possible to infer additional optimal plans for Π from the structure of the planning task Π. One or more embodiments forbid, in each iteration, a set of plans instead of a single plan, decreasing the number of reformulations needed. Before introducing an algorithm for this approach, focus will be turned to characteristics of a graph G(P) representing such a set of plans.
First, given two plans π1 and π2, if these plans intersect, i.e., pass through the same state s, then additional plans may be devised out of these two by following one of the plans until the state s and the other plan from the state s onwards. In general, a set of plans P induces a directed graph G(P) over the states of Π with edges annotated by the actions on the plans. Each path in G(P) from the initial state to some goal state is a plan for Π. Formally, G(P)=(N, E), where N={s∈S|o1 . . . on∈P, s=s0[[o1 . . . oi]], 0≤i≤n} are all the states encountered by the plans in P and E={(s,t)|s,t∈S, o1 . . . on∈P, s=s0[[o1 . . . oi−1]], t=s[[oi]], 1≤i≤n} its edges. Each edge (s, t) is labelled with the action o∈π∈P inducing it.
G(P) can be viewed as a compact representation for a set of plans P of a planning task Π. Hence, often more plans are represented by G(P) as compared to P. Proof is now provided regarding the correspondence of paths in G(P) and plans for Π. Consider Lemma 1. Let Π be a planning task and P be a set of plans for Π. Then, any path in G(P) from s0 to some goal state of Π corresponds to a plan for Π. By way of proof, let s0, s1, . . . , sn with sn∈Ss* be some path in G(P). Each edge (si−1, si) corresponds to some action oi on a plan in P, and thus oi is applicable in si−1, giving o1 . . . on being a plan for Π.
Consider now Theorem 3. Let Π be a planning task and P be a set of optimal plans for Π. Then, any path in G(P) from s0 to some goal state of Π corresponds to an optimal plan for Π.
By way of proof, let s0, s1, . . . , sn with sn∈Ss* be some path in G(P). From Lemma 1 we have that it corresponds to some plan o1 . . . on for Π, where each edge (si−1, si) corresponds to an action oi on some optimal plan in P. Therefore, h*(si−1)=h*(si)+cost(oi) or cost(oi)=h*(si−1)−h*(si). Summing over the actions in the plan, obtain:
Σi=1ncost(oi)=Σi=1nh*(si−1)−h*(si)=h*(s0).
If not all plans in P are optimal, plans may be obtained from G(P) with costs larger than of any plan in P. A simple example for that is described in
Partial Orders on Plans
Regarding Partial Orders on Plans, one simple way to derive additional plans from an existing one is by reordering the actions along the plan. A sequential plan corresponds to a total order over the actions in the plan. It can be reduced to a partial order, which corresponds to multiple total orders, and thus to multiple plans. A minimal partial order can be obtained in polynomial time. Refer, e.g., to Backstrom, C., Computational aspects of reordering plans. Journal of Artificial Intelligence Research 9:99-137 (1998), the complete disclosure of which is hereby expressly incorporate herein by reference in its entirety for all purposes. Given the teachings herein, the skilled artisan will be able to implement one or more embodiments by adapting techniques, such as that disclosed in Backstrom, known in themselves to the skilled artisan. The suggested procedure greedily attempts to remove an ordering between two plan actions, while maintaining a valid partial order plan (a partial order plan is valid if all its total order plans are valid). However, it is not clear in which order this ordering should be considered for removal, and thus particular implementations may vary significantly in their performance.
In what follows, a slightly different approach is suggested, exploiting the notion of independence between actions (refer to Wehrle, M. and Helmert, M., “About partial order reduction in planning and computer aided verification,” in ICAPS 2012). As used herein, two actions are said to be independent if one action does not invalidate application of another action. For example, suppose an industrial robot has left and right grippers which can operate simultaneously—picking up one ball with the left gripper does not prevent picking up another ball with the right gripper—the two actions are accordingly independent and can be applied in any order. On the other hand, assuming that the gripper only opens wide enough to grasp one ball, picking up one ball with the right gripper prevents picking up another ball at the same time with the right gripper, and thus, those two actions are not independent. The procedure simply follows the order of the actions in the plan, gathering (pairwise) independent actions into the set as long as possible. A new set is started every time a non-independent action is met. In what follows, this procedure is referred to as Indep. The complexity of this procedure is exponential in the size of the largest independent set of actions.
Note that some other valid plan reorderings, such as pick(b3, L)pick(b4, R)move(A, B)drop(b3, L)drop(b4, R)move(B, A) pick(b1, L)pick(b2, R)move(A, B)drop(b1, L)drop(b2, R) are not obtained this way. In order to obtain all possible reorderings of a plan, one can use, e.g., a traversal procedure. In such a case, for a set P of partial order plans, the graph G(P) is induced by possible sequentializations of the plans in P. Note that this can be exponential in the plan length and thus might turn out too expensive in practice. With interest in a bounded number of solutions, which might be significantly smaller than the number of valid reorderings (e.g., in GRIPPER domain), a depth first search traversal without duplicate detection is chosen in a non-limiting example. The algorithm is bound to apply each of the actions on the plan exactly once, and therefore complete. In addition, a cycle detection is performed on each path. The number of times the algorithm has reached the goal is then used in the stopping criteria. In what follows, this procedure is referred to as Naive.
Symmetric Plans
Consider symmetric plans. One limitation of deriving plans based on reducing orders between actions is the restriction to the actions of the original plan. In what follows, it is shown how such a restriction can be alleviated. An additional way of deriving plans from already existing plans is by extending the graph G(P), adding its symmetric counterparts in the state transition graph. This can be done using structural symmetries, which are permutations of facts and actions that induce automorphisms of the state transition graph. Structural symmetries for SAS+ are defined in Definition 4 of
We extend structural symmetries to sequences of actions in a natural way. Let σ be a structural symmetry that stabilizes the initial state s0. Then, for a plan π of Π we have σ(π) being a plan of Π with cost(σ(π))=cost(π). By PΓ denote the closure of P under Γ, i.e., PΓ={σ(π)|σ∈Γ, π∈P}.
Consider now Theorem 4. Let Π be a planning task, Γ be a symmetry group of Π and P be a set of Π's plans. If P is a solution to the top-|P| planning problem, then pΓ is a solution to the top-|PΓ| planning problem.
By way of proof, let π∈PΓ be some plan for Π. Since Γ is a group, there exists σ∈Γ such that σ(π)∈P. Since P is a solution to the top-|P| planning problem, if there exists a plan π′ for Π with cost(π′)<cost(π)=cost(σ(π)), then π′∈P and thus π′∈PΓ.
Similarly, but more generally, define the closure of a graph G=(N, E) under Γ as a graph GΓ=(N′, E′), where N′=NΓ={σ(n)|σ∈Γ, n∈N} the closure of N under Γ and E′={(σ(n), σ(n′))|σ∈Γ, (n, n′)∈E}.
Now consider Theorem 5. Let Π be a planning task, Γ be a symmetry group of Π and P be a set of Π's plans. Then G(P)Γ=G(PΓ).
By way of proof, first, show that G(P)Γ⊆G(PΓ). Let (u, v) be some edge in G(P)Γ. Thus u=σ(u′) and v=σ(v′) for some σ∈Γ and edge (u′, v′)∈G(P). Let π′∈P be some plan that traverses the edge (u′, v′). Then π=σ(π′) is a plan, and it traverses (u, v). Further, π is in PΓ, and thus (u, v)∈G(PΓ). For the other direction, let (u, v) be some edge in G(PΓ). Then, (u, v) is traversed by some plan π∈PΓ. Thus, there exist σ∈Γ and π′∈P such that π=σ(π′). Thus, (σ−1(u), σ−1(v)) is traversed by the plan π′, giving us (σ−1(u), σ−1(v))∈G(P). Therefore, by the definition of G(P)Γ we have (u, v)∈G(P)Γ.
Theorems 4 and 5 above allow safely extending the graph G(P) with symmetries by taking its closure under the symmetries that stabilize the initial state. That way, methods extending a set of plans can include a reduction of plan actions order or a symmetry based extension or both.
Repeatedly Forbidding Multiple Plans
Consider repeatedly forbidding multiple plans. Having introduced the graph G(P) as compact representation of a set of plans P and having clarified how to extract plans from G(P), a reformulation is now devised that forbids all plans represented by G(P). Refer to Definition 5 of
The planning task of ΠG− forbids all sequences of actions π∈G from being a plan, accepting all other plans of Π. Similarly to the case of a single plan, the variable
Theorem 6 is now introduced. Let Π be a planning task, P be some set of plans, and G:=G(P)=(N, E). The task ΠG− is a G-forbidding reformulation of Π.
By way of proof, let r:O′→O be the mapping defined by r(oe)=o and r(o1)=r(o2)=r(o3)=o. Note that ΠG− restricted to the variables V equals to the task Π, modulo the three equal instances of the actions in G. Thus, for each plan π for ΠG−, r(π) is a plan for Π.
Continuing the proof, for the second direction, since for each o∈G at most one of the actions o1, o2, o3 is applicable in each state s of ΠG−, given a sequence of actions ρ applicable in the initial state of Π, it can be mapped to an applicable in the initial state of ΠG− sequence of actions ρ′ such that r(ρ′)=ρ, by choosing in each state the relevant representative out of oe, o1, o2, and o3. In other words, r restricted to applicable in the initial state sequences of actions is invertible, and its inverse mapping described above is denoted by r−1.
Further continuing the proof, first, let π=o1 . . . on be some plan in G and let π′=r−1(π) be the inverse of π. Then, π′=s′0o13s1 . . . sn−1on3sn, since at step i we have
The proof is finalized by showing the applicability of o2 in the state s′m:=s′0[[o13 . . . o′e]] for o∈G such that o does not correspond to any edge (sm, t). Naturally, pre(o) holds in s′m. Further, since s′0[
The exemplary I
Experimental Evaluation
An experimental evaluation was carried out. In particular, in order to empirically evaluate the feasibility of an exemplary approach to finding top-k plans, according to an aspect of the invention, the iterative algorithm depicted in
To measure the effect of various techniques for extending the set of existing plans the extension by symmetry was switched on and off (adding “S” to the configuration name if symmetry is switched on), and the two aforementioned approaches for plan reordering (Indep and Naive) were experimented with, as well as not reordering at all (None), giving in total six configurations for the iterative approach (None, Indep, Naïve, NoneS, IndepS, NaiveS) and two configurations for the K* approach (K*-blind, K*-iPDB). The experiments were performed with a large k value, namely k=10000, aiming at checking the feasibility of the suggested approaches for finding a large set of plans.
For a given task and a natural number k, the k-coverage is a value in {0, 1} assigning the value 1 if a solution to the top-k planning problem was found (or proven unsolvable), according to Definition 1, and 0 otherwise. In order to measure the effect of the number of required plans k, the k-coverage was computed for any value of k in [1, 10000], without rerunning the experiments for that value of k. A small value of k=10 was also experimented with, obtaining similar results for all configurations. Note that for the iterative configurations, there are only up to 10 tasks for each configuration that fail on memory, with most failures being due to timeouts. For K* based configurations, the opposite is true, with 12 and 68 timeouts for blind heuristic and iPDB, respectively.
The table of
First, looking at the rightmost part, corresponding to k=10000, note that there is no clear advantage to either of the approaches across the domains. K* achieves better performance in 23 domains out of 57, while the iterative approach performs better in 28 domains. Further, there is often a large difference in coverage between the two approaches, to one side and to another, making them complementary. Within each approach, there is a clear advantage to one of the configurations. For the iterative approach, with the exception of the MICONIC domain, NaiveS performs at least as good as IndepS, performing strictly better in 37 domains. This dominance is preserved for smaller k values, with strict dominance in 39 domains for k=1000, in 25 domains for k=100, and 10 for k=10. NaiveS loses to IndepS only in the MICONIC domain, for k>10. For the K* based approach, there are two domains where the blind search performs better than iPDB, namely AIRPORT and TETRIS, and performs strictly worse in 10 domains. Note that there are 45 domains with equal k-coverage for the two K* based approaches.
Moving on to smaller k values, note that for k=1000 the dominance shifts further towards the iterative approach, with 34 domains vs. 17 domains for K*. For k=100 it becomes 43 domains vs. 10 domains. For k=10, the iterative approach always performs at least as good as K*, achieving better performance on 54 out of 57 domains.
Looking at some non-IPC domains, note that these were modelled with planner efficiency in mind. For the iterative approach, the number of plans found and forbidden per iteration is typically 1, and therefore the number of plans found within the time and memory restrictions is typically low. K*, on the other hand, even with the blind heuristic performs extremely well on these domains, solving all tasks for k=10000 in all but the risk management domain. On this domain, it finds all 10000 requested top plans in 133 out of 200 tasks, failing to find any plans on the other 67 tasks.
One or more embodiments thus provide a novel approach to the problem of top-k planning, based on iterative computation of optimal solutions, exploiting existing optimal planners. Two exemplary techniques for deriving additional solutions from previously found ones are disclosed. To empirically evaluate the feasibility of one or more embodiments, an experiment implemented an existing approach to top-k planning, K*, on top of a state-of-the-art planner. These techniques are complementary in their performance, with K* being more beneficial for extremely large values of k.
One or more embodiments assume an artificial intelligence (AI) planning problem is given including of a set of actions, initial state and a goal condition. Given the planning problem, one or more embodiments generate a set of top-k plans. Further, one or more embodiments employ a linear cost metric and have algorithms to find the optimal plan, or more specifically top-k plans based on this metric. In addition, at least some embodiments use techniques other than hierarchical clustering techniques on the already existing plans in the database to formulate or derive a new plan. One or more techniques described herein can be used for the hypothesis generation problem, as well as many other applications. In at least some embodiments, rather than finding a representative set of plans that are diverse from each other, top-k plans are computed based on some notion of quality of plans. In particular, one or more embodiments provide a formulation of the top-k planning problem for cost-optimal planning. The top-k planning problem is defined as the problem of finding a set of k distinct plans with lowest cost. This set can contain both optimal plans and near-optimal plans, depending on k, and, by definition, for each plan in this set all valid plans of lower cost must also be in the set.
Recapitulation
Given the discussion thus far, and referring generally to
It will be appreciated that the exemplary method provides a method for top-k planning and a method that when executed by at least one hardware processor solving a top-k planning problem, inherently improves the performance (of a software agent carrying out the planning and thus of a processor running same), as demonstrated by
In one or more embodiments, the at least one solution found includes the optimal solution, and/or the at least one solution forbidden includes the optimal solution.
In one or more embodiments, the method further includes, for the first iteration and each of the additional iterations, extending the obtained optimal solution to an extended set of solutions including the optimal solution, as per step 303. The modifying of the planning problem to forbid thus includes modifying the planning problem to forbid the extended set of solutions.
Aspects of the invention can be used in many different scenarios. One example is control of industrial robots or the like. Thus, in one or more embodiments, plans are used for task planning for robots. The skilled artisan will appreciate that for a robot to pick up a cup from a table, several micro-actions (e.g., joint and motor movements) will typically need to be performed. In one or more embodiments, planning is not carried out at the level of joint and motor movements, but rather on the level of macro-actions such as “move from Point A to Point B”; “use the arm to pick up object Z”; and the like. The robot is provided with high level plan generated using aspects of the invention and the robot then translates that plan into micro-actions. Reference is made to Torsten Jandt et al., “b-it-bots RoboCup@Work Team Description Paper,” 20th RoboCup International Symposium, Leipzig, Jun. 30-Jul. 4, 2016, the complete disclosure of which is hereby expressly incorporated herein by reference in its entirety for all purposes. As disclosed therein, the existing finite state machines (FSMs) are refactored to very small and clear state machines covering only basic actions, such as move-to-location, perceive-object, grasp-object or place-object. For a particular task, the planner then generates a sequence of those actions in order to achieve the overall goal. The plan is executed and monitored. In case of a failure during one of the actions, replanning is triggered and a new plan is generated based on the current information available in the knowledge base.
Significantly, the use of top-k plans is highly advantageous in real-world/non-deterministic applications. For example, suppose a robot tries to place shielding material to stop a leak at an industrial accident scene. Suppose the first plan employed calls for the robot to move along a certain path, but once the robot is on-site, it is discovered that this path is blocked and the blockage cannot readily be removed by the robot. The robot can now switch to a different one of the top k plans, which does not require traversing the blocked path. Thus, in some instances, in the step of obtaining the specification of the planning problem in the planning language, the specification specifies a problem in automated control of an industrial robot, and the method further includes operating the industrial robot in accordance with the k solutions to the planning problem.
In one or more embodiments, the solutions are formulated as action sequences implemented by state machines covering basic actions. In some such embodiments, an additional step includes ceasing a first one of the k solutions upon unfeasibility and implementing another of the k solutions in response to the unfeasibility. This is especially useful when the industrial robot operates in a non-deterministic environment, i.e., where it cannot be known a priori that a given plan is feasible due, e.g., to unforeseen conditions (say, robot's path blocked by debris).
Various techniques can be used to extend the obtained optimal solution. In some cases, this is accomplished by re-ordering the actions in the plan (i.e. same actions in a different order); there are several ways to accomplish this (e.g., “Indep.” and “Naive”). Accordingly, in some instances, the extending of the obtained (e.g., optimal) solution to the extended set of solutions includes re-ordering by: following an order of operators in the obtained optimal solution; pairwise gathering independent ones of the operators into the set as long as possible; and starting a new set whenever a non-independent one of the operators is met.
In some cases, structural symmetry is employed to obtain different plans with different actions. Accordingly, in some instances, the extending of the obtained optimal solution to the extended set of solutions includes adding to the extended set of solutions new set members symmetric to already existing set members. The set members symmetric to the already existing set members include set members resulting from mapping the existing set members with structural symmetries.
Regarding the forbidding aspect, in one or more embodiments, it is ensured that if the plan it is desired to forbid is followed, the goal state is not achieved. That is, if the sequence of actions (and only the sequence of actions) in the plan to be forbidden is followed, the end result will not be the goal state. In essence, the system is “tricked”—the reformulation is a new planning task in which there are additional or modified actions/variables. It is now necessary to deviate from the plan to be forbidden in order to end up in the goal state. Thus, in some instances, the step of modifying to forbid, in the first iteration and the plurality of additional iterations, includes reformulation such that following a given solution to be forbidden does not result in reaching a desired goal state.
In some cases, the step of obtaining the optimal solution to the planning problem is carried out with two or more different planning routines in different iterations.
In another aspect, an exemplary computer system (e.g., for controlling an industrial robot by solving a top-k planning problem) includes a memory; an interface 1899 (discussed below) to the industrial robot; and at least one processor, coupled to the memory and the interface, and operative to carry out or otherwise facilitate any one, some, or all of the method steps disclosed herein. Once the top-h plans are obtained, the at least one processor is operative to provide a signal to the interface to cause the industrial robot to operate in accordance with the k solutions to the planning problem. In one or more embodiments, the interface is provided to a robot controlled by action sequences implemented by state machines covering basic actions, such that the top-k solutions are formulated as action sequences implemented by the state machines covering the basic actions.
Advantageously, in at least some instances, the at least one processor is further operative to cause ceasing of a first one of the k solutions upon unfeasibility and implementation another of the k solutions in response to the unfeasibility.
Thus, finding the top-k plans using embodiments of the invention improves the performance of the industrial robot; for example, by providing back-up plans when a primary plan is not feasible, as discussed elsewhere herein.
Exemplary System
As will be appreciated by one skilled in the art, and as discussed in detail elsewhere herein, aspects of the present invention may be embodied as a system, method or computer program product. Accordingly, aspects of the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment (including firmware, resident software, micro-code, etc.) or an embodiment combining software and hardware aspects.
One or more embodiments of the invention, or elements thereof, can be implemented in the form of an apparatus including a memory and at least one processor that is coupled to the memory and operative to perform exemplary method steps.
One or more embodiments can make use of software running on a processor of a robot, robot controller, and/or general purpose computer or workstation. With reference to
Accordingly, computer software including instructions or code for performing the methodologies of the invention, as described herein, may be stored in one or more of the associated memory devices (for example, ROM, fixed or removable memory) and, when ready to be utilized, loaded in part or in whole (for example, into RAM) and implemented by a CPU. Such software could include, but is not limited to, firmware, resident software, microcode, and the like.
A data processing system suitable for storing and/or executing program code will include at least one processor 1802 coupled directly or indirectly to memory elements 1804 through a system bus 1810. The memory elements can include local memory employed during actual implementation of the program code, bulk storage, and cache memories which provide temporary storage of at least some program code in order to reduce the number of times code must be retrieved from bulk storage during implementation.
Input/output or I/O devices (including but not limited to keyboards 1808, displays 1806, pointing devices, and the like) can be coupled to the system either directly (such as via bus 1810) or through intervening I/O controllers (omitted for clarity).
Network adapters such as network interface 1814 may also be coupled to the system to enable the data processing system to become coupled to other data processing systems or remote printers or storage devices through intervening private or public networks. Modems, cable modem and Ethernet cards are just a few of the currently available types of network adapters.
As used herein, including the claims, a “server” includes a physical data processing system (for example, system 1812 as shown in
As noted above, aspects of the invention can be used in many different scenarios; one non-limiting example is control of industrial robots or the like (e.g., robot 1897). Reference is again made to the Torsten Jandt et al. paper “b-it-bots RoboCup@Work Team Description Paper.” The robot 1897, in addition to limbs, effectors (e.g. grippers or the like), and so on, includes minimalist finite state machines (FSMs) 1893 wherein FSMs are refactored to very small and clear state machines covering only basic actions, such as move-to-location, perceive-object, grasp-object or place-object. For a particular task, the planner 1895 then generates a sequence of those actions in order to achieve the overall goal. These minimalist FSMs are, in essence, a description of the capabilities of the limbs, effectors, or the like. Typically, in the field of robotics, a single very large FSM is created, which encodes all the robot's possible behaviors. In order to use a planner instead of such a very large FSM, one or more embodiments factor the large FSM into smaller FSMs that correspond to individual actions. In this way, a planner can be used to find the actual behavior, using, e.g., top-k planning techniques disclosed herein.
Note that system 1812 communicates with robot 1897 via interface 1899 (e.g. wired such as USB and/or wireless such as Bluetooth). Functionality can be as described (e.g. find top-k plans on system 1812 and provide to robot 1897 via interface 1899) or can be different; for example, some or all of the top-k planning could be done on the robot 1897.
It should be noted that any of the methods described herein can include an additional step of providing a system comprising distinct software modules embodied on a computer readable storage medium; the modules can include, for example, any or all of the elements depicted in the block diagrams and/or described herein. For example, referring again to
In any case, it should be understood that the components illustrated herein may be implemented in various forms of hardware, software, or combinations thereof; for example, application specific integrated circuit(s) (ASICS), functional circuitry, one or more appropriately programmed general purpose digital computers with associated memory, and the like. Given the teachings of the invention provided herein, one of ordinary skill in the related art will be able to contemplate other implementations of the components of the invention.
Computer Program Products
The present invention may be a system, a method, and/or a computer program product at any possible technical detail level of integration. The computer program product may include a computer readable storage medium (or media) having computer readable program instructions thereon for causing a processor to carry out aspects of the present invention.
The computer readable storage medium can be a tangible device that can retain and store instructions for use by an instruction execution device. The computer readable storage medium may be, for example, but is not limited to, an electronic storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination of the foregoing. A non-exhaustive list of more specific examples of the computer readable storage medium includes the following: a portable computer diskette, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or Flash memory), a static random access memory (SRAM), a portable compact disc read-only memory (CD-ROM), a digital versatile disk (DVD), a memory stick, a floppy disk, a mechanically encoded device such as punch-cards or raised structures in a groove having instructions recorded thereon, and any suitable combination of the foregoing. A computer readable storage medium, as used herein, is not to be construed as being transitory signals per se, such as radio waves or other freely propagating electromagnetic waves, electromagnetic waves propagating through a waveguide or other transmission media (e.g., light pulses passing through a fiber-optic cable), or electrical signals transmitted through a wire.
Computer readable program instructions described herein can be downloaded to respective computing/processing devices from a computer readable storage medium or to an external computer or external storage device via a network, for example, the Internet, a local area network, a wide area network and/or a wireless network. The network may comprise copper transmission cables, optical transmission fibers, wireless transmission, routers, firewalls, switches, gateway computers and/or edge servers. A network adapter card or network interface in each computing/processing device receives computer readable program instructions from the network and forwards the computer readable program instructions for storage in a computer readable storage medium within the respective computing/processing device.
Computer readable program instructions for carrying out operations of the present invention may be assembler instructions, instruction-set-architecture (ISA) instructions, machine instructions, machine dependent instructions, microcode, firmware instructions, state-setting data, configuration data for integrated circuitry, or either source code or object code written in any combination of one or more programming languages, including an object oriented programming language such as Smalltalk, C++, or the like, and procedural programming languages, such as the “C” programming language or similar programming languages. The computer readable program instructions may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the latter scenario, the remote computer may be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or the connection may be made to an external computer (for example, through the Internet using an Internet Service Provider). In some embodiments, electronic circuitry including, for example, programmable logic circuitry, field-programmable gate arrays (FPGA), or programmable logic arrays (PLA) may execute the computer readable program instructions by utilizing state information of the computer readable program instructions to personalize the electronic circuitry, in order to perform aspects of the present invention.
Aspects of the present invention are described herein with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and/or block diagrams, and combinations of blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer readable program instructions.
These computer readable program instructions may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions/acts specified in the flowchart and/or block diagram block or blocks. These computer readable program instructions may also be stored in a computer readable storage medium that can direct a computer, a programmable data processing apparatus, and/or other devices to function in a particular manner, such that the computer readable storage medium having instructions stored therein comprises an article of manufacture including instructions which implement aspects of the function/act specified in the flowchart and/or block diagram block or blocks.
The computer readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other device to cause a series of operational steps to be performed on the computer, other programmable apparatus or other device to produce a computer implemented process, such that the instructions which execute on the computer, other programmable apparatus, or other device implement the functions/acts specified in the flowchart and/or block diagram block or blocks.
The flowchart and block diagrams in the Figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of the present invention. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of instructions, which comprises one or more executable instructions for implementing the specified logical function(s). In some alternative implementations, the functions noted in the blocks may occur out of the order noted in the Figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems that perform the specified functions or acts or carry out combinations of special purpose hardware and computer instructions.
The descriptions of the various embodiments of the present invention have been presented for purposes of illustration, but are not intended to be exhaustive or limited to the embodiments disclosed. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The terminology used herein was chosen to best explain the principles of the embodiments, the practical application or technical improvement over technologies found in the marketplace, or to enable others of ordinary skill in the art to understand the embodiments disclosed herein.
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| Number | Date | Country | |
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| 20190340525 A1 | Nov 2019 | US |
