Session XV: A/D Conversion, "A 10b 20MH.sub.z Two-Step Parallel ADC With Internal S/H", Toshihiko Shimizu, et al., ISSCC 88, Feb. 19, 1988, Digest of Technical Papers, pp. 224-225. |
Session 2: Data Conversion, "A 10b 50MS/s Pipelined ADC" Pieter Vorenkamp, et al., ISSCC 92, 1992 IEEE International Solid-State Circuits Conference, pp. 32-33. |
"An 8-bit Video ADC Incorporating Folding and Interpolation Techniques", Rob E.J. Van De Grift, et al., IEEE Journal of Solid-State Circuits, vol. SC-22, No. 6, Dec. 1987, pp. 944-953. |