Patent Application
20230389159
This disclosure is directed to the field of light emitting diode (LED) driving and, in particular, to a driver chip for driving LEDs that includes fault detection circuitry that can determine the presence of a short between adjacent output pins and the presence of a short between an output pin and ground.
A driver chip may be used to drive an array of light emitting diodes (LEDs) divided into strings to form an LED lighting system. A sample known LED lighting system 1 is now described with reference to
At the time of fabrication, it is desired to verify proper operation of the LED lighting system 1. For example, it is desired to verify that pins of active drivers 4(0), . . . , 4(n) are not shorted together during operation, and it is desired to verify that pins of active drivers 4(0), . . . , 4(n) are not shorted to ground.
Prior art ways of addressing this utilize test equipment that connects external components to the LED lighting system in order to detect these faults or utilize visual inspection to detect these faults. This adds time and complexity to fabrication and manufacture. Therefore, so as to ease and quicken the process of detecting faults in an LED lighting system, further development is still required.
Disclosed herein is a light emitting diode (LED) lighting system, including a plurality of strings of LEDs and an LED driver chip with a plurality of driver circuits, each being coupled to a different one of the plurality of strings of LEDs via a respective pin. Each of the plurality of driver circuits includes a fault detection circuit for that driver circuit, and each fault detection circuit includes a force circuit including a current sourcing circuit configured to source a forcing current to a force output node. Each fault detection circuit also includes a sense circuit, with each sense circuit having a current sensor coupled to the force output node, and a comparator configured to compare a voltage at the force output node to a reference voltage and generate a comparison output based thereupon. Control circuitry is configured to, in a pin to pin short detection mode, activate the force circuit of a first given one of the plurality of driver circuits and activate the sense circuit of a second given one of the plurality of driver circuits. If the comparison output of the comparator of the activated sense circuit indicates that the voltage at its force output node is greater than the reference voltage, presence of a short between the respective pin for the first given one of the plurality of driver circuits and the respective pin for the second given one of the plurality of driver circuits is indicated.
The control circuitry may be further configured to, in a pin to ground short detection mode, activate the force circuit and sense circuit of a given one of the plurality of driver circuits. If the comparison output of the comparator of the given one of the plurality of driver circuits indicates that the voltage at the force output node is less than the reference voltage, presence of a short between the pin for the respective given one of the plurality of driver circuits and ground is determined.
The current sensor may be a resistor connected between the force output node and ground.
The comparator may have a non-inverting terminal coupled to the force output node and an inverting terminal coupled to the reference voltage.
The current sourcing circuit may include a current mirror having an input coupled to a current source sinking a mirror current and an output at which the forcing circuit is sourced as being a scaled version of the mirror current.
Each of the plurality of strings of LEDs may include a plurality of LEDs connected in series between an LED supply voltage node and the pin associated with that one of the plurality of strings of LEDs.
Also disclosed herein is a method of self-testing an LED driver chip for faults, the method including steps of: a) setting n to an initial value; b) activating a force circuit in a fault detection circuit to thereby source a force current to a force output node associated with an n−1th given one of a plurality of fault detection circuits within the LED driver chip; c) activating a sense circuit in a fault detection circuit, the sense circuit being connected to a force output node associated with the nth given one of the plurality of fault detection circuits; and d) determining presence of a short between respective output pins associated with the nth given one of the plurality of LED driver circuits and the n−1th given one of the plurality of LED driver circuits. Step d) is performed by: converting current through the force output node associated with the nth given one of the plurality of LED driver circuits to a sensed voltage; comparing the sensed voltage to a reference voltage; and determining the presence of the short if the sense voltage is greater than the reference voltage. The method also includes step e) if n is less than a total number of the plurality of LED driver circuits within the LED driver chip, iterating n and returning to b).
The force current may be sourced to the force output node associated with the n−1th given one of the plurality of fault detection circuits by causing a multiplexer associated with the force circuit to connect the force current to the force output node associated with the n−1th given one of the plurality of fault detection circuits. The sense circuit may be connected to the force output node associated with the nth given one of the plurality of fault detection circuits by causing a de-multiplexer associated with the sense circuit to connect the sense circuit to the force output node associated with the nth given one of the plurality of fault detection circuits.
Step b) may include activating the force circuit in the fault detection circuit of the n−1th given one of a plurality of LED driver circuits within the LED driver chip to thereby source the force current to the force output node associated with the n−1th given one of the plurality of fault detection circuits. Step c) may include activating a sense circuit in a fault detection circuit of the nth given one of the plurality of LED driver circuits within the LED driver chip, the sense circuit being connected to the force output node associated with the nth given one of the plurality of fault detection circuits.
The method may further include steps of: f) setting m to an initial value; g) causing the force circuit to source a force current to a force output node associated with an mth given one of the plurality of LED driver circuits within the LED driver chip; h) connecting the sense circuit to the force output node of the mth given one of the plurality of LED driver circuits; and i) determining presence of a short between an output pin associated with the mth given one of the plurality of LED driver circuits and ground. Step i) may be performed by: comparing the sensed voltage to a reference voltage; and determining the presence of the short if the sense voltage is less than the reference voltage. The method may also include step j) if m is less than a total number of the LED driver circuits within the LED driver chip, iterating m and returning to g).
Step g) may include activating the force circuit in the fault detection circuit of the mth given one of the plurality of LED driver circuits within the LED driver chip to thereby source the force current to the force output node associated with the mth given one of the plurality of LED driver circuits. Step h) may include activating the sense circuit in the fault detection circuit of the mth given one of the plurality of LED driver circuits within the LED driver chip, the sense circuit connected to the force output node of that mth given one of the plurality of LED driver circuits.
Also disclosed herein is a light emitting diode (LED) lighting system including a plurality of strings of LEDs, and an LED driver chip comprising a plurality of driver circuits, each being coupled to a different one of the plurality of strings of LEDs via a respective pin. A multiplexing circuit has a different respective output connected to each of the plurality of driver circuits, and a de-multiplexing circuit has a different respective input connected to each of the plurality of driver circuits. A fault detection circuit includes a force circuit including a current sourcing circuit configured to source a forcing current to an input of the multiplexing circuit, and a sense circuit. The sense circuit includes a current sensor coupled to an output of the de-multiplexing circuit, and a comparator configured to compare a voltage at the output of the de-multiplexing circuit to a reference voltage and generate a comparison output based thereupon. Control circuitry is configured to, in a pin to pin short detection mode, cause the multiplexing circuit to connect the force circuit to a first given one of the plurality of driver circuits, and cause the de-multiplexing circuit to connect the sense circuit to a second given one of the plurality of driver circuits. If the comparison output of the comparator of the sense circuit indicates that the voltage at the input of the sense circuit is greater than the reference voltage, presence of a short between the respective pin for the first given one of the plurality of driver circuits and the respective pin for the second given one of the plurality of driver circuits is indicated.
The control circuitry may be further configured to, in a pin to ground short detection mode, cause the multiplexing circuit to connect the force circuit to a given one of the plurality of driver circuits, and cause the de-multiplexing circuit to connect the sense circuit to the given one of the plurality of driver circuits. If the comparison output of the comparator indicates that the voltage at the input of the sense circuit is less than the reference voltage, presence of a short between the pin for the respective given one of the plurality of driver circuits and ground may be determined.
The current sensor may be a resistor connected between the input of the sense circuit and ground.
The comparator may have a non-inverting terminal coupled to the input of the sense circuit and an inverting terminal coupled to the reference voltage.
The current sourcing circuit may include a current mirror having an input coupled to a current source sinking a mirror current and its output at which the forcing circuit is sourced as being a scaled version of the mirror current.
The following disclosure enables a person skilled in the art to make and use the subject matter disclosed herein. The general principles described herein may be applied to embodiments and applications other than those detailed above without departing from the spirit and scope of this disclosure. This disclosure is not intended to be limited to the embodiments shown, but is to be accorded the widest scope consistent with the principles and features disclosed or suggested herein. Do note that in the below description, any described resistor or resistance is a discrete device unless the contrary is stated, and is not simply an electrical lead between two points. Thus, any described resistor or resistance coupled between two points has a greater resistance than a lead between those two points would have, and such resistor or resistance cannot be interpreted to be a lead. Similarly, any described capacitor or capacitance is a discrete device unless the contrary is stated, and is not a parasitic unless the contrary is stated. Moreover, any described inductor or inductance is a discrete device unless the contrary is stated, and is not a parasitic unless the contrary is stated.
Disclosed herein with initial reference to
The LED driver chip 11 includes driver circuits 12(0), . . . , 12(n) that are connected to the output pins PIN(0), . . . , PIN(n) to drive the LED strings LED_STRING(0), LED_STRING(n). Each driver circuit 12(0), . . . , 12(n) may be referred to as a “channel”, with driver circuit 12(0) corresponding to channel CH0, driver circuit 12(1) corresponding to channel CH1, and so on until the n−1th driver circuit 12(n−1) corresponds to channel CHn−1 and the nth driver circuit 12(n) corresponds to channel CHn.
Each driver circuit 12(0), . . . , 12(n) has its own dedicated fault detection circuit 13(0), . . . , 13(n). The fault detection circuits 13(0), . . . , 13(n) facilitate the determination of the presence of shorts between pins of active channels CH0, . . . , CHn during operation, and facilitate the determination of the presence of shorts between pins of active channels CH0, . . . , CHn and ground during operation. Since the driver circuits 12(0), . . . , 12(n) are incorporated in the LED driver chip 11, this means that the fault detection circuits 13(0), . . . , 13(n) are incorporated in the LED driver chip 11 and perform fault detection without the use of external equipment and without external inspection.
Further details of the fault detection circuits 13(0), . . . , 13(n) are now given with additional reference to
Each sense circuit 17(0), . . . , 17(n) includes a resistor R connected between the pin PIN(0), . . . , PIN(n) associated with the driver circuit 12(0), . . . , 12(n) in which it resides and ground, with a sense current I_SENSE flowing through the resistor R to ground. Each sense circuit 17(0), . . . , 17(n) has a comparator 18(0), . . . , 18(n) with its non-inverting input terminal connected to the pin PIN(0), . . . , PIN(n) associated with the driver circuit 12(0), . . . , 12(n) in which it resides and with its inverting input terminal coupled to receive a reference voltage V_REF. Each comparator 18(0), . . . , 18(n) outputs a respective comparison voltage OUT_CMP.
It should be appreciated that in the example of
Control circuitry 20 is configured to selectively activate/deactivate the force circuits 14(0), . . . , 14(n) and the sense circuits 17(0), . . . , 17(n) to perform the fault detection operation described below.
Operation of the LED lighting system 10 to perform fault detection is now described with initial reference to
In the illustrated example, detection of shorts between adjacent channels CHn−1 and CHn is performed. To perform this, the force circuit 14(n−1) of the driver circuit 12(n−1) is activated while the sense circuit 17(n) of the driver circuit 12(n) is activated, with the sense circuit 17(n−1) of the driver circuit 12(n−1) and the force circuit 14(n) of the driver circuit 14(n) remaining deactivated. The activation of the force circuit 14(n−1) serves to source the force current I_FORCE to the pin PIN(n−1) associated with the driver circuit 12(n−1).
In the absence of a short between pins PIN(n−1) and PIN(n), since the force circuit 14(n) is deactivated, the magnitude of the current I_SENSE flowing through the resistor R of the sense circuit 17(n) is substantially zero, with the result being that the reference voltage V_REF is greater than the voltage CH_SHORT across the resistor R of the sense circuit 17(n)—therefore, the output OUT_CMP of the comparator 18(n) is deasserted.
This scenario can be observed in the graph of
However, in the illustrated example, there is in fact a short between PIN(n−1) and PIN(n). As such, when the force circuit 14(n−1) is activated, the force current I_FORCE flows out through PIN(n−1), into PIN(n), and through the resistor R of the sense circuit 17(n). As a result, the voltage CH_SHORT across resistor R of the sense circuit 17(n) will be greater than the reference voltage V_REF, and the output OUT_CMP of the comparator 18(n) is asserted.
This scenario can be observed in the graph of
The above technique can be performed to detect a short between any two pins PIN(0), PIN(n) regardless of whether or not those pins are adjacent (although shorts are more likely to occur between adjacent pins). When testing for shorts between the pins PIN(0), . . . , PIN(n) of two of the driver circuits 12(0), . . . , 12(n), it does not matter in which the force circuit 14(0), . . . , 14(n) is activated and in which the sense circuit 17(0), . . . , 17(n) is activated, just that the force circuit 14(0), . . . , 14(n) of one driver circuit 12(0), . . . , 12(n) is activated and the sense circuit 17(0), . . . , 17(n) of another driver circuit 12(0), . . . , 12(n) is activated.
Now, detection of shorts between any one of the pins PIN(0), . . . , PIN(n) and ground is described with reference to
This scenario can be observed in the graph of
In the illustrated example, however, there is a short between PIN(n) and ground. As such, when the force circuit 14(n) is activated, the force current I_FORCE flows to ground through the pin PIN(n), and therefore the sense current I_SENSE remains substantially at zero, with the result being that the voltage V_CH_SHORT across the resistor R of the sense circuit 17(n) remains at ground. The output OUT_CMP of the comparator 18(n) consequently remains deasserted to indicate a short between PINn and ground.
This scenario can be observed in the graph of
The above fault detection hardware and techniques may be utilized in a test mode, for example, to test for shorts between each channel and its adjacent channels, and to test for shorts between each channel and ground. The above fault detection hardware and techniques may also be used during normal operation as a self-test performed immediately before full turn-on of the LED lighting system 10.
As explained above, since the driver circuits 12(0), . . . , 12(n) are incorporated in the LED driver chip 11, the fault detection circuits 13(0), . . . , 13(n) are incorporated in the LED driver chip 11 and perform fault detection without the use of external equipment and without external inspection. In fact, a short may not only indicate a malfunctioning LED driver chip 11, but may damage the lighting final application. In fact, if a short is present, resulting uncontrolled current could destroy the LEDs and the final application or product into which the LED driver chip 11 is soldered at device powerup, so the LED lighting system 10 described herein also eliminates the possibility of damaging the application without usage of test equipment.
Another LED lighting system 10′ is now described with initial reference to
The LED driver chip 11′ includes a s ingle fault detection circuit 13′, as stated, together with a single force circuit 14′ and single sense circuit 17′ as stated. The force circuit 14′ is as described above, with a current mirror 15 that has a current sink 16 connected to its input to sink a mirror current I_MIRROR and provides (sources) a scaled force current I_FORCE at its output. The output of the current mirror 15 is connected to the input of a multiplexer 21 for the force circuit 14′. The multiplexer 21 is controlled by the control circuitry 20.
The sense circuit 17 includes a resistor R connected between the input of de-multiplexer 22 and ground, with a sense current I_SENSE flowing through the resistor R to ground. The sense circuit 17 includes a comparator 18 with its non-inverting input terminal connected to the output of the de-multiplexer 22 and its inverting input terminal coupled to receive the reference voltage V_REF. The comparator 18 outputs a comparison voltage OUT_CMP. The de-multiplexer 22 is controlled by the control circuit 20.
Through proper control of the multiplexer 21 and de-multiplexer 22 by the control circuitry 20, each channel CH0, . . . , CHn can be checked for shorts with its adjacent channel or channels, and each channel CH0, . . . , CHn can be checked for shorts to ground. This enables LED driver chips 11′ with a large number of channels to be provided with this fault detection capability without the consumption of a large amount of excess chip area.
First, the testing of shorts between adjacent channels CH0, . . . , CHn is described with additional reference to
In the example of
Thus, to test for shorts between any two of the channels CH0, . . . , CHn, a switch SF0, . . . , SFn within the multiplexer 21 associated with one of the channels to test is closed, and a switch SS0, . . . , SSn within the de-multiplexer 22 associated with the other of the channels to test is closed, and assertion of OUT_CMP results if a short is present between those two channels.
Now, testing of a short between channels CH0, . . . , CHn and ground is described with reference to
This results in the voltage V_CH_SHORT remaining below the reference voltage V_REF, and OUT_CMP at the output of the comparator 18 remaining deasserted. Note that switch Ssn is also closed, and therefore if the short between the pad for channel CHn and ground is not present, the current will flow from the force circuit 14′ through to the sense circuit 17′ and V_CH_SHORT will rise above V_REF to assert OUT_CMP at the output of the comparator 18. Thus, when performing tests for shorts between the channel and ground, OUT_CMP being asserted indicates a lack of a short.
Thus, to test for shorts between any channel CH0, . . . , CHn and ground, a switch SF0, . . . , SFn within the multiplexer 21 associated with the channel to test is closed, and a switch SS0, . . . , SSn within the de-multiplexer 22 associated with the channel to test is closed, and OUT_CMP remains deasserted if a short is present.
It is clear that modifications and variations may be made to what has been described and illustrated herein, without thereby departing from the scope of this disclosure, as defined in the annexed claims.
While the disclosure has been described with respect to a limited number of embodiments, those skilled in the art, having benefit of this disclosure, will appreciate that other embodiments can be envisioned that do not depart from the scope of the disclosure as disclosed herein. Accordingly, the scope of the disclosure shall be limited only by the attached claims.
