1. Field of the Invention
The present invention relates to a LED driver circuit, and more particularly to a LED driver circuit capable of adjusting the resistance of a LED load in response to variation of a line voltage.
2. Description of the Related Art
Please refer to
The bridge rectifier 110 is used for rectifying an AC power VAC to generate a line voltage VLINE.
The amplifier 120 is used for amplifying the difference of a reference voltage VREF and a feedback signal VFB to generate a gate signal VG, wherein the reference voltage VREF is a DC voltage.
The current sensing resistor 130 is used for generating the feedback signal VFB in response to an output current IO.
The NMOS transistor 140 is used for controlling the output current IO in response to the gate signal VG—the higher the gate signal VG, the larger the output current IO.
The LED load 150, powered by the line voltage VLINE, emits light according to the output current IO—the larger the output current IO, the higher the light intensity.
When in operation, the feedback signal VFB will be regulated at the reference voltage VREF due to negative feedback mechanism of this circuit, and the drain-source voltage VDS of the NMOS transistor 140 will vary with the line voltage VLINE in a way that the output current IO is kept constant. However, when the line voltage VLINE is changed from the lowest level to the highest level of the allowed range—for example, the allowed range is 85V-135V, and the line voltage VLINE is changed from 85V to 135 V—of the prior art LED driver circuit, then the drain-source voltage VDS of the NMOS transistor 140 will increase by 50V, degrading the efficiency of power converted from the line voltage VLINE to the LED load 150, and a large amount of heat will be generated thereby.
In view of the foregoing problems, the present invention proposes a novel LED driver circuit, which is capable of adjusting the resistance of the LED load in response to variation of the line voltage.
The major objective of the present invention is to propose a LED driver circuit capable of adjusting the resistance of a LED load in response to a line voltage.
Another objective of the present invention is to propose a LED driver circuit capable of offering a regulated output current with high efficiency irrespective of the level of a line voltage.
Still another objective of the present invention is to propose a LED driver circuit capable of offering a regulated output current with low heat dissipation in a power transistor irrespective of the level of a line voltage.
To achieve the foregoing objectives of the present invention, a LED driver circuit is proposed, the LED driver circuit including:
a LED load, having a top end, a middle end, and a bottom end, wherein the top end is coupled to a line voltage; and
a variable load device, having a first input end, a second input end, and an output end, wherein the first input end is coupled to the middle end of the LED load for receiving a first current, the second input end is coupled to the bottom end of the LED load for receiving a second current, and the output end is for providing an output current, which equals the sum of the first current and the second current, and wherein the first current will decrease/increase to keep the output current regulated when the second current is caused to increase/decrease by a higher/lower level of the line voltage.
Preferably, the line voltage is generated by a bridge rectifier rectifying an AC power.
In a preferred embodiment, the variable load device includes:
a transistor, having a top terminal, a control terminal, and a bottom terminal, wherein the top terminal is coupled to the first input end for receiving the first current; the control terminal is coupled to a gate voltage, and the bottom terminal, for delivering the first current, is coupled to the second input end;
a current sensing resistor, for transforming the output current to a feedback voltage; and
an amplifier, for amplifying the difference of a reference voltage and the feedback voltage to generate the gate voltage.
In another preferred embodiment, the variable load device includes:
a first transistor, having a first top terminal, a first control terminal, and a first bottom terminal, wherein the first top terminal is coupled to the first input end for receiving the first current; the first control terminal is coupled to a bias voltage, and the first bottom terminal, for delivering the first current, is coupled to the second input end;
a second transistor, having a second top terminal, a second control terminal, and a second bottom terminal, wherein the second top terminal is coupled to the first bottom terminal for receiving the output current; the second control terminal is coupled to a gate voltage, and the second bottom terminal is used for delivering the output current;
a current sensing resistor, for transforming the output current to a feedback voltage; and
an amplifier, for amplifying the difference of a reference voltage and the feedback voltage to generate the gate voltage.
To achieve the foregoing objectives of the present invention, another LED driver circuit is proposed, the LED driver circuit including:
a LED load, having a top end, a plurality of middle ends, and a bottom end, wherein the top end is coupled to a line voltage—preferably generated by a bridge rectifier rectifying an AC power, and the bottom end is coupled to a ground;
a connection circuit, having a control end coupled to a control voltage, and a plurality of connecting ends coupled to the middle ends for adjusting the resistance of the LED load according to the control voltage; and
a voltage divider, having a top end coupled to the line voltage, a middle end for providing the control voltage, and a bottom end coupled to the ground.
To make it easier for our examiner to understand the objective of the invention, its structure, innovative features, and performance, we use preferred embodiments together with the accompanying drawings for the detailed description of the invention.
The present invention will be described in more detail hereinafter with reference to the accompanying drawings that show the preferred embodiments of the invention.
Please refer to
The bridge rectifier 210 is used for rectifying an AC power VAC to generate a line voltage VLINE.
The variable load device 220, having a first input end, a second input end, and an output end, wherein the first input end is used for receiving a first current I1, the second input end is used for receiving a second current I2, and the output end is for providing an output current IO, which equals the sum of the first current I1 and the second current I2. When the second current I2 is caused to increase/decrease by a higher/lower level of the line voltage VLINE, the variable load device 220 will increase/decrease a channel resistance between the first input end and the second input end to decrease/increase the first current I1, so as to keep the output current IO regulated.
The LED load 250, having a top end, a middle end, and a bottom end, wherein the top end is coupled to the line voltage VLINE, the middle end is coupled to the first input end of the variable load device 220, and the bottom end is coupled to the second input end of the variable load device 220.
Please refer to
The NMOS transistor 221 has a drain terminal as a top terminal, a gate terminal as a control terminal, and a source terminal as a bottom terminal, wherein the top terminal is coupled to the first input end for receiving the first current I1; the control terminal is coupled to a gate voltage VG, and the bottom terminal, for delivering the first current I1, is coupled to the second input end.
The current sensing resistor 222 is used for transforming the output current IO to a feedback voltage VFB.
The amplifier 223 is used for amplifying the difference of a reference voltage VREF and the feedback voltage VFB to generate the gate voltage VG.
When in operation, due to the negative feedback architecture, the feedback voltage VFB will follow the reference voltage VREF, making the output current IO regulated and insensitive to variation of the line voltage VLINE. That is, when the line voltage VLINE becomes higher/lower, the output current IO will initially get larger/smaller. However, due to the negative feedback effect, the gate voltage VG will become lower/higher to decrease/increase the first current I1, so as to pull the output current IO back to a constant value.
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The second NMOS transistor 221 has a drain terminal as a second top terminal, a gate terminal as a second control terminal, and a source terminal as a second bottom terminal, wherein the second top terminal is coupled to the second input end and the first NMOS transistor 225 for receiving the output current IO; the second control terminal is coupled to a gate voltage VG, and the second bottom terminal is used for delivering the output current IO.
The current sensing resistor 222 is used for transforming the output current IO to a feedback voltage VFB.
The amplifier 223 is used for amplifying the difference of a reference voltage VREF and the feedback voltage VFB to generate the gate voltage VG.
The first NMOS transistor 225 has a drain terminal as a first top terminal, a gate terminal as a first control terminal, and a source terminal as a first bottom terminal, wherein the first top terminal is coupled to the first input end for receiving the first current I1; the first control terminal is coupled to a bias voltage VB, and the first bottom terminal, for delivering the first current I1, is coupled to the second top terminal of the second NMOS transistor 221 and the second input end.
When in operation, due to the negative feedback architecture, the feedback voltage VFB will follow the reference voltage VREF, making the output current IO regulated and insensitive to variation of the line voltage VLINE. That is, when the line voltage VLINE becomes higher/lower, the output current IO will initially get larger/smaller. However, due to the negative feedback effect, the gate voltage VG will become lower/higher to make the source voltage of the first NMOS transistor 225 to shift higher/lower and therefore causing the gate-source voltage of the first NMOS transistor 225 to decrease/increase. As a result, the first current I1 will decrease/increase to pull the output current IO back to a constant value.
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As the circuit of
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The bridge rectifier 210 is used for rectifying an AC power VAC to generate a line voltage VLINE.
The LED load 250 has a top end, a plurality of middle ends, and a bottom end, wherein the top end is coupled to the line voltage VLINE for receiving a resulted current IO, which is divided into I1 and I2 at the top one of the middle ends, and the bottom end is coupled to the connection circuit 700.
The connection circuit 700 has a control end coupled to a control voltage VX, and a plurality of connecting ends—dividing the connection circuit 700 into a plurality of sectors—coupled to the middle ends for adjusting the resistance of the LED load 250 according to the control voltage VX.
The resistor 710 and the resistor 720 act as a voltage divider, having a top end coupled to the line voltage VLINE, a middle end for providing the control voltage VX, and a bottom end coupled to the ground.
When in operation, the connection circuit 700 will increase/decrease the resistance of the sectors to decrease/increase the current flowing into the connection circuit 700—for example I1—as the control voltage VX gets higher/lower, so as to keep IO regulated.
In conclusion, the LED driver circuit of the present invention is capable of adjusting the resistance of a LED load in response to a line voltage, so as to offer a regulated output current with high efficiency and with low heat dissipation in a power transistor irrespective of the level of a line voltage. Please refer to
While the invention has been described by way of example and in terms of preferred embodiments, it is to be understood that the invention is not limited thereto. To the contrary, it is intended to cover various modifications and similar arrangements and procedures—for example, the transistor 221 or the transistor 225 can be one selected from the group consisting of NMOS transistor, PMOS transistor, bipolar junction transistor, and combination thereof, and the scope of the appended claims therefore should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements and procedures.
In summation of the above description, the present invention herein enhances the performance than the conventional structure and further complies with the patent application requirements and is submitted to the Patent and Trademark Office for review and granting of the commensurate patent rights.