1. Field of the Invention
The present invention relates to an LED (light-emitting diode) driver and, more specifically, to an LED driver with multiple feedback loops.
2. Description of the Related Arts
LEDs are being adopted in a wide variety of electronics applications, for example, architectural lighting, automotive head and tail lights, backlights for liquid crystal display devices, flashlights, etc. Compared to conventional lighting sources such as incandescent lamps and fluorescent lamps, LEDs have significant advantages, including high efficiency, good directionality, color stability, high reliability, long life time, small size, and environmental safety.
LEDs are current-driven devices, and thus regulating the current through the LEDs is an important control technique for LED applications. To drive a large array of LEDs from a direct current (DC) voltage source, DC-DC switching power converters such as a Boost power converter is often used with feedback loops to regulate the LED current.
Fast switching speed is required in the LED driver, because the LED brightness needs to be adjusted at a frequent rate. Fast switching speed is particularly useful for dimming control with pulse-width modulation (PWM), where the LED needs to transition from light or no load to heavy load and vice versa in short time. The speed of an LED driver is a measure of its small-signal performance. Because of the inherent right-half-plane (RHP) zero in the Boost converter, the speed of conventional LED drivers is limited below what most LED applications require.
Current sharing is needed because of parameter variability of LEDs caused by their manufacturing processes. When multiple series-strings of LEDs are connected in parallel, a small mismatch in the forward voltage (VF) of the LEDs can cause large difference in their current brightness. Current sharing has been attempted in a variety of ways. One rudimentary approach is to drive each of the multiple LED strings with a separate power converter. However, the disadvantage of such approach is obviously high component count, high implementation cost, and large size.
Another approach is to use current mirrors each driving one LED string, for example, as shown in U.S. Pat. No. 6,538,394 issued to Volk et al. on Mar. 25, 2003. However, a disadvantage of such current mirror approach is that it has low efficiency. That is, when the forward voltages of the LEDs differ, the output voltage (V+) of the power converter applied to the parallel-connected LED strings has to be higher than the LED string with the highest combined forward voltage ΣVF. There is a voltage difference (V+−ΣVF) in the LED strings with a combined forward voltage lower than the highest, which is applied across each current mirror, with the highest voltage difference being present in the LED string with the lowest combined forward voltage ΣVF. Since the power dissipated by the current mirrors does not contribute to lighting, the overall efficiency is low, especially when the difference in the combined forward voltage between the LED strings is large.
Still another approach is to turn on each of the multiple LED strings sequentially, as shown in U.S. Pat. No. 6,618,031 issued to Bohn, et al. on Sep. 9, 2003. However, this approach requires even faster dynamic response from the LED driver, and thus forces the power converter to operate in deep discontinuous mode (DCM), under which power conversion efficiency is low.
Embodiments of the present invention include an LED driver including at least two separate, interlocked closed feedback loops. One feedback loop controls the duty cycle of the on/off times of the LED string, and the other feedback loop controls the duty cycle of the on/off times of a power switch in the switching power converter that provides the DC voltage applied to the parallel LED strings. By including two feedback loops serving separate functions, the LED driver of the present invention achieves fast control of the LED brightness and precise current sharing among multiple LED strings simultaneously in a power-efficient and cost-efficient manner.
The features and advantages described in the specification are not all inclusive and, in particular, many additional features and advantages will be apparent to one of ordinary skill in the art in view of the drawings, specification, and claims. Moreover, it should be noted that the language used in the specification has been principally selected for readability and instructional purposes, and may not have been selected to delineate or circumscribe the inventive subject matter.
The teachings of the embodiments of the present invention can be readily understood by considering the following detailed description in conjunction with the accompanying drawings.
The Figures (FIG.) and the following description relate to preferred embodiments of the present invention by way of illustration only. It should be noted that from the following discussion, alternative embodiments of the structures and methods disclosed herein will be readily recognized as viable alternatives that may be employed without departing from the principles of the claimed invention.
Reference will now be made in detail to several embodiments of the present invention(s), examples of which are illustrated in the accompanying figures. It is noted that wherever practicable similar or like reference numbers may be used in the figures and may indicate similar or like functionality. The figures depict embodiments of the present invention for purposes of illustration only. One skilled in the art will readily recognize from the following description that alternative embodiments of the structures and methods illustrated herein may be employed without departing from the principles of the invention described herein.
Feedback control circuit 202 forms part of a closed feedback loop, and includes amplifier Amp1, frequency compensation network FreqComp1, and comparator Comp1. Feedback control circuit 204 forms part of another closed feedback loop, and includes amplifier Amp2, frequency compensation network FreqComp2, and comparator Comp2. Amplifiers Amp1, Amp2 may be any type of amplifier, such as a voltage-to-voltage operational amplifier, a voltage-to-current transconductance amplifier, current-to-voltage trans-resistance amplifier, or a current-to-current mirror. They can also be implemented in digital circuits. The frequency compensation networks FreqComp1, FreqComp2 are comprised of resistor and capacitor networks, and functions as integrators. Depending on the amplifier type of amplifiers Amp1, Amp2, the frequency compensation networks FreqComp1, FreqComp2 can be connected either from the amplifier output to the input (as shown in
The feedback circuitry in the first embodiment of
LED current through LED string 110 is sensed by the current sensor 210 and provided to amplifier Amp1 as an input signal. The other input signal to amplifier Amp1 is a predetermined reference current signal, CurRef., corresponding to the desired LED brightness. The difference between the LED current and CurRef. is amplified by amplifier Amp1, with proper frequency compensation by frequency compensation network, FreqComp1. Amplifier Amp1 and frequency compensation network FreqComp1 together form a transimpedance error amplifier with frequency compensation applied. The output VC1 of amplifier Amp1 is subsequently fed to comparator Comp1 and compared against a reference ramp signal Ramp1, which is preferably a periodic signal with saw-tooth, triangular, or other types of waveform that is capable of generating a pulse-width modulated (PWM) signal 206 at the output of Comp1. Switch S2 is turned on and off according to the PWM signal 206. Alternatively, PMW signal 206 may be generated in digital circuits without an explicit ramp signal. Given the reference ramp signal Ramp1, the PWM duty cycle D of the PWM signal 206 is solely determined by the DC level of the amplifier output VC1. Assume that the LED current ION through the LED string 110 is on when switch S2 is on. The average LED current ĪLED through the LED string 110, which corresponds to LED brightness, is a fraction of ION, prorated over duty cycle D:
Ī
LED
=I
ON
×D, where 0≦D≦1 Equation 1.
If the brightness of the LEDs is to be changed, the current reference CurRef. can be adjusted. Consequently the level of the amplifier output voltage VC1 will be repositioned by amplifier Amp1, varying the PWM duty cycle of switch S2 accordingly. Due to the low-pass characteristics of frequency compensation network FreqComp1, VC1 will not settle to steady state until the average LED current ĪLED matches the reference current command CurRef., and thus control accuracy is achieved. Moreover, the settling time (to steady state) of VC1 can be as short as a few cycles of the switching frequency of switch S2, which is a significant speed improvement from conventional LED drivers. Thus, the first feedback loop (Loop 1) enables controlling the LED current with high speed.
The output voltage Vout of the boost converter 100 is biased high enough so that there is sufficient current flowing through the LED string 110 when switch S2 is on. On the other hand, because of the exponential relation between LED's current and voltage on the other hand, it is undesirable to have the output voltage Vout too high above LED's forward voltage, as it results in device over-stress. The second feedback loop (Loop 2) is designed specifically for optimal biasing of the output voltage Vout.
As stated above, amplifier output voltage VC1 determines the duty cycle of switch S2. In the second feedback loop (Loop 2), the amplifier output voltage VC1 is also provided to the input of amplifier Amp2. The other input to amplifier Amp2 is a predetermined reference duty cycle value, DCRef. The difference between VC1 and DCRef. is amplified by amplifier Amp2, with proper frequency compensation by frequency compensation network FreqComp2. The output voltage VC2 of amplifier Amp2 is compared with another periodic ramp signal Ramp2, generating a PWM control signal 208 to control the on/off duty cycle of switch S1. If there is a change in either VC1 or DCRef., amplifier Amp2 adjusts VC2 so that the duty cycle of switch S1 biases the output voltage Vout of the boost power converter 100 at a different level. Small changes on Vout can cause significant adjustment on the diode current ION, which in turn varies the amplifier output voltage VC1. Frequency compensation network FreqComp2 is designed to ensure that amplifier output voltage VC1 settles to DCRef. at steady state. Like Loop 1, components in Loop 2 may also be implemented with digital circuitry.
In terms of settling time, the second feedback loop (Loop 2) includes more components than the first feedback loop (Loop 1). These components, particularly those in the Boost converter power stage 100, significantly degrade loop dynamic response. Consequently the crossover frequency of the second feedback loop (Loop 2) is much lower than that of the first feedback loop (Loop 1). These two feedback loops are designed at different frequency domains to achieve fast load response with Loop 1 and system stability with Loop 2, respectively. Providing two separate feedback loops with the fast load response (Loop 1) and system stability (Loop 2) separately provided by each feedback loop obviates the need for stability-speed tradeoff. In other words, unlike conventional LED drivers, both fast load response and stable output bias may be achieved with the LED driver of the present invention.
Optimality of output biasing comes from the choice of DCRef., which represents the desired duty cycle for switch S2. This can be understood from the perspectives of both loop dynamics and LED dimming range.
From loop dynamics, the power converter output voltage Vout cannot change as fast as dimming control demands. Every time CurRef. is updated, it is the first feedback loop (Loop 1) that makes speedy adjustment to switch S2's duty cycle D to match the new brightness setting, under a rather constant Vout. The duty cycle D of switch S2 is therefore proportional to LED brightness. As the maximum value for duty cycle D of switch S2 is 1 (100%), the instantaneous DCRef. should be chosen such that:
where max(CurRef) is the maximum possible CurRef., determined by the application.
If the duty cycle D is larger than CurRef./max(CurRef.) and then if CurRef. steps up to its maximum level subsequently, the current through the LEDs 110 will not be able to respond to the new command because the duty cycle is to saturate at 100%. From the perspective of dimming range, however, it is desirable to maximize the ratio between LED's highest and lowest brightness (before complete shut-off). The lowest brightness corresponds to switch S2's minimum duty cycle, which is limited by implementation constraints such as finite rise and fall time. Maximizing the dimming range of the LEDs then becomes equivalent to maximizing switch S2's duty cycle. Combined with Equation 2, the optimal duty cycle DOpt of switch S2 is therefore:
Any value above Equation 3 will saturate the closed feedback loop (Loop 1), and any value below Equation 3 results in waste of LED dimming range and device over-stress. In practical designs, DOpt may be chosen slightly below the value in Equation 3 for parameter variation and manufacturing tolerance.
In summary, the LED drive technique according to the present invention achieves fast speed and robust stability simultaneously through the use of two separate, interlocked feedback loops, one controlling the LED current and the other one controlling the output voltage of the power converter. The LED drive technique of the present invention also provides an optimal output bias scheme that realizes maximum dimming range and least device stress. The addition of switch S2 to the LED driver is merely a small increase in component count and cost, and this switch S2 can also be used to shutdown the LED completely, if necessary. The boost LED driver cannot turn off the LED string 100 completely, without the switch S2 connected in series to the LED string 110.
The feedback circuitry in the second embodiment of
The second feedback loop (Loop 2) includes components from all three feedback circuits 202, 304, 204, including current sensors 210, 312, amplifiers Amp1, Amp2, Amp3, comparator Comp2, and frequency compensation networks FreqComp1, FreqComp2, and FreqComp3. The second feedback loop (Loop 2) senses the outputs of amplifiers Amp1 and Amp3, and controls the duty cycle of switch S1 through control signal 208. Since the duty cycle of switches S2, S3 should be upper bound to avoid control loop saturation, the larger one of the duty cycles for switches S2, S3 are selected for regulation in the second feedback loop Loop 2. Hence, self-selective magnitude comparator 302 receives the output voltages VC1, VC3 of amplifiers Amp1, Amp3 as its input signals 308, 310, compares them, selects the larger one of the two signals 308, 310, and outputs the selected signal 314 as its output. The output signal 314, i.e., the larger of output voltages VC1, VC3 of amplifiers Amp1, Amp3, is input to amplifier Amp2. The other input to amplifier Amp2 is the predetermined reference duty cycle value, DCRef. The difference between signal 314 and DCRef. is amplified by amplifier Amp2, with proper frequency compensation by frequency compensation network, FreqComp2. The output voltage VC2 of amplifier Amp2 is compared with another periodic ramp signal Ramp2, generating a PWM control signal 208 to control the on/off duty cycle of switch S1, similar to the first embodiment of
Compared with conventional LED drivers with parallel drive approaches, the advantages of the second embodiment of
The feedback circuitry in the third embodiment of
The second feedback loop (Loop 2) includes components from all four feedback circuits 202, 304, 404, 204 including current sensors 210, 312, 414, amplifiers Amp1, Amp2, Amp3, Amp4, frequency compensation networks FreqComp1, FreqComp2, FreqComp3, and FreqComp4, and comparator Comp2. The second feedback loop (Loop 2) senses the output voltages of amplifiers Amp1, Amp3, and Amp4 and controls the duty cycle of switch S1 through control signal 208. Since the duty cycle of switches S2, S3, S4 should be upper bound to avoid control loop saturation, the largest one of the duty cycles relative to their respective current references for switches S2, S3, S4 is selected for regulation in the second feedback loop (Loop 2). Hence, self-selective magnitude comparator 402 receives the output voltages VC1, VC3, VC4 of amplifiers Amp1, Amp3, Amp4 (representing the duty cycles D of switches S2, S3, and S4, respectively) as its input signals 408, 410, 412 as well as the respective current references CRred, CRgreen, and CRblue, and selects one of the three signals 408, 410, 412 that is associated with the largest ratio of their duty cycles to their respective current reference signals (i.e., max (D/CurRef)) as its output signal 416. This is simply because the current reference now differs across LED strings 110, 306, 406. The output signal 416 is input to amplifier Amp2. The other input to amplifier Amp2 is the predetermined reference duty cycle ratio, D/CurRef. The difference between signal 416 and D/CurRef. is amplified by amplifier Amp2, with proper frequency compensation by frequency compensation network, FreqComp2. The output voltage VC2 of amplifier Amp2 is compared with another periodic ramp signal Ramp2, generating a PWM control signal 208 to control the on/off duty cycle of switch S1, similar to the first and second embodiments of
Upon reading this disclosure, those of skill in the art will appreciate still additional alternative designs for an LED driver with multiple feedback control loops. Thus, while particular embodiments and applications of the present invention have been illustrated and described, it is to be understood that the invention is not limited to the precise construction and components disclosed herein and that various modifications, changes and variations which will be apparent to those skilled in the art may be made in the arrangement, operation and details of the method and apparatus of the present invention disclosed herein without departing from the spirit and scope of the invention as defined in the appended claims.