Patent Application
20120104964
The present technology generally relates to electrical circuits, and more particularly, relates to light emitting diode (“LED”) drivers and associated methods thereof.
LEDs have been widely used in various applications such as liquid crystal display (“LCD”) backlighting and general illumination because of their small sizes and energy efficiencies. In operation, LED drivers are needed to provide a regulated current signal to drive the LEDs. Pulse width modulation (“PWM”) dimming is often used in LED drivers to adjust the luminance of the LEDs. A PWM dimming signal controls the on and off of the LED drivers.
Typically, the PWM dimming signal is independent of an input signal to an LED. So at least three terminals are needed to achieve the PWM dimming, i.e., one for the input signal, one for dimming signal, and one for ground. However, in some retrofit applications such as in commercial refrigerators, only two terminals can be provided. Accordingly, techniques for providing PWM dimming with less than three (e.g., only two) terminal/wires may be needed.
Several embodiments of the present technology are described below with reference to LED drivers with PWM dimming and associated methods of operation. Many specific details of certain embodiments are set forth in the following text to provide a thorough understanding of these embodiments. For example, in particular embodiments, the present technology is directed to an LED driver with PWM dimming with only two wires. The LED driver can include (1) two input terminals for receiving a pulsed input signal VIN and (2) a dimming signal generator coupled to the two input terminals. The dimming signal generator can be configured to generate a dimming signal DIM based on the pulsed input signal VIN. The LED driver can also include a power converter coupled to the two input terminals and to the dimming signal generator. The power converter is configured to convert the pulsed input signal VIN into at least one current signal to drive an LED, and such a conversion is enable and disabled by the dimming signal DIM. Several other embodiments of the present technology can have configurations, components, and/or processes different from those described below. A person skilled in the relevant art, therefore, will appreciate that additional embodiments may be practiced without several of the details of the embodiments shown in
The dimming signal generator 101 is electrically coupled to the two input terminals A and B to receive the pulsed input signal VIN and to generate a dimming signal DIM based thereon. The frequency and pulse width of the dimming signal DIM is related to those of the pulsed input signal VIN. In one embodiment, the dimming signal generator 101 comprises a resistor divider. Thus, the dimming signal DIM is a PWM signal with a pulse width and a frequency generally similar to those of the pulsed input signal VIN. And the dimming signal DIM is synchronous with the pulsed input signal VIN.
The power converter 102 is electrically coupled to the two input terminals A and B and the dimming signal generator 101 to receive the pulsed input signal VIN and the dimming signal DIM. The power converter 102 converts the pulsed input signal VIN into a current signal ILED to drive the LED, and the conversion is enabled or disabled by the dimming signal DIM. Because the dimming signal DIM is generated based on the pulsed input signal VIN, only two wires are needed to realize PWM dimming.
The power converter 102 may be configured as Buck, Boost, Buck-Boost, Flyback, and/or in other suitable DC/DC topology. And various control schemes such as peak current control, off time control and quasi-resonant control may be used. In certain embodiments, multiple LEDs may be serially connected to form an LED string, and the power converter 101 may be used to drive one or more of such LED strings.
The lower limit of the dimming frequency is believed to be approximately 120 Hz, below which human eyes may no longer blend the pulses of light into a perceived continuous light. The upper limit may be determined by a required minimum contrast ratio. In one embodiment, the power converter 102 operates normally when the dimming signal DIM is high (or low for active low input), and is shut down when the dimming signal DIM is low (or high for active low input). In other embodiments, the power converter 102 may operate based on other suitable logic values of the dimming signal DIM.
In one embodiment, a diode D3 (e.g., a Zener diode) and a diode D4 (e.g., a Schottky diode) may be electrically connected to the resistor R2 in parallel to clamp and square up the dimming signal DIM. The maximum voltage of the dimming signal DIM is believed to be the breakdown voltage of the diode D3, and the minimum voltage is generally −0.3V which is determined by the conduction voltage of the diode D4.
In the illustrated embodiment, the power converter 202 is configured in the Buck topology, and is configured to drive four serially connected LEDs. The power converter 202 comprises an input capacitor C2, a switch S1, a diode D5, an inductor L1, an output capacitor C3, and a control circuit 203. The diode D5 may be replaced by a synchronous switch (not shown) in certain embodiments. The current ILED flowing through the LEDs is fed back to the control circuit 203 to control the on and off of the switch S1. The control circuit 203 operates normally when the dimming signal DIM is high, and turns off the switch S1 when the dimming signal DIM is low. Such control function can be realized by coupling a single AND gate to the gate of the switch S1, and/or changing the reference used to regulate the current ILED. In other embodiments, the power converter 202 can be configured in other suitable topologies.
In most retrofit applications, polarity protection may be needed because the wiring is not always color coded. In one embodiment, a first polarity protection circuit 204 may be electrically coupled between the input terminals and the power converter 202, and a second polarity protection circuit 205 may be electrically coupled between the input terminals and the dimming signal generator 201. In other applications, at least one of the polarity protection circuits 204 and 205 may be omitted.
In one embodiment, the first polarity protection circuit 204 comprises a diode D2 electrically coupled between the input terminal A and the input capacitor C2, and the second polarity protection circuit 205 comprises a diode D1 electrically coupled between the input terminal A and the resistor R1. If the wires are connected in error, i.e., the voltage of the terminal B is higher than that of the terminal A, no current is flowing through the input terminals. Furthermore, when the pulsed input signal VIN is low, the capacitor C2 is not discharged through the input terminals. And because the dimming signal DIM is also low, the power converter 202 is disabled and the load of the capacitor C2 is very low. As such, it is believed that a substantial portion, if not all, of the AC component may be removed from the input voltage VDD of the power converter 202.
Typically, the power converter 102 can be configured as an integrated circuit with optional external components.
At the beginning of a cycle, the switch M1 is turned off, and the second current sensing signal Isen2 is zero. The output voltage of the error amplifier AMP1 is larger than the sum signal, and the output of the comparator COM1 is low. At the rising edge of the clock signal CLK, the RS flip-flop FF1 is set. The switch M1 is turned on, and the sum signal as well as the second current sensing signal Isen2 is increased. When the sum signal becomes larger than the output voltage of the error amplifier AMP1, the RS flip-flop FF1 is reset and the switch M1 is turned off. This process repeats so the current ILED is regulated and a cycle-by-cycle limit of the current flowing through the switch M1 is provided.
When the dimming signal DIM is high, e.g., larger than 1.4V (or other suitable voltage values), the reference signal REF2 is larger than the reference signal REF1. The IC 406 operates normally and the current ILED is regulated to be a value corresponding to the reference signal REF1. When the dimming signal DIM is low, e.g., smaller than 0.6V, the reference signal REF2 is set to be zero by a LOGIC module. So the current ILED is regulated to be zero through the close-loop control. Under the control of the dimming signal DIM, the current ILED has a generally similar pulse width as the pulsed input signal VIN with only a small offset introduced by the start-up delay of the power converter 402. One of ordinary skill in the art will appreciate the other functions of the IC 406, such as over current protection and over voltage protection, which are not discussed here for brevity.
From the foregoing, it will be appreciated that specific embodiments of the technology have been described herein for purposes of illustration, but that various modifications may be made without deviating from the technology. Many of the elements of one embodiment may be combined with other embodiments in addition to or in lieu of the elements of the other embodiments. Accordingly, the technology is not limited except as by the appended claims.
