LED lighting systems with TRIAC dimmers and methods thereof

Description

2. BACKGROUND OF THE INVENTION

Certain embodiments of the present invention are directed to circuits. More particularly, some embodiments of the invention provide lighting systems and methods with Triode for Alternating Current (TRIAC) dimmers. Merely by way of example, some embodiments of the invention have been applied to light emitting diodes (LEDs). But it would be recognized that the invention has a much broader range of applicability.

As anew energy-saving and environmentally-friendly light source, light emitting diode (LED) is widely used in various fields due to its high luminance, low power consumption and long life span. For example, within a range close to a rated current, luminance of an LED often is directly proportional to the current flowing through the LED but is independent of the voltage across the LED; therefore, LED is often supplied with power from a constant current source during operation.

FIG. 1 is an exemplary circuit diagram showing a conventional linear constant current LED lighting system with a Triode for Alternating Current (TRIAC) dimmer. The linear constant current LED lighting system 100 is widely used in various fields such as LED lighting due to the system's simple and reliable structure and low cost. As shown in FIG. 1, the main control unit of the system 100 includes: an error amplifier U1, a transistor M1 for power regulation, and an LED current sensing resistor R1. The positive input terminal of the amplifier U1 receives a reference voltage V_ref, and the negative input terminal of the amplifier U1 is connected to the sensing resistor R1. Additionally, the output terminal of the amplifier U1 is connected to the gate terminal of the transistor M1 for power regulation.

As shown in FIG. 1, after the system 100 is powered on, an AC input voltage (e.g., VAC) is received by a TRIAC dimmer 190 and subjected to a full-wave rectification process performed by a full-wave rectifying bridge BD1 to generate a rectified voltage 101 (e.g., V_bulk). For example, the rectified voltage 101 does not drop below 0 volt. Also, after the system 100 is powered on, the amplifier U1 of the main control unit controls the voltage 103 of the gate terminal of the transistor M1, so that the transistor M1 is closed (e.g., the transistor M1 being turned on). As an example, the voltage 101 (e.g., V_bulk) is higher than a minimum forward operating voltage of the one or more LEDs, and a current 105 flows through the one or more LEDs to the sensing resistor R1 via the transistor M1.

The sensing resistor R1 includes two terminals. For example, one terminal of the sensing resistor R1 is grounded, and another terminal of the sensing resistor R1 generates a voltage (e.g., V_sense). As an example, the magnitude of the voltage (e.g., V_sense) across the resistor R1 corresponds to the current 105 flowing through the one or more LEDs. The amplifier U1 receives the voltage V_senseat one input terminal and receives the reference voltage V_refat another input terminal, and performs an error amplification process on the voltage V_senseand the reference voltage V_refin order to adjust the gate voltage 103 of the transistor M1 and realize constant current control for the one or more LEDs. The LED current Lied (e.g., the current flowing through the one or more LEDs) is shown in Equation 1:

$\begin{matrix} I_{l e d} = \frac{V_{r e f}}{R_{1}} & (Equation 1) \end{matrix}$

where R₁represents the resistance of the resistor R1, and V_refrepresents the reference voltage.

FIG. 2 shows simplified conventional timing diagrams for the LED lighting system 100 as shown in FIG. 1. The waveform 210 represents the rectified voltage V_bulk(e.g., the rectified voltage 101) as a function of time, the waveform 220 represents the voltage of the gate terminal of the transistor M1 (e.g., the gate voltage 103) as a function of time, and the waveform 230 represents the LED current Lied (e.g., the current 105 flowing through the one or more LEDs) as a function of time.

In certain TRIAC dimmer applications, the AC input voltage (e.g., VAC) is, for example, clipped by the TRIAC dimmer 190 and also rectified to generate the rectified voltage 101 (e.g., V_bulk), which is received by an anode of the one or more LEDs. As shown by the waveform 210, during one or more time durations (e.g., from time t₁to time t₂), the rectified voltage 101 (e.g., V_bulk) either is larger than zero but still small in magnitude or is equal to zero because the TRIAC dimmer 190 operates in an off cycle, so that the voltage 101 (e.g., V_bulk) is lower than the minimum forward operating voltage of the one or more LEDs. For example, during the off cycle, the TRIAC dimmer 190 clips the AC input voltage (e.g., VAC) so that the rectified voltage 101 (e.g., V_bulk) equals zero in magnitude. As an example, from time t₁to time t₂, the one or more LEDs cannot be turned on due to insufficient magnitude of the voltage 101 and the LED current Lied is equal to zero, as shown by the waveforms 210 and 230. At this point (e.g., at a time between time t₁and time t₂), the constant current control circuit of FIG. 1 is still working. For example, the voltage V_bulkis low and no current flows through the one or more LEDs, so the voltage of the gate terminal of the transistor M1, which is provided by the output terminal of the U1 amplifier, is at a high voltage level (e.g., at a voltage level V₂from time t₁to time t₂as shown by the waveform 220). As an example, as shown by the waveform 220, prior to the time t₁, the voltage of the gate terminal of the transistor M1 is at a low voltage level (e.g., at a voltage level V₁). For example, the voltage level V₂is higher than the voltage level V₁, and the voltage level V₁is higher than a threshold voltage of the gate terminal for turning on the transistor M1.

As shown in FIG. 2, at time t₂, the TRIAC dimmer 190 enters an on cycle, during which, the TRIAC dimmer 190 does not clip the AC input voltage (e.g., VAC), as shown by the waveform 210. For example, at time t₂, the V_bulkvoltage increases rapidly while the voltage of the gate terminal of the transistor M1 is at the high voltage level, causing the LED current Lied to overshoot, as shown by the waveforms 210, 220 and 230. During the loop adjustment process for constant current of the LED lighting system 100, after overshoot of the LED current I_led, there is an oscillation period (e.g., from time t₂to time t₃) as shown by the waveforms 220 and 230.

As discussed above, a resulting problem of the LED lighting system 100 is that the change in the V_bulkvoltage caused by the TRIAC dimmer 190 can cause overshoot and oscillation of the LED current I_led. For some TRIAC dimmers, this type of current overshoot and oscillation may even cause the TRIAC dimmer (e.g., the TRIAC dimmer 190) to operate abnormally (e.g., causing the TRIAC dimmer 190 to misfire), which in turn causes abnormal fluctuations in the LED current Lied and causes the one or more LEDs to flicker.

Hence it is highly desirable to improve techniques related to LED lighting systems with TRIAC dimmers.

3. BRIEF SUMMARY OF THE INVENTION

Some embodiments of the present invention provide a high-compatibility TRIAC dimmer control system for an LED lighting system and a method of using such switch control system. For example, the TRIAC dimmer control system eliminates current overshoot and oscillation caused by a sudden change of a rectified voltage during a TRIAC dimming process by controlling enablement of a constant current circuit of the system. As an example, the TRIAC dimmer control system prevents a TRIAC dimmer from operating abnormally due to current surges and thus improves the compatibility of LED lighting system with TRIAC dimmer.

In certain embodiments, a system for LED switch control is provided. For example, the system includes a rectifying module configured to rectify an input voltage that has been processed by a TRIAC dimmer and to transmit the rectified voltage to a combination of one or more LEDs, the combination of the one or more LEDs being coupled to a constant current module and an enablement control module. As an example, the system also includes the enablement control module configured to receive a sensing voltage corresponding to the rectified voltage, to compare the sensing voltage with a predetermined threshold voltage, to output an enablement signal at a logic low level if the sensing voltage is lower than the predetermined threshold voltage, and to output the enablement signal at a logic high level if the sensing voltage is higher than the predetermined threshold voltage. As an example, the system also includes the constant current module configured to receive the enablement signal, to allow a current to flow through the combination of the one or more LEDs if the enablement signal is at the logic high level, and to not allow the current to flow through the combination of the one or more LEDs if the enablement signal is at the logic low level. In some embodiments, an LED lighting system including an LED switch control system is provided.

According to certain embodiments, a system for controlling one or more light emitting diodes includes a current regulation circuit coupled to a cathode of one or more light emitting diodes. The one or more light emitting diodes include the cathode and an anode configured to receive a rectified voltage. Additionally, the system includes a control circuit coupled to the cathode of the one or more light emitting diodes. The control circuit is configured to receive a first voltage from the cathode of the one or more light emitting diodes, compare a second voltage and a threshold voltage, and generate a control signal based at least in part on the second voltage and the threshold voltage. The second voltage indicates a magnitude of the first voltage. The control circuit is further configured to: if the second voltage is larger than the threshold voltage, generate the control signal at a first logic level; and if the second voltage is smaller than the threshold voltage, generate the control signal at a second logic level. The current regulation circuit is configured to: receive the control signal from the control circuit; allow a current to flow through the one or more light emitting diodes if the control signal is at the first logic level, the current being larger than zero in magnitude; and not allow the current to flow through the one or more light emitting diodes if the control signal is at the second logic level.

According to some embodiments, a system for controlling one or more light emitting diodes includes a current regulation circuit configured to receive a rectified voltage and coupled to an anode of one or more light emitting diodes. The one or more light emitting diodes include the anode and a cathode. Additionally, the system includes a control circuit configured to receive the rectified voltage. The control circuit is configured to: compare an input voltage and a threshold voltage, the input voltage indicating a magnitude of the rectified voltage; and generate a control signal based at least in part on the input voltage and the threshold voltage. The control circuit is further configured to: if the input voltage is larger than the threshold voltage, generate the control signal at a first logic level; and if the input voltage is smaller than the threshold voltage, generate the control signal at a second logic level. The current regulation circuit is configured to: receive the control signal from the control circuit; allow a current to flow through the one or more light emitting diodes if the control signal is at the first logic level, the current being larger than zero in magnitude; and not allow the current to flow through the one or more light emitting diodes if the control signal is at the second logic level.

According to certain embodiments, a method for controlling one or more light emitting diodes includes: receiving a first voltage from a cathode of one or more light emitting diodes by a control circuit coupled to the cathode of the one or more light emitting diodes, the one or more light emitting diodes including the cathode and an anode configured to receive a rectified voltage; comparing a second voltage and a threshold voltage, the second voltage indicating a magnitude of the first voltage; generating a control signal at a first logic level if the second voltage is larger than the threshold voltage; generating the control signal at a second logic level if the second voltage is smaller than the threshold voltage; receiving the control signal from the control circuit by a current regulation circuit coupled to the cathode of one or more light emitting diodes; allowing a current to flow through the one or more light emitting diodes if the control signal is at the first logic level, the current being larger than zero in magnitude; and not allowing the current to flow through the one or more light emitting diodes if the control signal is at the second logic level.

According to some embodiments, a method for controlling one or more light emitting diodes includes: receiving a rectified voltage by a control circuit; comparing an input voltage and a threshold voltage, the input voltage indicating a magnitude of the rectified voltage; if the input voltage is larger than the threshold voltage, generating a control signal at a first logic level; if the input voltage is smaller than the threshold voltage, generating the control signal at a second logic level; receiving the control signal from the control circuit by a current regulation circuit configured to receive the rectified voltage and coupled to an anode of one or more light emitting diodes, the one or more light emitting diodes including the anode and a cathode; allowing a current to flow through the one or more light emitting diodes if the control signal is at the first logic level, the current being larger than zero in magnitude; and not allowing the current to flow through the one or more light emitting diodes if the control signal is at the second logic level.

Depending upon embodiment, one or more benefits may be achieved. These benefits and various additional objects, features and advantages of the present invention can be fully appreciated with reference to the detailed description and accompanying drawings that follow.

4. BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is an exemplary circuit diagram showing a conventional linear constant current LED lighting system with a Triode for Alternating Current (TRIAC) dimmer.

FIG. 2 shows simplified conventional timing diagrams for the LED lighting system as shown in FIG. 1.

FIG. 3 is a simplified circuit diagram showing an LED lighting system with a TRIAC dimmer according to some embodiments of the present invention.

FIG. 4 shows simplified timing diagrams for controlling the LED lighting system 400 as shown in FIG. 3 according to some embodiments of the present invention.

FIG. 5 is a simplified circuit diagram showing an LED lighting system with a TRIAC dimmer according to certain embodiments of the present invention.

5. DETAILED DESCRIPTION OF THE INVENTION

FIG. 3 is a simplified circuit diagram showing an LED lighting system with a TRIAC dimmer according to some embodiments of the present invention. This diagram is merely an example, which should not unduly limit the scope of the claims. One of ordinary skill in the art would recognize many variations, alternatives, and modifications. As shown in FIG. 3, the LED lighting system 400 includes a line (L) terminal and a neutral (N) terminal, and the system 400 also includes a TRIAC dimmer 390, a full-wave rectifying bridge 392 (e.g., a full-wave rectifying bridge BD1), a fuse 394, and a system controller 300. In some examples, the system controller 300 includes a constant current circuit 310 and a control circuit 320 (e.g., an enablement control circuit). For example, the system controller 300 is located on a chip. As an example, the constant current circuit 310 includes an amplifier 330 (e.g., an error amplifier U1), a transistor 332 (e.g., a transistor M1 for power regulation), and a resistor 334 (e.g., a sensing resistor R1). For example, the control circuit 320 includes a resistor 340 (e.g., a resistor R2), a resistor 342 (e.g., a resistor R3), a comparator 344 (e.g., a comparator U2), and a switch 346 (e.g., a switch SW1). In certain examples, the LED lighting system 400 provides a current 305 (e.g., an LED current I_led) that flows through one or more LEDs 490, the transistor 332 (e.g., the transistor M1 for power regulation), and the resistor 334 (e.g., the sensing resistor R1). For example, one or more LEDs 490 include multiple LEDs connected in series. Although the above has been shown using a selected group of components for the LED lighting system, there can be many alternatives, modifications, and variations. For example, some of the components may be expanded and/or combined. Other components may be inserted to those noted above. Depending upon the embodiment, the arrangement of components may be interchanged with others replaced. Further details of these components are found throughout the present specification.

In certain embodiments, an AC input voltage (e.g., VAC) is received by the TRIAC dimmer 390 and also rectified (e.g., by the full-wave rectifying bridge 392) to generate a rectified voltage 301 (e.g., a rectified voltage V_bulk). For example, the full-wave rectifying bridge 392 is coupled to the TRIAC dimmer 390 through the fuse 394. As an example, the rectified voltage 301 does not fall below the ground voltage of the system (e.g., zero volt). In some embodiments, the transistor 332 (e.g., the transistor M1 for power regulation) includes a source terminal 350, a gate terminal 352 and a drain terminal 354, the amplifier 330 (e.g., the error amplifier U1) includes input terminals 356 and 358 and an output terminal 360, and the resistor 334 (e.g., the sensing resistor R1) includes terminals 362 and 364. For example, the source terminal 350 of the transistor 332 is connected to the terminal 362 of the resistor 334, the gate terminal 352 of the transistor 332 is connected to the output terminal 360 of the amplifier 330, and the drain terminal 354 of the transistor 332 is connected to a cathode of the one or more LEDs 490. As an example, an anode of the one or more LEDs 490 receives the rectified voltage 301 (e.g., a rectified voltage V_bulk), and the terminal 364 of the resistor 334 is biased to the ground voltage of the system (e.g., zero volt).

According to certain embodiments, the resistor 340 (e.g., the resistor R2) includes terminals 366 and 368, the resistor 342 (e.g., the resistor R3) includes terminals 370 and 372, and the comparator 344 (e.g., the comparator U2) includes an input terminal 374 (e.g., a non-inverting terminal), an input terminal 376 (e.g., an inverting terminal), and an output terminal 378. For example, the terminal 366 of the resistor 340 is connected to the drain terminal 354 of the transistor 332, and the terminal 372 of the resistor 342 is biased to the ground voltage of the system (e.g., zero volt). As an example, the terminal 368 of the resistor 340 and the terminal 370 of the resistor 342 are connected at a node 380 (e.g., a node DS), and the node 380 (e.g., the node DS) is connected to the input terminal 374 of the comparator 344. For example, the input terminal 374 of the comparator 344 is configured to detect a change of a voltage 333 of the drain terminal 354 of the transistor 332.

According to some embodiments, the input terminal 374 (e.g., the positive terminal) of the comparator 344 receives a voltage 375 of the node 380 (e.g., the node DS), which is connected to the terminal 368 of the resistor 340 and the terminal 370 of the resistor 342. For example, the voltage 375 is directly proportional to the voltage 333 of the drain terminal 354 of the transistor 332. As an example, the input terminal 376 (e.g., the negative terminal) of the comparator 344 receives a threshold voltage 377 (e.g., a threshold voltage V_th).

In certain embodiments, the comparator 344 compares the voltage 375 and the threshold voltage 377 and generates a control signal 379 (e.g., a control signal en). For example, if the voltage 375 is larger than the threshold voltage 377, the control signal 379 is at a logic high level. As an example, if the voltage 375 is smaller than the threshold voltage 377, the control signal 379 is at a logic low level. In some embodiments, the comparator 344 outputs the control signal 379 at the output terminal 378, and sends the control signal 379 to the switch 346 (e.g., the switch SW1) of the constant current circuit 310.

In some embodiments, the switch 346 includes terminals 382 and 384. For example, the terminal 382 is connected to the output terminal 360 of the amplifier 330, and the terminal 384 is biased to the ground voltage of the system (e.g., zero volt). As an example, the switch 346 receives the control signal 379. In certain examples, if the control signal 379 is at the logic high level, the switch 346 is open. For example, if the switch 346 is open, the constant current circuit 310 is enabled. As an example, if the switch 346 is open, a voltage 303 (e.g., a voltage Gate) of the gate terminal 352 of the transistor 332 is generated by the amplifier 330 (e.g., the error amplifier U1). In some examples, if the control signal 379 is at the logic low level, the switch 346 is closed. As an example, if the switch 346 is closed, the constant current circuit 310 is disabled. For example, if the switch 346 is closed, the voltage 303 of the gate terminal 352 of the transistor 332 is biased to the ground voltage of the system (e.g., zero volt).

According to some embodiments, if the voltage 375 is smaller than the threshold voltage 377, the constant current circuit 310 is disabled by the control signal 379. For example, if the voltage 375 is smaller than the threshold voltage 377, the voltage 333 of the drain terminal 354 of the transistor 332 is too low for the LED lighting system 400 to provide a constant current to the one or more LEDs 490. As an example, if the constant current circuit 310 is disabled, the current 305 (e.g., the LED current I_led) that flows through the one or more LEDs 490 is equal to zero in magnitude. For example, if the voltage 375 is smaller than the threshold voltage 377, the constant current circuit 310 does not allow the current 305 (e.g., the LED current I_led) with a magnitude larger than zero to flow through the one or more LEDs 490.

According to certain embodiments, if the voltage 375 is larger than the threshold voltage 377, the constant current circuit 310 is enabled by the control signal 379. As an example, if the voltage 375 is larger than the threshold voltage 377, the voltage 333 of the drain terminal 354 of the transistor 332 is high enough for the LED lighting system 400 to provide a constant current to the one or more LEDs 490. For example, if the voltage 375 is larger than the threshold voltage 377, the voltage 333 of the drain terminal 354 of the transistor 332 is higher than the minimum voltage value that is needed for the LED lighting system 400 to provide a constant current to the one or more LEDs 490. As an example, if the constant current circuit 310 is enabled, the current 305 that flows through the one or more LEDs 490 is equal to a constant that is larger than zero in magnitude. For example, if the voltage 375 is larger than the threshold voltage 377, the constant current circuit 310 allows the current 305 (e.g., the LED current I_led) with a magnitude larger than zero to flow through the one or more LEDs 490.

As shown in FIG. 3, the amplifier 330 includes the input terminal 356 (e.g., a non-inverting terminal), the input terminal 358 (e.g., an inverting terminal), and the output terminal 360, according to one embodiment. In some examples, the input terminal 356 (e.g., the positive terminal) receives a reference voltage 357 (e.g., a reference voltage V_ref). In certain examples, the input terminal 358 (e.g., the negative terminal) is connected to the source terminal 350 of the transistor 332 and the terminal 362 of the resistor 334, and receives a voltage 359 (e.g., a voltage V_sense). For example, the terminal 364 of the resistor 334 is biased to the ground voltage of the system (e.g., zero volt), and the voltage 359 at the terminal 362 of the resistor 334 corresponds to the current 305 that flows through the one or more LEDs 490. As an example, if the switch 346 is open, the amplifier 330 (e.g., the error amplifier U1) generates the voltage 303 based at least in part on the reference voltage 357 (e.g., the reference voltage V_ref) and the voltage 359 (e.g., the voltage V_sense), and outputs the voltage 303 at the output terminal 360. For example, the voltage 303 is received by the gate terminal 352 of the transistor 332.

In some embodiments, after the constant current circuit 310 becomes enabled by the control signal 379, the voltage 303 of the gate terminal 352 generated by the amplifier 330 (e.g., the error amplifier U1) slowly increases from the ground voltage of the system (e.g., zero volt) to a desired voltage value, and the current 305 that flows through the one or more LEDs 490 also slowly increases from zero to a desired current value. For example, the voltage 303 slowly increases from the ground voltage of the system (e.g., zero volt) to the desired voltage value without overshoot and/or oscillation. As an example, the current 305 slowly increases from zero to the desired current value without overshoot and/or oscillation.

In certain embodiments, as shown in FIG. 3, the transistor 332 (e.g., the transistor M1 for power regulation) is a field effect transistor (e.g., a metal-oxide-semiconductor field effect transistor (MOSFET)). For example, the transistor 332 is an insulated gate bipolar transistor (IGBT). As an example, the transistor 332 is a bipolar junction transistor. In some examples, the system controller 300 includes more components or less components. In certain examples, the value of the reference voltage 357 (e.g., the reference voltage V_ref) and/or the value of the threshold voltage 377 (e.g., the threshold voltage V_th) can be set as desired by those skilled in the art.

FIG. 4 shows simplified timing diagrams for controlling the LED lighting system 400 as shown in FIG. 3 according to some embodiments of the present invention. These diagrams are merely examples, which should not unduly limit the scope of the claims. One of ordinary skill in the art would recognize many variations, alternatives, and modifications. The waveform 410 represents the rectified voltage V_bulk(e.g., the rectified voltage 301) as a function of time, the waveform 420 represents the voltage 375 of the node DS (e.g., the node 380) as a function of time, the waveform 430 represents the control signal en (e.g., the control signal 379) as a function of time, the waveform 440 represents the voltage Gate (e.g., the voltage 303) as a function of time, and the waveform 430 represents the LED current Lied (e.g., the current 305) as a function of time. According to some embodiments, the time period from time t₁₁to time t₁₅represents a half cycle of the AC input voltage (e.g., VAC). For example, the time period from time t₁₁to time t₁₅is equal to half a period of the AC input voltage (e.g., VAC).

According to certain embodiments, after the system 400 is powered on, the AC input voltage (e.g., VAC) is received by the TRIAC dimmer 390 and subjected to a full-wave rectification process performed by the full-wave rectifying bridge 392 (e.g., the full-wave rectifying bridge BD1) to generate the rectified voltage 301 (e.g., the rectified voltage V_bulk). According to some embodiments, at time t₁₁, the TRIAC dimmer 390 enters an on cycle, during which, the TRIAC dimmer 390 does not clip the AC input voltage (e.g., VAC). For example, at time t₁₁, the rectified voltage 301 (e.g., the rectified voltage V_bulk) increases rapidly as shown by the waveform 410.

In some examples, if the rectified voltage 301 (e.g., the rectified voltage V_bulk) becomes larger than a magnitude that is needed to provide a minimum forward operating voltage to the one or more LEDs 490, the rectified voltage 301 (e.g., the rectified voltage V_bulk) causes the voltage 333 of the drain terminal 354 of the transistor 332 to increase. In certain examples, the voltage 333 is received by a voltage divider including the resistor 340 (e.g., the resistor R2) and the resistor 342 (e.g., the resistor R3), and the voltage divider generates the voltage 375. As an example, if the voltage 333 of the drain terminal 354 of the transistor 332 increases, the voltage 375 of the node 380 (e.g., the node DS) also increases.

According to certain embodiments, at time t₁₁, the TRIAC dimmer 390 stops clipping the AC input voltage (e.g., VAC), and the voltage 375 of the node 380 (e.g., the node DS) starts to increase but remains smaller than the threshold voltage 377 (e.g., the threshold voltage V_th) as shown by the waveform 420. For example, at time t₁₁, the voltage 375 remains smaller than the threshold voltage 377 as shown by the waveform 420, the control signal 379 (e.g., the control signal en) remains at the logic low level as shown by the waveform 430, and the voltage 303 (e.g., the voltage Gate) of the gate terminal 352 of the transistor 332 remains biased to the ground voltage of the system (e.g., zero volt) as shown by the waveform 440. As an example, at time t₁₁, the constant current circuit 310 remains disabled by the control signal 379, and the current 305 (e.g., the LED current I_led) remains equal to zero in magnitude as shown by the waveform 450.

According to some embodiments, from time t₁₁to time t₁₂, the voltage 375 of the node 380 (e.g., the node DS) increases but remains smaller than the threshold voltage 377 (e.g., the threshold voltage V_th) as shown by the waveform 420. For example, from time t₁₁to time t₁₂, the voltage 375 remains smaller than the threshold voltage 377 as shown by the waveform 420, the control signal 379 (e.g., the control signal en) remains at the logic low level as shown by the waveform 430, and the voltage 303 (e.g., the voltage Gate) of the gate terminal 352 of the transistor 332 remains biased to the ground voltage of the system (e.g., zero volt) as shown by the waveform 440. As an example, from time t₁₁to time t₁₂, the constant current circuit 310 remains disabled by the control signal 379, and the current 305 (e.g., the LED current I_led) remains equal to zero in magnitude as shown by the waveform 450.

According to certain embodiments, at time t₁₂, the voltage 375 of the node 380 (e.g., the node DS) becomes larger than the threshold voltage 377 (e.g., the threshold voltage V_th) as shown by the waveform 420. For example, at time t₁₂, the voltage 375 becomes larger than the threshold voltage 377 as shown by the waveform 420, the control signal 379 (e.g., the control signal en) changes from the logic low level to the logic high level as shown by the waveform 430, and the voltage 303 (e.g., the voltage Gate) of the gate terminal 352 of the transistor 332 starts to increase from the ground voltage of the system (e.g., zero volt) as shown by the waveform 440. As an example, at time t₁₂, the constant current circuit 310 becomes enabled by the control signal 379, and the current 305 (e.g., the LED current I_led) starts to increase from zero in magnitude as shown by the waveform 450.

According to some embodiments, from time t₁₂to time t₁₃, the voltage 375 of the node 380 (e.g., the node DS) remains larger than the threshold voltage 377 (e.g., the threshold voltage V_th) as shown by the waveform 420. In certain examples, from time t₁₂to time t₁₃, the voltage 375 remains larger than the threshold voltage 377 as shown by the waveform 420, the control signal 379 (e.g., the control signal en) remains at the logic high level as shown by the waveform 430, and the voltage 303 (e.g., the voltage Gate) of the gate terminal 352 of the transistor 332 increases from the ground voltage of the system (e.g., zero volt) to a voltage level Vii, as shown by the waveform 440. For example, the voltage level Vii is higher than a threshold voltage of the gate terminal for turning on the transistor 332 (e.g., the transistor M1 for power regulation). In some examples, from time t₁₂to time t₁₃, the constant current circuit 310 remains enabled by the control signal 379, and the current 305 (e.g., the LED current led) increases from zero to a current level I₁₁as shown by the waveform 450. As an example, the current level I₁₁is a predetermined magnitude.

According to certain embodiments, at time t₁₃, the voltage 375 of the node 380 (e.g., the node DS) remains larger than the threshold voltage 377 (e.g., the threshold voltage V_th) as shown by the waveform 420. In certain examples, at time t₁₃, the voltage 375 remains larger than the threshold voltage 377 as shown by the waveform 420, the control signal 379 (e.g., the control signal en) remains at the logic high level as shown by the waveform 430, and the voltage 303 (e.g., the voltage Gate) of the gate terminal 352 of the transistor 332 reaches the voltage level Vii, as shown by the waveform 440. In some examples, at time t₁₃, the constant current circuit 310 remains enabled by the control signal 379, and the current 305 (e.g., the LED current I_led) reaches the current level I₁₁as shown by the waveform 450.

According to some embodiments, from time t₁₃to time t₁₄, the voltage 375 of the node 380 (e.g., the node DS) remains larger than the threshold voltage 377 (e.g., the threshold voltage V_th) as shown by the waveform 420. In certain examples, from time t₁₃to time t₁₄, the voltage 375 remains larger than the threshold voltage 377 as shown by the waveform 420, the control signal 379 (e.g., the control signal en) remains at the logic high level as shown by the waveform 430, and the voltage 303 (e.g., the voltage Gate) of the gate terminal 352 of the transistor 332 remains constant at the voltage level Vii, as shown by the waveform 440. In some examples, from time t₁₃to time t₁₄, the constant current circuit 310 remains enabled by the control signal 379, and the current 305 (e.g., the LED current I_led) remains constant at the current level I₁₁as shown by the waveform 450.

According to certain embodiments, at time t₁₄, the voltage 375 of the node 380 (e.g., the node DS) becomes smaller than the threshold voltage 377 (e.g., the threshold voltage V_th) as shown by the waveform 420. For example, at time t₁₄, the voltage 375 becomes smaller than the threshold voltage 377 as shown by the waveform 420, the control signal 379 (e.g., the control signal en) changes from the logic high level to the logic low level as shown by the waveform 430, and the voltage 303 (e.g., the voltage Gate) of the gate terminal 352 of the transistor 332 decreases from the voltage level Vii to the ground voltage of the system (e.g., zero volt) as shown by the waveform 440. As an example, at time t₁₄, the constant current circuit 310 becomes disabled by the control signal 379, and the current 305 (e.g., the LED current I_led) decreases from the current level I₁₁to zero as shown by the waveform 450.

According to some embodiments, from time t₁₄to time t₁₅, the voltage 375 of the node 380 (e.g., the node DS) remains smaller than the threshold voltage 377 (e.g., the threshold voltage V_th) as shown by the waveform 420. For example, from time t₁₄to time t₁₅, the voltage 375 remains smaller than the threshold voltage 377 as shown by the waveform 420, the control signal 379 (e.g., the control signal en) remains at the logic low level as shown by the waveform 430, and the voltage 303 (e.g., the voltage Gate) of the gate terminal 352 of the transistor 332 remains at the ground voltage of the system (e.g., zero volt) as shown by the waveform 440. As an example, from time t₁₄to time t₁₅, the constant current circuit 310 remains disabled by the control signal 379, and the current 305 (e.g., the LED current I_led) remains at zero as shown by the waveform 450.

FIG. 5 is a simplified circuit diagram showing an LED lighting system with a TRIAC dimmer according to certain embodiments of the present invention. This diagram is merely an example, which should not unduly limit the scope of the claims. One of ordinary skill in the art would recognize many variations, alternatives, and modifications. As shown in FIG. 5, the LED lighting system 600 includes a line (L) terminal and a neutral (N) terminal, and the system 600 also includes a TRIAC dimmer 590, a full-wave rectifying bridge 592 (e.g., a full-wave rectifying bridge BD1), a fuse 594, and a system controller 500. In some examples, the system controller 500 includes a constant current circuit 510 and a control circuit 520 (e.g., an enablement control circuit). For example, the system controller 500 is located on a chip. As an example, the constant current circuit 510 includes an amplifier 530 (e.g., an error amplifier U1), a transistor 532 (e.g., a transistor M1 for power regulation), and a resistor 534 (e.g., a sensing resistor R1). For example, the control circuit 520 includes a resistor 540 (e.g., a resistor R2), a resistor 542 (e.g., a resistor R3), a comparator 544 (e.g., a comparator U2), and a switch 546 (e.g., a switch SW1). In certain examples, the LED lighting system 400 provides a current 505 (e.g., an LED current I_led) that flows through the transistor 332 (e.g., the transistor M1 for power regulation), the resistor 334 (e.g., the sensing resistor R1), and one or more LEDs 690. For example, one or more LEDs 690 include multiple LEDs connected in series. Although the above has been shown using a selected group of components for the LED lighting system, there can be many alternatives, modifications, and variations. For example, some of the components may be expanded and/or combined. Other components may be inserted to those noted above. Depending upon the embodiment, the arrangement of components may be interchanged with others replaced. Further details of these components are found throughout the present specification.

In certain embodiments, an AC input voltage (e.g., VAC) is received by the TRIAC dimmer 590 and also rectified (e.g., by the full-wave rectifying bridge 592) to generate a rectified voltage 501 (e.g., a rectified voltage V_bulk). For example, the full-wave rectifying bridge 592 is coupled to the TRIAC dimmer 590 through the fuse 594. As an example, the rectified voltage 501 does not fall below the ground voltage of the system (e.g., zero volt). In some embodiments, the transistor 532 (e.g., the transistor M1 for power regulation) includes a source terminal 550, a gate terminal 552 and a drain terminal 554, the amplifier 530 (e.g., the error amplifier U1) includes input terminals 556 and 558 and an output terminal 560, and the resistor 534 (e.g., the sensing resistor R1) includes terminals 562 and 564. For example, the source terminal 550 of the transistor 532 is connected to the terminal 562 of the resistor 534, the gate terminal 552 of the transistor 532 is connected to the output terminal 560 of the amplifier 530, and the drain terminal 554 of the transistor 532 receives a rectified voltage 501 (e.g., a rectified voltage V_bulk). As an example, the terminal 564 of the resistor 534 is connected to an anode of the one or more LEDs 690, and a cathode of the one or more LEDs 690 is biased to the ground voltage of the system (e.g., zero volt). For example, the terminal 564 of the resistor 534 and the anode of the one or more LEDs 690 are biased to the ground voltage of the chip (e.g., the floating ground). As an example, the ground voltage of the chip (e.g., the floating ground) is different from the ground voltage of the system (e.g., zero volt).

According to certain embodiments, the resistor 540 (e.g., the resistor R2) includes terminals 566 and 568, the resistor 542 (e.g., the resistor R3) includes terminals 570 and 572, and the comparator 544 (e.g., the comparator U2) includes an input terminal 574 (e.g., a non-inverting terminal), an input terminal 576 (e.g., an inverting terminal), and an output terminal 578. In some examples, the terminal 566 of the resistor 540 is connected to the drain terminal 554 of the transistor 532, and the terminal 572 of the resistor 542 is biased to a ground voltage of the chip (e.g., a floating ground). For example, the ground voltage of the chip (e.g., the floating ground) is different from the ground voltage of the system (e.g., zero volt). As an example, the terminal 568 of the resistor 540 and the terminal 570 of the resistor 542 are connected at a node 580 (e.g., a node DS), and the node 580 (e.g., the node DS) is connected to the input terminal 574 of the comparator 544. For example, the input terminal 574 of the comparator 544 is configured to detect a change of a voltage 533 of the drain terminal 554 of the transistor 532. As an example, the voltage 533 of the drain terminal 554 of the transistor 532 is equal to the rectified voltage 501 (e.g., the rectified voltage V_bulk).

According to some embodiments, the input terminal 574 (e.g., the positive terminal) of the comparator 544 receives a voltage 575 of the node 580 (e.g., the node DS), which is connected to the terminal 568 of the resistor 540 and the terminal 570 of the resistor 542. For example, the voltage 575 is directly proportional to the voltage 533 of the drain terminal 554 of the transistor 532. As an example, the input terminal 576 (e.g., the negative terminal) of the comparator 544 receives a threshold voltage 577 (e.g., a threshold voltage V_th).

In certain embodiments, the comparator 544 compares the voltage 575 and the threshold voltage 577 and generates a control signal 579 (e.g., a control signal en). For example, if the voltage 575 is larger than the threshold voltage 577, the control signal 579 is at a logic high level. As an example, if the voltage 575 is smaller than the threshold voltage 577, the control signal 579 is at a logic low level. In some embodiments, the comparator 544 outputs the control signal 579 at the output terminal 578, and sends the control signal 579 to the switch 546 (e.g., the switch SW1) of the constant current circuit 510.

In some embodiments, the switch 546 includes terminals 582 and 584. For example, the terminal 582 is connected to the output terminal 560 of the amplifier 530, and the terminal 584 is biased to the ground voltage of the chip (e.g., the floating ground). For example, the ground voltage of the chip (e.g., the floating ground) is different from the ground voltage of the system (e.g., zero volt). As an example, the switch 546 receives the control signal 579. In certain examples, if the control signal 579 is at the logic high level, the switch 546 is open. For example, if the switch 546 is open, the constant current circuit 510 is enabled. As an example, if the switch 546 is open, a voltage 503 (e.g., a voltage Gate) of the gate terminal 552 of the transistor 532 is generated by the amplifier 530 (e.g., the error amplifier U1). In some examples, if the control signal 579 is at the logic low level, the switch 546 is closed. As an example, if the switch 546 is closed, the constant current circuit 510 is disabled. For example, if the switch 546 is closed, the voltage 503 of the gate terminal 552 of the transistor 532 is biased to the ground voltage of the chip (e.g., the floating ground). As an example, the ground voltage of the chip (e.g., the floating ground) is different from the ground voltage of the system (e.g., zero volt).

According to some embodiments, if the voltage 575 is smaller than the threshold voltage 577, the constant current circuit 510 is disabled by the control signal 579. For example, if the voltage 575 is smaller than the threshold voltage 577, the voltage 533 of the drain terminal 554 of the transistor 532 is too low for the LED lighting system 600 to provide a constant current to the one or more LEDs 690. As an example, if the constant current circuit 510 is disabled, the current 505 (e.g., the LED current I_led) that flows through the one or more LEDs 690 is equal to zero in magnitude. For example, if the voltage 575 is smaller than the threshold voltage 577, the constant current circuit 510 does not allow the current 505 (e.g., the LED current I_led) with a magnitude larger than zero to flow through the one or more LEDs 690.

According to certain embodiments, if the voltage 575 is larger than the threshold voltage 577, the constant current circuit 510 is enabled by the control signal 579. As an example, if the voltage 575 is larger than the threshold voltage 577, the voltage 533 of the drain terminal 554 of the transistor 532 is high enough for the LED lighting system 600 to provide a constant current to the one or more LEDs 690. For example, if the voltage 575 is larger than the threshold voltage 577, the voltage 533 of the drain terminal 554 of the transistor 532 is higher than the minimum voltage value that is needed for the LED lighting system 600 to provide a constant current to the one or more LEDs 690. As an example, if the constant current circuit 510 is enabled, the current 505 that flows through the one or more LEDs 690 is equal to a constant that is larger than zero in magnitude. For example, if the voltage 575 is larger than the threshold voltage 577, the constant current circuit 510 allows the current 505 (e.g., the LED current I_led) with a magnitude larger than zero to flow through the one or more LEDs 690.

As shown in FIG. 5, the amplifier 530 includes the input terminal 556 (e.g., a non-inverting terminal), the input terminal 558 (e.g., an inverting terminal), and the output terminal 560, according to one embodiment. In some examples, the input terminal 556 (e.g., the positive terminal) receives a reference voltage 557 (e.g., a reference voltage V_ref). In certain examples, the input terminal 558 (e.g., the negative terminal) is connected to the source terminal 550 of the transistor 532 and the terminal 562 of the resistor 534, and receives a voltage 559 (e.g., a voltage V_sense). For example, the terminal 564 of the resistor 534 is connected to the anode of the one or more LEDs 690, and the voltage 559 at the terminal 562 of the resistor 534 corresponds to the current 505 that flows through the one or more LEDs 690. As an example, if the switch 546 is open, the amplifier 530 (e.g., the error amplifier U1) generates the voltage 503 based at least in part on the reference voltage 557 (e.g., the reference voltage V_ref) and the voltage 559 (e.g., the voltage V_sense), and outputs the voltage 503 at the output terminal 560. For example, the voltage 503 is received by the gate terminal 552 of the transistor 532.

In some embodiments, after the constant current circuit 510 becomes enabled by the control signal 579, the voltage 503 of the gate terminal 552 generated by the amplifier 530 (e.g., the error amplifier U1) slowly increases from the ground voltage of the chip (e.g., the floating ground) to a desired voltage value, and the current 505 that flows through the one or more LEDs 690 also slowly increases from zero to a desired current value. For example, the voltage 503 slowly increases from the ground voltage of the chip (e.g., the floating ground) to the desired voltage value without overshoot and/or oscillation. As an example, the current 505 slowly increases from zero to the desired current value without overshoot and/or oscillation.

In certain embodiments, as shown in FIG. 5, the transistor 532 (e.g., the transistor M1 for power regulation) is a field effect transistor (e.g., a metal-oxide-semiconductor field effect transistor (MOSFET)). For example, the transistor 532 is an insulated gate bipolar transistor (IGBT). As an example, the transistor 532 is a bipolar junction transistor. In some examples, the system controller 600 includes more components or less components. In certain examples, the value of the reference voltage 557 (e.g., the reference voltage V_ref) and/or the value of the threshold voltage 577 (e.g., the threshold voltage V_th) can be set as desired by those skilled in the art.

According to certain embodiments, at time t₂₁, the TRIAC dimmer 590 stops clipping the AC input voltage (e.g., VAC), and the voltage 575 of the node 580 (e.g., the node DS) starts to increase but remains smaller than the threshold voltage 577 (e.g., the threshold voltage V_th). For example, at time t₂₁, the voltage 575 remains smaller than the threshold voltage 577, the control signal 579 (e.g., the control signal en) remains at the logic low level, and the voltage 503 (e.g., the voltage Gate) of the gate terminal 552 of the transistor 532 remains biased to the ground voltage of the chip (e.g., the floating ground). As an example, at time t₂₁, the constant current circuit 510 remains disabled by the control signal 579, and the current 505 (e.g., the LED current I_led) remains equal to zero in magnitude.

According to some embodiments, from time t₂₁to time t₂₂, the voltage 575 of the node 580 (e.g., the node DS) increases but remains smaller than the threshold voltage 577 (e.g., the threshold voltage V_th). For example, from time t₂₁to time t₂₂, the voltage 575 remains smaller than the threshold voltage 577, the control signal 579 (e.g., the control signal en) remains at the logic low level, and the voltage 503 (e.g., the voltage Gate) of the gate terminal 552 of the transistor 532 remains biased to the ground voltage of the chip (e.g., the floating ground). As an example, from time t₂₁to time t₂₂, the constant current circuit 510 remains disabled by the control signal 579, and the current 505 (e.g., the LED current I_led) remains equal to zero in magnitude.

According to certain embodiments, at time t₂₂, the voltage 575 of the node 580 (e.g., the node DS) becomes larger than the threshold voltage 577 (e.g., the threshold voltage V_th). For example, at time t₂₂, the voltage 575 becomes larger than the threshold voltage 577, the control signal 579 (e.g., the control signal en) changes from the logic low level to the logic high level, and the voltage 503 (e.g., the voltage Gate) of the gate terminal 552 of the transistor 532 starts to increase from the ground voltage of the chip (e.g., the floating ground). As an example, at time t₂₂, the constant current circuit 510 becomes enabled by the control signal 579, and the current 505 (e.g., the LED current I_led) starts to increase from zero in magnitude.

According to some embodiments, from time t₂₂to time t₂₃, the voltage 575 of the node 580 (e.g., the node DS) remains larger than the threshold voltage 577 (e.g., the threshold voltage V_th). In certain examples, from time t₂₂to time t₂₃, the voltage 575 remains larger than the threshold voltage 577, the control signal 579 (e.g., the control signal en) remains at the logic high level, and the voltage 503 (e.g., the voltage Gate) of the gate terminal 552 of the transistor 532 increases from the ground voltage of the chip (e.g., the floating ground) to a voltage level V₂₁. For example, the voltage level V₂₁is higher than a threshold voltage of the gate terminal for turning on the transistor 532 (e.g., the transistor M1 for power regulation). In some examples, from time t₂₂to time t₂₃, the constant current circuit 510 remains enabled by the control signal 579, and the current 505 (e.g., the LED current I_led) increases from zero to a current level 121. As an example, the current level 121 is a predetermined magnitude.

According to certain embodiments, at time t₂₃, the voltage 575 of the node 580 (e.g., the node DS) remains larger than the threshold voltage 577 (e.g., the threshold voltage V_th). In certain examples, at time t₂₃, the voltage 575 remains larger than the threshold voltage 577, the control signal 579 (e.g., the control signal en) remains at the logic high level, and the voltage 503 (e.g., the voltage Gate) of the gate terminal 552 of the transistor 532 reaches the voltage level V₂₁. In some examples, at time t₂₃, the constant current circuit 510 remains enabled by the control signal 579, and the current 505 (e.g., the LED current I_led) reaches the current level 121.

According to some embodiments, from time t₂₃to time t₂₄, the voltage 575 of the node 580 (e.g., the node DS) remains larger than the threshold voltage 577 (e.g., the threshold voltage V_th). In certain examples, from time t₂₃to time t₂₄, the voltage 575 remains larger than the threshold voltage 577, the control signal 579 (e.g., the control signal en) remains at the logic high level, and the voltage 503 (e.g., the voltage Gate) of the gate terminal 552 of the transistor 532 remains constant at the voltage level V₂₁. In some examples, from time t₂₃to time 124, the constant current circuit 510 remains enabled by the control signal 579, and the current 505 (e.g., the LED current I_led) remains constant at the current level 121.

According to certain embodiments, at time t₂₄, the voltage 575 of the node 580 (e.g., the node DS) becomes smaller than the threshold voltage 577 (e.g., the threshold voltage V_th). For example, at time t₂₄, the voltage 575 becomes smaller than the threshold voltage 577, the control signal 579 (e.g., the control signal en) changes from the logic high level to the logic low level, and the voltage 503 (e.g., the voltage Gate) of the gate terminal 552 of the transistor 532 decreases from the voltage level V₂₁to the ground voltage of the chip (e.g., the floating ground). As an example, at time t₂₄, the constant current circuit 510 becomes disabled by the control signal 579, and the current 505 (e.g., the LED current I_led) decreases from the current level 121 to zero.

According to some embodiments, from time t₂₄to time t₂₅, the voltage 575 of the node 580 (e.g., the node DS) remains smaller than the threshold voltage 577 (e.g., the threshold voltage V_th). For example, from time t₂₄to time t₂₅, the voltage 575 remains smaller than the threshold voltage 577, the control signal 579 (e.g., the control signal en) remains at the logic low level, and the voltage 503 (e.g., the voltage Gate) of the gate terminal 552 of the transistor 532 remains at the ground voltage of the chip (e.g., the floating ground). As an example, from time t₂₄to time t₂₅, the constant current circuit 510 remains disabled by the control signal 579, and the current 505 (e.g., the LED current I_led) remains at zero.

In some examples, the constant current module includes an amplifier, a transistor for power regulation, and a first resistor, wherein the source of the transistor is coupled to the first resistor, the gate of the transistor is coupled to the output of the amplifier, and the drain of the transistor is coupled to a cathode of the combination of the one or more LEDs. In certain examples, the enablement control module includes a second resistor and a third resistor connected in series, and a comparator, wherein the second resistor and the third resistor are connected to the drain of the transistor at one end and grounded at another end, the non-inverting input of the comparator is connected to a connection point of the first resistor and the second resistor, and the inverting input of the comparator receives the predetermined threshold voltage.

According to certain embodiments, a system (e.g., the system controller 300) for controlling one or more light emitting diodes includes a current regulation circuit (e.g., the constant current circuit 310) coupled to a cathode of one or more light emitting diodes (e.g., the one or more LEDs 490). The one or more light emitting diodes include the cathode and an anode configured to receive a rectified voltage (e.g., the rectified voltage 301). Additionally, the system includes a control circuit (e.g., the control circuit 320) coupled to the cathode of the one or more light emitting diodes. The control circuit is configured to receive a first voltage (e.g., the voltage 333) from the cathode of the one or more light emitting diodes, compare a second voltage (e.g., the voltage 375) and a threshold voltage (e.g., the threshold voltage 377), and generate a control signal (e.g., the control signal 379) based at least in part on the second voltage and the threshold voltage. The second voltage indicates a magnitude of the first voltage. The control circuit is further configured to: if the second voltage is larger than the threshold voltage, generate the control signal at a first logic level; and if the second voltage is smaller than the threshold voltage, generate the control signal at a second logic level. The current regulation circuit is configured to: receive the control signal from the control circuit; allow a current (e.g., the current 305) to flow through the one or more light emitting diodes if the control signal is at the first logic level, the current being larger than zero in magnitude; and not allow the current to flow through the one or more light emitting diodes if the control signal is at the second logic level. For example, the system (e.g., the system controller 300) is implemented according to at least FIG. 3.

As an example, the second voltage is directly proportional to the first voltage in magnitude. For example, the first logic level is a logic high level, and the second logic level is a logic low level. As an example, the current regulation circuit includes: an amplifier (e.g., the amplifier 330) including a first amplifier input terminal (e.g., the input terminal 356), a second amplifier input terminal (e.g., the input terminal 358), and an amplifier output terminal (e.g., the output terminal 360); a transistor (e.g., the transistor 332) including a drain terminal (e.g., the drain terminal 354), a gate terminal (e.g., the gate terminal 352), and a source terminal (e.g., the source terminal 350); and a resistor (e.g., the resistor 334) including a first resistor terminal (e.g., the terminal 362) and a second resistor terminal (e.g., the terminal 364); wherein: the drain terminal of the transistor is coupled to the cathode of the one or more light emitting diodes; the gate terminal of the transistor is coupled to the amplifier output terminal of the amplifier; and the source terminal of the transistor is coupled to the first resistor terminal of the resistor and the second amplifier input terminal of the amplifier. For example, the first amplifier input terminal of the amplifier is configured to receive a reference voltage (e.g., the reference voltage 357). As an example, the second resistor terminal of the resistor is configured to receive a ground voltage (e.g., zero volt).

For example, the control circuit includes: a first resistor (e.g., the resistor 340) including a first resistor terminal (e.g., the terminal 366) and a second resistor terminal (e.g., the terminal 368); a second resistor (e.g., the resistor 342) including a third resistor terminal (e.g., the terminal 370) and a fourth resistor terminal (e.g., the terminal 372), the third resistor terminal being connected to the second resistor terminal; and a comparator (e.g., the comparator 344) including a first comparator input terminal (e.g., the input terminal 374), a second comparator input terminal (e.g., the input terminal 376), and a comparator output terminal (e.g., the output terminal 378); wherein: the first resistor terminal is coupled to the cathode of the one or more light emitting diodes and configured to receive the first voltage; and the fourth resistor terminal is configured to receive a ground voltage (e.g., zero volt); wherein: the first comparator input terminal is coupled to the second resistor terminal and the third resistor terminal and configured to receive the second voltage; the second comparator input terminal is configured to receive a threshold voltage (e.g., the threshold voltage 377); and the comparator output terminal is configured to output the control signal based at least in part on the second voltage and the threshold voltage.

As an example, the current regulation circuit includes: an amplifier (e.g., the amplifier 330) including a first amplifier input terminal (e.g., the input terminal 356), a second amplifier input terminal (e.g., the input terminal 358), and an amplifier output terminal (e.g., the output terminal 360); a transistor (e.g., the transistor 332) including a drain terminal (e.g., the drain terminal 354), a gate terminal (e.g., the gate terminal 352), and a source terminal (e.g., the source terminal 350); and a third resistor (e.g., the resistor 334) including a fifth resistor terminal (e.g., the terminal 362) and a sixth resistor terminal (e.g., the terminal 364); wherein: the drain terminal of the transistor is coupled to the cathode of the one or more light emitting diodes; the gate terminal of the transistor is coupled to the amplifier output terminal of the amplifier; and the source terminal of the transistor is coupled to the fifth resistor terminal of the third resistor and the second amplifier input terminal of the amplifier. For example, the sixth resistor terminal is configured to receive the ground voltage.

As an example, the control circuit further includes: a switch (e.g., the switch 346) including a first switch terminal (e.g., the terminal 382) and a second switch terminal (e.g., the terminal 384); wherein: the first switch terminal is connected to the amplifier output terminal (e.g., the output terminal 360) of an amplifier (e.g., the amplifier 330); and the second switch terminal is configured to receive the ground voltage. For example, the control circuit is further configured to: open the switch if the control signal is at the first logic level; and close the switch if the control signal is at the second logic level.

In some examples, from a first time (e.g., time t₁₁) to a second time (e.g., time t₁₂), the second voltage (e.g., the voltage 375) increases but remains smaller than the threshold voltage (e.g., the threshold voltage 377), and the control signal remains at the second logic level; at the second time, the second voltage (e.g., the voltage 375) becomes larger than the threshold voltage (e.g., the threshold voltage 377), and the control signal changes from the second logic level to the first logic level; from the second time (e.g., time t₁₂) to a third time (e.g., time t₁₃), the second voltage remains larger than the threshold voltage, and the control signal remains at the first logic level; at the third time (e.g., time t₁₃), the second voltage remains larger than the threshold voltage, the control signal remains at the first logic level, and the current (e.g., the current 305) reaches a predetermined current level (e.g., the current level I₁₁); from the third time (e.g., time t₁₃) to a fourth time (e.g., time t₁₄), the second voltage remains larger than the threshold voltage, the control signal remains at the first logic level, and the current (e.g., the current 305) remains constant at the predetermined current level (e.g., the current level I₁₁); at the fourth time (e.g., time t₁₄), the second voltage becomes smaller than the threshold voltage, and the control signal changes from the first logic level to the second voltage level; and from the fourth time (e.g., time t₁₄) to a fifth time (e.g., time t₁₅), the second voltage remains smaller than the threshold voltage, and the control signal remains at the second voltage level.

According to some embodiments, a system (e.g., the system controller 500) for controlling one or more light emitting diodes includes a current regulation circuit (e.g., the constant current circuit 510) configured to receive a rectified voltage (e.g., the rectified voltage 501) and coupled to an anode of one or more light emitting diodes (e.g., the one or more LEDs 690). The one or more light emitting diodes include the anode and a cathode. Additionally, the system includes a control circuit (e.g., the control circuit 520) configured to receive the rectified voltage (e.g., the rectified voltage 501). The control circuit is configured to: compare an input voltage (e.g., the voltage 575) and a threshold voltage (e.g., the threshold voltage 577), the input voltage indicating a magnitude of the rectified voltage; and generate a control signal (e.g., the control signal 579) based at least in part on the input voltage and the threshold voltage. The control circuit is further configured to: if the input voltage is larger than the threshold voltage, generate the control signal at a first logic level; and if the input voltage is smaller than the threshold voltage, generate the control signal at a second logic level. The current regulation circuit is configured to: receive the control signal from the control circuit; allow a current (e.g., the current 505) to flow through the one or more light emitting diodes if the control signal is at the first logic level, the current being larger than zero in magnitude; and not allow the current to flow through the one or more light emitting diodes if the control signal is at the second logic level. For example, the system (e.g., the system controller 500) is implemented according to at least FIG. 5.

As an example, the input voltage is directly proportional to the rectified voltage in magnitude. For example, the first logic level is a logic high level; and the second logic level is a logic low level. As an example, the current regulation circuit includes: an amplifier (e.g., the amplifier 530) including a first amplifier input terminal (e.g., the input terminal 556), a second amplifier input terminal (e.g., the input terminal 558), and an amplifier output terminal (e.g., the output terminal 560); a transistor (e.g., the transistor 532) including a drain terminal (e.g., the drain terminal 554), a gate terminal (e.g., the gate terminal 552), and a source terminal (e.g., the source terminal 550); and a resistor (e.g., the resistor 534) including a first resistor terminal (e.g., the terminal 562) and a second resistor terminal (e.g., the terminal 564); wherein: the drain terminal of the transistor is configured to receive the rectified voltage (e.g., the rectified voltage 501); the gate terminal of the transistor is coupled to the amplifier output terminal of the amplifier; and the source terminal of the transistor is coupled to the anode of the one or more light emitting diodes (e.g., the one or more LEDs 690). For example, the first amplifier input terminal of the amplifier is configured to receive a reference voltage (e.g., the reference voltage 557). As an example, the cathode of the one or more light emitting diodes is configured to receive a ground voltage (e.g., zero volt).

For example, the control circuit includes: a first resistor (e.g., the resistor 540) including a first resistor terminal (e.g., the terminal 566) and a second resistor terminal (e.g., the terminal 568); a second resistor (e.g., the resistor 542) including a third resistor terminal (e.g., the terminal 570) and a fourth resistor terminal (e.g., the terminal 572), the third resistor terminal being connected to the second resistor terminal; and a comparator (e.g., the comparator 544) including a first comparator input terminal (e.g., the input terminal 574), a second comparator input terminal (e.g., the input terminal 576), and a comparator output terminal (e.g., the output terminal 578); wherein: the first resistor terminal is configured to receive the rectified voltage (e.g., the rectified voltage 501); and the fourth resistor terminal is configured to receive a ground voltage (e.g., the floating ground); wherein: the first comparator input terminal is coupled to the second resistor terminal and the third resistor terminal and configured to receive the input voltage; the second comparator input terminal is configured to receive a threshold voltage (e.g., the threshold voltage 577); and the comparator output terminal is configured to output the control signal based at least in part on the input voltage and the threshold voltage.

As an example, the current regulation circuit includes: an amplifier (e.g., the amplifier 530) including a first amplifier input terminal (e.g., the input terminal 556), a second amplifier input terminal (e.g., the input terminal 558), and an amplifier output terminal (e.g., the output terminal 560); a transistor (e.g., the transistor 532) including a drain terminal (e.g., the drain terminal 554), a gate terminal (e.g., the gate terminal 552), and a source terminal (e.g., the source terminal 550); and a third resistor (e.g., the resistor 534) including a fifth resistor terminal (e.g., the terminal 562) and a sixth resistor terminal (e.g., the terminal 564); wherein: the drain terminal of the transistor is configured to receive the rectified voltage (e.g., the rectified voltage 501); the gate terminal of the transistor is coupled to the amplifier output terminal of the amplifier; and the source terminal of the transistor is coupled to the fifth resistor terminal of the third resistor and the second amplifier input terminal of the amplifier. For example, the sixth resistor terminal is coupled to the anode of the one or more light emitting diodes.

As an example, the control circuit further includes: a switch (e.g., the switch 546) including a first switch terminal (e.g., the terminal 582) and a second switch terminal (e.g., the terminal 584); wherein: the first switch terminal is connected to the amplifier output terminal (e.g., the output terminal 560) of an amplifier (e.g., the amplifier 530); and the second switch terminal is configured to receive the ground voltage. For example, the control circuit is further configured to: open the switch if the control signal is at the first logic level; and close the switch if the control signal is at the second logic level.

In certain examples, from a first time (e.g., time t₂₁) to a second time (e.g., time t₂₂), the second voltage (e.g., the voltage 575) increases but remains smaller than the threshold voltage (e.g., the threshold voltage 577), and the control signal remains at the second logic level; at the second time, the second voltage (e.g., the voltage 575) becomes larger than the threshold voltage (e.g., the threshold voltage 577), and the control signal changes from the second logic level to the first logic level; from the second time (e.g., time t₂₂) to a third time (e.g., time t₂₃), the second voltage remains larger than the threshold voltage, and the control signal remains at the first logic level; at the third time (e.g., time t₂₃), the second voltage remains larger than the threshold voltage, the control signal remains at the first logic level, and the current (e.g., the current 505) reaches a predetermined current level (e.g., the current level I₂₁); from the third time (e.g., time t₂₃) to a fourth time (e.g., time t₂₄), the second voltage remains larger than the threshold voltage, the control signal remains at the first logic level, and the current (e.g., the current 505) remains constant at the predetermined current level (e.g., the current level I₂₁); at the fourth time (e.g., time t₂₄), the second voltage becomes smaller than the threshold voltage, and the control signal changes from the first logic level to the second voltage level; and from the fourth time (e.g., time t₂₄) to a fifth time (e.g., time t₂₅), the second voltage remains smaller than the threshold voltage, and the control signal remains at the second voltage level.

According to certain embodiments, a method for controlling one or more light emitting diodes includes: receiving a first voltage (e.g., the voltage 333) from a cathode of one or more light emitting diodes by a control circuit (e.g., the control circuit 320) coupled to the cathode of the one or more light emitting diodes, the one or more light emitting diodes including the cathode and an anode configured to receive a rectified voltage (e.g., the rectified voltage 301); comparing a second voltage (e.g., the voltage 375) and a threshold voltage (e.g., the threshold voltage 377), the second voltage indicating a magnitude of the first voltage; generating a control signal (e.g., the control signal 379) at a first logic level if the second voltage is larger than the threshold voltage; generating the control signal at a second logic level if the second voltage is smaller than the threshold voltage; receiving the control signal from the control circuit by a current regulation circuit (e.g., the constant current circuit 310) coupled to the cathode of one or more light emitting diodes (e.g., the one or more LEDs 490); allowing a current (e.g., the current 305) to flow through the one or more light emitting diodes if the control signal is at the first logic level, the current being larger than zero in magnitude; and not allowing the current to flow through the one or more light emitting diodes if the control signal is at the second logic level. For example, the method is implemented according to at least FIG. 3.

According to some embodiments, a method for controlling one or more light emitting diodes includes: receiving a rectified voltage (e.g., the rectified voltage 501) by a control circuit (e.g., the control circuit 520); comparing an input voltage (e.g., the voltage 575) and a threshold voltage (e.g., the threshold voltage 577), the input voltage indicating a magnitude of the rectified voltage; if the input voltage is larger than the threshold voltage, generating a control signal (e.g., the control signal 579) at a first logic level; if the input voltage is smaller than the threshold voltage, generating the control signal at a second logic level; receiving the control signal from the control circuit by a current regulation circuit (e.g., the constant current circuit 510) configured to receive the rectified voltage (e.g., the rectified voltage 501) and coupled to an anode of one or more light emitting diodes (e.g., the one or more LEDs 690), the one or more light emitting diodes including the anode and a cathode; allowing a current (e.g., the current 505) to flow through the one or more light emitting diodes if the control signal is at the first logic level, the current being larger than zero in magnitude; and not allowing the current to flow through the one or more light emitting diodes if the control signal is at the second logic level. For example, the method is implemented according to at least FIG. 5.

For example, some or all components of various embodiments of the present invention each are, individually and/or in combination with at least another component, implemented using one or more software components, one or more hardware components, and/or one or more combinations of software and hardware components. As an example, some or all components of various embodiments of the present invention each are, individually and/or in combination with at least another component, implemented in one or more circuits, such as one or more analog circuits and/or one or more digital circuits. For example, various embodiments and/or examples of the present invention can be combined.

Although specific embodiments of the present invention have been described, it will be understood by those of skill in the art that there are other embodiments that are equivalent to the described embodiments. Accordingly, it is to be understood that the invention is not to be limited by the specific illustrated embodiments, but only by the scope of the appended claims.

Claims

1. A system for controlling one or more light emitting diodes, the system comprising: a current regulation circuit configured to receive a rectified voltage and coupled to an anode of the one or more light emitting diodes, the one or more light emitting diodes including the anode and a cathode; anda control circuit configured to receive the rectified voltage and generate a control signal based at least in part on the rectified voltage;wherein the current regulation circuit is configured to: receive the control signal from the control circuit;allow a current to flow through the one or more light emitting diodes if the control signal is at the first logic level, the current being larger than zero in magnitude; andnot allow the current to flow through the one or more light emitting diodes if the control signal is at the second logic level;wherein the current regulation circuit includes: an amplifier including a first amplifier input terminal, a second amplifier input terminal, and an amplifier output terminal;a transistor including a drain terminal, a gate terminal, and a source terminal; anda third resistor including a fifth resistor terminal and a sixth resistor terminal;wherein: the drain terminal of the transistor is configured to receive the rectified voltage;the gate terminal of the transistor is coupled to the amplifier output terminal of the amplifier; andthe source terminal of the transistor is coupled to the fifth resistor terminal of the third resistor and the second amplifier input terminal of the amplifier.
2. The system of claim 1, wherein the control circuit is further configured to: compare an input voltage and a threshold voltage, the input voltage indicating a magnitude of the rectified voltage; andgenerate the control signal based at least in part on the input voltage and the threshold voltage;wherein the control circuit is further configured to: if the input voltage is larger than the threshold voltage, generate the control signal at a first logic level; andif the input voltage is smaller than the threshold voltage, generate the control signal at a second logic level.
3. The system of claim 2 wherein the input voltage is directly proportional to the rectified voltage in magnitude.
4. The system of claim 2 wherein: the first logic level is a logic high level; andthe second logic level is a logic low level.
5. The system of claim 1, wherein the control circuit includes: a first resistor including a first resistor terminal and a second resistor terminal;a second resistor including a third resistor terminal and a fourth resistor terminal, the third resistor terminal being connected to the second resistor terminal; anda comparator including a first comparator input terminal, a second comparator input terminal, and a comparator output terminal;wherein: the first resistor terminal is configured to receive the rectified voltage; andthe fourth resistor terminal is configured to receive a ground voltage;wherein: the first comparator input terminal is coupled to the second resistor terminal and the third resistor terminal and configured to receive the input voltage;the second comparator input terminal is configured to receive a threshold voltage; andthe comparator output terminal is configured to output the control signal based at least in part on the input voltage and the threshold voltage.
6. The system of claim 1 wherein the sixth resistor terminal is coupled to the anode of the one or more light emitting diodes.
7. The system of claim 1 wherein the control circuit further includes: a switch including a first switch terminal and a second switch terminal;wherein: the first switch terminal is connected to the amplifier output terminal of an amplifier; andthe second switch terminal is configured to receive the ground voltage.
8. The system of claim 7 wherein the control circuit is further configured to: open the switch if the control signal is at the first logic level; andclose the switch if the control signal is at the second logic level.
9. A method for controlling one or more light emitting diodes, the method comprising: receiving a rectified voltage by a current regulation circuit coupled to an anode of the one or more light emitting diodes;receiving the rectified voltage by a control circuit;generating a control signal based at least in part on the rectified voltage by the control circuit;receiving the control signal from the control circuit by the current regulation circuit;allowing a current to flow through the one or more light emitting diodes if the control signal is at the first logic level, the current being larger than zero in magnitude; andnot allowing the current to flow through the one or more light emitting diodes if the control signal is at the second logic level;wherein the current regulation circuit includes: an amplifier including a first amplifier input terminal, a second amplifier input terminal, and an amplifier output terminal;a transistor including a drain terminal, a gate terminal, and a source terminal; anda resistor including a first resistor terminal and a second resistor terminal;wherein: the drain terminal of the transistor is configured to receive the rectified voltage;the gate terminal of the transistor is coupled to the amplifier output terminal of the amplifier; andthe source terminal of the transistor is coupled to the anode of the one or more light emitting diodes.

1. CROSS-REFERENCES TO RELATED APPLICATIONS

This application is a continuation of U.S. patent application Ser. No. 17/023,632, filed Sep. 17, 2020, which is a divisional of U.S. patent application Ser. No. 16/226,424, filed Dec. 19, 2018, which claims priority to Chinese Patent Application No. 201711464007.9, filed Dec. 28, 2017, all of these applications being incorporated by reference herein for all purposes.

US Referenced Citations (315)

Number	Name	Date	Kind
3803452	Goldschmied	Apr 1974	A
3899713	Barkan et al.	Aug 1975	A
4253045	Weber	Feb 1981	A
5144205	Motto et al.	Sep 1992	A
5249298	Bolan et al.	Sep 1993	A
5504398	Rothenbuhler	Apr 1996	A
5949197	Kastner	Sep 1999	A
6196208	Masters	Mar 2001	B1
6218788	Chen et al.	Apr 2001	B1
6229271	Liu	May 2001	B1
6278245	Li et al.	Aug 2001	B1
7038399	Lys et al.	May 2006	B2
7649327	Peng	Jan 2010	B2
7759881	Melanson	Jul 2010	B1
7825715	Greenberg	Nov 2010	B1
7880400	Zhou et al.	Feb 2011	B2
7944153	Greenfeld	May 2011	B2
8018171	Melanson et al.	Sep 2011	B1
8098021	Wang et al.	Jan 2012	B2
8129976	Blakeley	Mar 2012	B2
8134302	Yang et al.	Mar 2012	B2
8278832	Hung et al.	Oct 2012	B2
8373313	Garcia et al.	Feb 2013	B2
8378583	Hying et al.	Feb 2013	B2
8378588	Kuo et al.	Feb 2013	B2
8378589	Kuo et al.	Feb 2013	B2
8415901	Recker et al.	Apr 2013	B2
8432438	Ryan et al.	Apr 2013	B2
8497637	Liu	Jul 2013	B2
8558477	Bordin et al.	Oct 2013	B2
8569956	Shteynberg et al.	Oct 2013	B2
8644041	Pansier	Feb 2014	B2
8653750	Deurenberg et al.	Feb 2014	B2
8686668	Grotkowski et al.	Apr 2014	B2
8698419	Yan et al.	Apr 2014	B2
8716882	Pettler et al.	May 2014	B2
8742674	Shteynberg et al.	Jun 2014	B2
8829819	Angeles et al.	Sep 2014	B1
8890440	Yan et al.	Nov 2014	B2
8896288	Choi et al.	Nov 2014	B2
8941323	Wu et al.	Jan 2015	B1
8941324	Zhou et al.	Jan 2015	B2
8941328	Wu et al.	Jan 2015	B2
8947010	Barrow et al.	Feb 2015	B2
9030122	Yan et al.	May 2015	B2
9084316	Melanson et al.	Jul 2015	B2
9131581	Hsia et al.	Sep 2015	B1
9148050	Chiang	Sep 2015	B2
9167638	Le	Oct 2015	B2
9173258	Ekbote	Oct 2015	B2
9207265	Grisamore et al.	Dec 2015	B1
9220133	Salvestrini et al.	Dec 2015	B2
9220136	Zhang et al.	Dec 2015	B2
9247623	Recker et al.	Jan 2016	B2
9247625	Recker et al.	Jan 2016	B2
9301349	Zhu et al.	Mar 2016	B2
9332609	Rhodes et al.	May 2016	B1
9402293	Vaughan et al.	Jul 2016	B2
9408269	Zhu et al.	Aug 2016	B2
9414455	Zhou et al.	Aug 2016	B2
9467137	Eum et al.	Oct 2016	B2
9480118	Liao et al.	Oct 2016	B2
9485833	Datta et al.	Nov 2016	B2
9554432	Zhu et al.	Jan 2017	B2
9572224	Gaknoki et al.	Feb 2017	B2
9585222	Zhu et al.	Feb 2017	B2
9655188	Lewis et al.	May 2017	B1
9661702	Mednik et al.	May 2017	B2
9723676	Ganick et al.	Aug 2017	B2
9750107	Zhu et al.	Aug 2017	B2
9781786	Ho et al.	Oct 2017	B2
9820344	Papanicolaou	Nov 2017	B1
9883561	Liang et al.	Jan 2018	B1
9883562	Zhu et al.	Jan 2018	B2
9961734	Zhu et al.	May 2018	B2
10054271	Xiong et al.	Aug 2018	B2
10153684	Liu et al.	Dec 2018	B2
10194500	Zhu et al.	Jan 2019	B2
10264642	Liang et al.	Apr 2019	B2
10292217	Zhu et al.	May 2019	B2
10299328	Fu et al.	May 2019	B2
10334677	Zhu et al.	Jun 2019	B2
10342087	Zhu et al.	Jul 2019	B2
10362643	Kim et al.	Jul 2019	B2
10375785	Li et al.	Aug 2019	B2
10383187	Liao et al.	Aug 2019	B2
10405392	Shi et al.	Sep 2019	B1
10447171	Newman et al.	Oct 2019	B2
10448469	Zhu et al.	Oct 2019	B2
10448470	Zhu et al.	Oct 2019	B2
10455657	Zhu et al.	Oct 2019	B2
10499467	Wang	Dec 2019	B2
10512131	Zhu et al.	Dec 2019	B2
10530268	Newman et al.	Jan 2020	B2
10531534	Zhou	Jan 2020	B1
10568185	Ostrovsky et al.	Feb 2020	B1
10616975	Gotou et al.	Apr 2020	B2
10687397	Zhu et al.	Jun 2020	B2
10785837	Li et al.	Sep 2020	B2
10827588	Zhu et al.	Nov 2020	B2
10973095	Zhu et al.	Apr 2021	B2
10999903	Li et al.	May 2021	B2
10999904	Zhu et al.	May 2021	B2
11026304	Li et al.	Jun 2021	B2
11183996	Zhu et al.	Nov 2021	B2
11201612	Zhu et al.	Dec 2021	B2
11206015	Zhu et al.	Dec 2021	B2
11212885	Liao et al.	Dec 2021	B2
11224105	Yang et al.	Jan 2022	B2
11252799	Li et al.	Feb 2022	B2
11297704	Zhu et al.	Apr 2022	B2
11405992	Li et al.	Aug 2022	B2
11564299	Li et al.	Jan 2023	B2
11570859	Zhu et al.	Jan 2023	B2
11638335	Zhu et al.	Apr 2023	B2
11678417	Yang et al.	Jun 2023	B2
11695401	Zhu et al.	Jul 2023	B2
11723128	Li et al.	Aug 2023	B2
11743984	Li et al.	Aug 2023	B2
20060022648	Ben-Yaakov et al.	Feb 2006	A1
20070182338	Shteynberg et al.	Aug 2007	A1
20070182699	Ha et al.	Aug 2007	A1
20070267978	Shteynberg et al.	Nov 2007	A1
20080224629	Melanson	Sep 2008	A1
20080224633	Melanson et al.	Sep 2008	A1
20080278092	Lys et al.	Nov 2008	A1
20090021469	Yeo et al.	Jan 2009	A1
20090085494	Summerland	Apr 2009	A1
20090251059	Veltman	Oct 2009	A1
20100141153	Recker et al.	Jun 2010	A1
20100148691	Kuo et al.	Jun 2010	A1
20100156319	Melanson	Jun 2010	A1
20100164406	Kost et al.	Jul 2010	A1
20100176733	King	Jul 2010	A1
20100207536	Burdalski et al.	Aug 2010	A1
20100213859	Shteynberg et al.	Aug 2010	A1
20100219766	Kuo et al.	Sep 2010	A1
20100231136	Reisenauer et al.	Sep 2010	A1
20110012530	Zheng et al.	Jan 2011	A1
20110037399	Hung et al.	Feb 2011	A1
20110074302	Draper et al.	Mar 2011	A1
20110080110	Nuhfer et al.	Apr 2011	A1
20110080111	Nuhfer et al.	Apr 2011	A1
20110080112	Shearer et al.	Apr 2011	A1
20110101867	Wang et al.	May 2011	A1
20110121744	Salvestrini et al.	May 2011	A1
20110121754	Shteynberg et al.	May 2011	A1
20110133662	Yan et al.	Jun 2011	A1
20110140620	Lin et al.	Jun 2011	A1
20110140621	Yi et al.	Jun 2011	A1
20110187283	Wang et al.	Aug 2011	A1
20110227490	Huynh	Sep 2011	A1
20110260619	Sadwick et al.	Oct 2011	A1
20110285301	Kuang et al.	Nov 2011	A1
20110291583	Shen	Dec 2011	A1
20110309759	Shteynberg et al.	Dec 2011	A1
20120001548	Recker et al.	Jan 2012	A1
20120032604	Hontele	Feb 2012	A1
20120056553	Koolen et al.	Mar 2012	A1
20120069616	Kitamura et al.	Mar 2012	A1
20120080944	Recker et al.	Apr 2012	A1
20120081009	Shteynberg et al.	Apr 2012	A1
20120081032	Huang	Apr 2012	A1
20120081035	McCune, Jr.	Apr 2012	A1
20120146526	Lam et al.	Jun 2012	A1
20120181944	Jacobs et al.	Jul 2012	A1
20120181946	Melanson	Jul 2012	A1
20120187857	Ulmann et al.	Jul 2012	A1
20120242237	Chen et al.	Sep 2012	A1
20120262093	Recker et al.	Oct 2012	A1
20120268031	Zhou et al.	Oct 2012	A1
20120274227	Zheng et al.	Nov 2012	A1
20120286679	Liu	Nov 2012	A1
20120299500	Sadwick et al.	Nov 2012	A1
20120299501	Kost et al.	Nov 2012	A1
20120299511	Montante et al.	Nov 2012	A1
20120319604	Walters	Dec 2012	A1
20120326616	Sumitani et al.	Dec 2012	A1
20130009561	Briggs	Jan 2013	A1
20130020965	Kang et al.	Jan 2013	A1
20130026942	Ryan et al.	Jan 2013	A1
20130026945	Ganick et al.	Jan 2013	A1
20130027528	Staats et al.	Jan 2013	A1
20130034172	Pettler et al.	Feb 2013	A1
20130043726	Krishnamoorthy et al.	Feb 2013	A1
20130049631	Riesebosch	Feb 2013	A1
20130063047	Veskovic	Mar 2013	A1
20130134904	Yau et al.	May 2013	A1
20130141001	Datta et al.	Jun 2013	A1
20130154487	Kuang et al.	Jun 2013	A1
20130162155	Matsuda et al.	Jun 2013	A1
20130162158	Pollischansky	Jun 2013	A1
20130169177	Liao et al.	Jul 2013	A1
20130175931	Sadwick	Jul 2013	A1
20130181630	Taipale et al.	Jul 2013	A1
20130187568	Jelaca et al.	Jul 2013	A1
20130193866	Datta et al.	Aug 2013	A1
20130193879	Sadwick et al.	Aug 2013	A1
20130194848	Bernardinis et al.	Aug 2013	A1
20130215655	Yang et al.	Aug 2013	A1
20130223107	Zhang et al.	Aug 2013	A1
20130229121	Otake et al.	Sep 2013	A1
20130241427	Kesterson et al.	Sep 2013	A1
20130241428	Takeda	Sep 2013	A1
20130241441	Myers et al.	Sep 2013	A1
20130242622	Peng et al.	Sep 2013	A1
20130249431	Shteynberg et al.	Sep 2013	A1
20130278159	Del et al.	Oct 2013	A1
20130307430	Blom	Nov 2013	A1
20130307431	Zhu et al.	Nov 2013	A1
20130307434	Zhang et al.	Nov 2013	A1
20130342127	Pan et al.	Dec 2013	A1
20130343090	Eom et al.	Dec 2013	A1
20140009082	King et al.	Jan 2014	A1
20140029315	Zhang et al.	Jan 2014	A1
20140049177	Kulczycki et al.	Feb 2014	A1
20140063857	Peng et al.	Mar 2014	A1
20140078790	Lin et al.	Mar 2014	A1
20140103829	Kang	Apr 2014	A1
20140132172	Zhu et al.	May 2014	A1
20140160809	Lin et al.	Jun 2014	A1
20140176016	Li et al.	Jun 2014	A1
20140177280	Yang et al.	Jun 2014	A1
20140197760	Radermacher	Jul 2014	A1
20140265898	Del et al.	Sep 2014	A1
20140265907	Su et al.	Sep 2014	A1
20140265935	Sadwick et al.	Sep 2014	A1
20140268935	Chiang	Sep 2014	A1
20140300274	Acatrinei	Oct 2014	A1
20140320031	Wu	Oct 2014	A1
20140333228	Angeles et al.	Nov 2014	A1
20140346973	Zhu et al.	Nov 2014	A1
20140354157	Morales	Dec 2014	A1
20140354165	Malyna et al.	Dec 2014	A1
20140354170	Gredler et al.	Dec 2014	A1
20150015159	Wang et al.	Jan 2015	A1
20150035450	Werner	Feb 2015	A1
20150048757	Boonen et al.	Feb 2015	A1
20150062981	Fang et al.	Mar 2015	A1
20150077009	Kunimatsu	Mar 2015	A1
20150091470	Zhou et al.	Apr 2015	A1
20150137704	Angeles et al.	May 2015	A1
20150173140	Wu et al.	Jun 2015	A1
20150312978	Vaughan et al.	Oct 2015	A1
20150312982	Melanson	Oct 2015	A1
20150312988	Liao et al.	Oct 2015	A1
20150318789	Yang et al.	Nov 2015	A1
20150333764	Pastore et al.	Nov 2015	A1
20150357910	Murakami et al.	Dec 2015	A1
20150359054	Lin et al.	Dec 2015	A1
20150366010	Mao et al.	Dec 2015	A1
20150382424	Knapp et al.	Dec 2015	A1
20160014861	Zhu et al.	Jan 2016	A1
20160014865	Zhu et al.	Jan 2016	A1
20160037604	Zhu et al.	Feb 2016	A1
20160113077	Akiyama	Apr 2016	A1
20160119998	Linnartz et al.	Apr 2016	A1
20160128142	Arulandu et al.	May 2016	A1
20160134187	Pregitzer et al.	May 2016	A1
20160277411	Dani et al.	Sep 2016	A1
20160286617	Takahashi et al.	Sep 2016	A1
20160323957	Hu et al.	Nov 2016	A1
20160338163	Zhu et al.	Nov 2016	A1
20170006684	Tu et al.	Jan 2017	A1
20170027029	Hu et al.	Jan 2017	A1
20170055323	Lim et al.	Feb 2017	A1
20170064787	Liao et al.	Mar 2017	A1
20170099712	Hilgers et al.	Apr 2017	A1
20170181235	Zhu et al.	Jun 2017	A1
20170196063	Zhu et al.	Jul 2017	A1
20170251532	Wang et al.	Aug 2017	A1
20170311409	Zhu et al.	Oct 2017	A1
20170354008	Eum et al.	Dec 2017	A1
20170359880	Zhu et al.	Dec 2017	A1
20180035507	Kumada et al.	Feb 2018	A1
20180103520	Zhu et al.	Apr 2018	A1
20180110104	Liang et al.	Apr 2018	A1
20180115234	Liu et al.	Apr 2018	A1
20180139816	Liu et al.	May 2018	A1
20180263089	Seyler et al.	Sep 2018	A1
20180288845	Zhu et al.	Oct 2018	A1
20180310376	Huang et al.	Oct 2018	A1
20190069364	Zhu et al.	Feb 2019	A1
20190069366	Liao et al.	Feb 2019	A1
20190082507	Zhu et al.	Mar 2019	A1
20190104583	Konishi et al.	Apr 2019	A1
20190124736	Zhu et al.	Apr 2019	A1
20190166667	Li et al.	May 2019	A1
20190230755	Zhu et al.	Jul 2019	A1
20190327810	Zhu et al.	Oct 2019	A1
20190350055	Wu et al.	Nov 2019	A1
20190350060	Li et al.	Nov 2019	A1
20190364628	Chen et al.	Nov 2019	A1
20190380183	Li et al.	Dec 2019	A1
20200100340	Zhu et al.	Mar 2020	A1
20200146121	Zhu et al.	May 2020	A1
20200205263	Zhu et al.	Jun 2020	A1
20200205264	Zhu et al.	Jun 2020	A1
20200267817	Yang et al.	Aug 2020	A1
20200305247	Li et al.	Sep 2020	A1
20200375001	Jung et al.	Nov 2020	A1
20210007195	Zhu et al.	Jan 2021	A1
20210007196	Zhu et al.	Jan 2021	A1
20210045213	Zhu et al.	Feb 2021	A1
20210153313	Li et al.	May 2021	A1
20210195709	Li et al.	Jun 2021	A1
20210204375	Li et al.	Jul 2021	A1
20220038085	Zhu et al.	Feb 2022	A1
20220149829	Zhu et al.	May 2022	A1
20220209762	Zhu et al.	Jun 2022	A1
20220210880	Li et al.	Jun 2022	A1
20220217824	Zhu et al.	Jul 2022	A1
20220225480	Li et al.	Jul 2022	A1
20220225483	Yang et al.	Jul 2022	A1
20230225028	Li et al.	Jul 2023	A1

Foreign Referenced Citations (134)

Number	Date	Country
1448005	Oct 2003	CN
101040570	Sep 2007	CN
101657057	Feb 2010	CN
101868090	Oct 2010	CN
101896022	Nov 2010	CN
101917804	Dec 2010	CN
101938865	Jan 2011	CN
101998734	Mar 2011	CN
102014540	Apr 2011	CN
102014551	Apr 2011	CN
102056378	May 2011	CN
102209412	Oct 2011	CN
102300375	Dec 2011	CN
102347607	Feb 2012	CN
102387634	Mar 2012	CN
102474953	May 2012	CN
102497706	Jun 2012	CN
102612194	Jul 2012	CN
202353859	Jul 2012	CN
102668717	Sep 2012	CN
102695330	Sep 2012	CN
102791056	Nov 2012	CN
102843836	Dec 2012	CN
202632722	Dec 2012	CN
102870497	Jan 2013	CN
102946674	Feb 2013	CN
103004290	Mar 2013	CN
103024994	Apr 2013	CN
103096606	May 2013	CN
103108470	May 2013	CN
103260302	Aug 2013	CN
103313472	Sep 2013	CN
103369802	Oct 2013	CN
103379712	Oct 2013	CN
103428953	Dec 2013	CN
103458579	Dec 2013	CN
103547014	Jan 2014	CN
103648219	Mar 2014	CN
103716934	Apr 2014	CN
103781229	May 2014	CN
103858524	Jun 2014	CN
203675408	Jun 2014	CN
103945614	Jul 2014	CN
103957634	Jul 2014	CN
104066254	Sep 2014	CN
104619077	May 2015	CN
204392621	Jun 2015	CN
104768265	Jul 2015	CN
104902653	Sep 2015	CN
105072742	Nov 2015	CN
105246218	Jan 2016	CN
105265019	Jan 2016	CN
105423140	Mar 2016	CN
105591553	May 2016	CN
105873269	Aug 2016	CN
105992440	Oct 2016	CN
106105395	Nov 2016	CN
106163009	Nov 2016	CN
205812458	Dec 2016	CN
106332374	Jan 2017	CN
106332390	Jan 2017	CN
106358337	Jan 2017	CN
106413189	Feb 2017	CN
206042434	Mar 2017	CN
106604460	Apr 2017	CN
106793246	May 2017	CN
106888524	Jun 2017	CN
106912144	Jun 2017	CN
107046751	Aug 2017	CN
107069726	Aug 2017	CN
107645804	Jan 2018	CN
107995747	May 2018	CN
107995750	May 2018	CN
207460551	Jun 2018	CN
108337764	Jul 2018	CN
108366460	Aug 2018	CN
207744191	Aug 2018	CN
207910676	Sep 2018	CN
108834259	Nov 2018	CN
109246885	Jan 2019	CN
208572500	Mar 2019	CN
109729621	May 2019	CN
110086362	Aug 2019	CN
110099495	Aug 2019	CN
110493913	Nov 2019	CN
2403318	Jan 2012	EP
2590477	May 2013	EP
2938164	Oct 2015	EP
2008-010152	Jan 2008	JP
2011-249328	Dec 2011	JP
201125441	Jul 2011	TW
201132241	Sep 2011	TW
201143501	Dec 2011	TW
201143530	Dec 2011	TW
201146087	Dec 2011	TW
201204168	Jan 2012	TW
201208463	Feb 2012	TW
201208481	Feb 2012	TW
201208486	Feb 2012	TW
201215228	Apr 2012	TW
201233021	Aug 2012	TW
201244543	Nov 2012	TW
I387396	Feb 2013	TW
201315118	Apr 2013	TW
201322825	Jun 2013	TW
201336345	Sep 2013	TW
201342987	Oct 2013	TW
201348909	Dec 2013	TW
I422130	Jan 2014	TW
I423732	Jan 2014	TW
201412189	Mar 2014	TW
201414146	Apr 2014	TW
I434616	Apr 2014	TW
M477115	Apr 2014	TW
201417626	May 2014	TW
201417631	May 2014	TW
201422045	Jun 2014	TW
201424454	Jun 2014	TW
I441428	Jun 2014	TW
I448198	Aug 2014	TW
201503756	Jan 2015	TW
201515514	Apr 2015	TW
I496502	Aug 2015	TW
201603644	Jan 2016	TW
201607368	Feb 2016	TW
I524814	Mar 2016	TW
I535175	May 2016	TW
I540809	Jul 2016	TW
201630468	Aug 2016	TW
201639415	Nov 2016	TW
I630842	Jul 2018	TW
201909699	Mar 2019	TW
201927074	Jul 2019	TW
2008112820	Sep 2008	WO

Non-Patent Literature Citations (72)

Entry
China Patent Office, Notice of Allowance dated Sep. 1, 2021, in Application No. 201911371960.8.
China Patent Office, Office Action dated Apr. 15, 2021, in Application No. 201911371960.8.
China Patent Office, Office Action dated Apr. 30, 2021, in Application No. 201910719931.X.
China Patent Office, Office Action dated Aug. 28, 2015, in Application No. 201410322602.9.
China Patent Office, Office Action dated Aug. 8, 2015, in Application No. 201410172086.6.
China Patent Office, Office Action dated Dec. 14, 2015, in Application No. 201210166672.0.
China Patent Office, Office Action dated Dec. 3, 2018, in Application No. 201710557179.4.
China Patent Office, Office Action dated Feb. 1, 2021, in Application No. 201911140844.5.
China Patent Office, Office Action dated Feb. 3, 2021, in Application No. 201911316902.5.
China Patent Office, Office Action dated Jan. 17, 2022, in Application No. 201910124049.0.
China Patent Office, Office Action dated Jan. 9, 2020, in Application No. 201710828263.5.
China Patent Office, Office Action dated Jul. 7, 2014, in Application No. 201210468505.1.
China Patent Office, Office Action dated Jun. 3, 2014, in Application No. 201110103130.4.
China Patent Office, Office Action dated Jun. 30, 2015, in Application No. 201410171893.6.
China Patent Office, Office Action dated Mar. 2, 2016, in Application No. 201410172086.6.
China Patent Office, Office Action dated Mar. 22, 2016, in Application No. 201410322612.2.
China Patent Office, Office Action dated Mar. 22, 2019, in Application No. 201711464007.9.
China Patent Office, Office Action dated May 26, 2021, in Application No. 201910124049.0.
China Patent Office, Office Action dated Nov. 15, 2014, in Application No. 201210166672.0.
China Patent Office, Office Action dated Nov. 15, 2021, in Application No. 201911316902.5.
China Patent Office, Office Action dated Nov. 2, 2020, in Application No. 201910124049.0.
China Patent Office, Office Action dated Nov. 23, 2021, in Application No. 201911140844.5.
China Patent Office, Office Action dated Nov. 29, 2018, in Application No. 201710828263.5.
China Patent Office, Office Action dated Oct. 19, 2015, in Application No. 201410322612.2.
China Patent Office, Office Action dated Sep. 2, 2016, in Application No. 201510103579.9.
Qi et al., “Sine Wave Dimming Circuit Based on PIC16 MCU,” Electronic Technology Application in 2014, vol. 10, (2014).
Taiwan Intellectual Property Office, Office Action dated Apr. 18, 2016, in Application No. 103140989.
Taiwan Intellectual Property Office, Office Action dated Apr. 27, 2020, in Application No. 108116002.
Taiwan Intellectual Property Office, Office Action dated Apr. 7, 2021, in Application No. 109111042.
Taiwan Intellectual Property Office, Office Action dated Aug. 23, 2017, in Application No. 106103535.
Taiwan Intellectual Property Office, Office Action dated Aug. 27, 2020, in Application No. 107107508.
Taiwan Intellectual Property Office, Office Action dated Dec. 27, 2019, in Application No. 108116002.
Taiwan Intellectual Property Office, Office Action dated Feb. 11, 2020, in Application No. 107107508.
Taiwan Intellectual Property Office, Office Action dated Feb. 27, 2018, in Application No. 106136242.
Taiwan Intellectual Property Office, Office Action dated Feb. 6, 2018, in Application No. 106130686.
Taiwan Intellectual Property Office, Office Action dated Jan. 14, 2019, in Application No. 107107508.
Taiwan Intellectual Property Office, Office Action dated Jan. 21, 2021, in Application No. 109108798.
Taiwan Intellectual Property Office, Office Action dated Jan. 4, 2021, in Application No. 109111042.
Taiwan Intellectual Property Office, Office Action dated Jan. 7, 2014, in Application No. 100119272.
Taiwan Intellectual Property Office, Office Action dated Jun. 16, 2020, in Application No. 108136083.
Taiwan Intellectual Property Office, Office Action dated Jun. 9, 2014, in Application No. 101124982.
Taiwan Intellectual Property Office, Office Action dated May 28, 2019, in Application No. 107112306.
Taiwan Intellectual Property Office, Office Action dated Nov. 13, 2015, in Application No. 103141628.
Taiwan Intellectual Property Office, Office Action dated Nov. 30, 2020, in Application No. 107107508.
Taiwan Intellectual Property Office, Office Action dated Oct. 31, 2019, in Application No. 107107508.
Taiwan Intellectual Property Office, Office Action dated Sep. 17, 2015, in Application No. 103127108.
Taiwan Intellectual Property Office, Office Action dated Sep. 17, 2015, in Application No. 103127620.
Taiwan Intellectual Property Office, Office Action dated Sep. 25, 2014, in Application No. 101148716.
Taiwan Intellectual Property Office, Office Action dated Sep. 9, 2020, in Application No. 108148566.
United States Patent and Trademark Office, Notice of Allowance dated Dec. 19, 2022, in U.S. Appl. No. 17/528,153.
United States Patent and Trademark Office, Notice of Allowance dated Feb. 14, 2023, in U.S. Appl. No. 17/520,573.
United States Patent and Trademark Office, Notice of Allowance dated Feb. 8, 2023, in U.S. Appl. No. 17/554,306.
United States Patent and Trademark Office, Notice of Allowance dated Jan. 19, 2023, in U.S. Appl. No. 17/528,153.
United States Patent and Trademark Office, Notice of Allowance dated Nov. 2, 2022, in U.S. Appl. No. 17/023,632.
United States Patent and Trademark Office, Notice of Allowance dated Oct. 4, 2022, in U.S. Appl. No. 17/554,306.
United States Patent and Trademark Office, Notice of Allowance dated Sep. 12, 2022, in U.S. Appl. No. 17/023,632.
United States Patent and Trademark Office, Office Action dated Apr. 26, 2022, in U.S. Appl. No. 17/023,632.
United States Patent and Trademark Office, Office Action dated Dec. 15, 2021, in U.S. Appl. No. 17/023,632.
United States Patent and Trademark Office, Office Action dated Feb. 3, 2023, in U.S. Appl. No. 17/503,238.
United States Patent and Trademark Office, Office Action dated Jan. 26, 2023, in U.S. Appl. No. 17/578,706.
United States Patent and Trademark Office, Office Action dated Jul. 15, 2022, in U.S. Appl. No. 17/528,153.
United States Patent and Trademark Office, Office Action dated Mar. 22, 2023, in U.S. Appl. No. 17/502,916.
United States Patent and Trademark Office, Office Action dated Oct. 19, 2022, in U.S. Appl. No. 17/520,573.
United States Patent and Trademark Office, Office Action dated Oct. 5, 2022, in U.S. Appl. No. 17/502,916.
United States Patent and Trademark Office, Office Action dated Sep. 12, 2022, in U.S. Appl. No. 17/503,238.
United States Patent and Trademark Office, Office Action dated Sep. 14, 2022, in U.S. Appl. No. 17/545,752.
United States Patent and Trademark Office, Office Action dated Sep. 16, 2022, in U.S. Appl. No. 17/578,706.
United States Patent and Trademark Office, Notice of Allowance dated Apr. 12, 2023, in U.S. Appl. No. 17/545,752.
United States Patent and Trademark Office, Notice of Allowance dated Aug. 3, 2023, in U.S. Appl. No. 18/081,528.
United States Patent and Trademark Office, Notice of Allowance dated Jun. 6, 2023, in U.S. Appl. No. 17/578,706.
United States Patent and Trademark Office, Notice of Allowance dated May 30, 2023, in U.S. Appl. No. 17/503,238.
United States Patent and Trademark Office, Office Action dated Sep. 19, 2023, in U.S. Appl. No. 17/502,916.

Related Publications (1)

	Number	Date	Country
	20230180360 A1	Jun 2023	US

Divisions (1)

	Number	Date	Country
Parent	16226424	Dec 2018	US
Child	17023632		US

Continuations (1)

	Number	Date	Country
Parent	17023632	Sep 2020	US
Child	18103971		US

LED lighting systems with TRIAC dimmers and methods thereof

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