Patent Application
20150171274
1. Technical Field
The present disclosure relates to a LED structure.
2. Related Art
With the continuing development of technology, light-emitting diodes (LEDs) have been widely used in illumination devices due to their high brightness and long life-span. In general, the epitaxial layer of commercial LED is typically grown on wafers of sapphire (sapphire substrate). Because the sapphire wafers are undesirably expensive, the silicon wafers (silicon substrates) are nowadays applied for the LED industry with the advantage of relatively inexpensive cost as compared to the sapphire substrates.
However, there are many problems with growing high quality GaN layers on silicon substrates, for example, the lattice constant of silicon is substantially different from the lattice constant of GaN. Besides, the silicon substrate and the GaN layer may have different coefficients of thermal expansion, so that non-uniform stress may cause cracking and other problems. In general, a high resistance buffer layer is commonly used to be disposed between the GaN layer and the silicon substrate, so that the GaN layer can be grown on the silicon substrate. In practice, the traditional high resistance buffer layer greatly increase the impedance between the LED electrodes that may cause problems such as, for example, non-uniform current distribution, high operating voltage, and low illumination efficiency.
According to one aspect of the present disclosure, a LED structure comprises an epitaxial layer, a current dispatching layer, a first electrode layer, and a second electrode layer. The epitaxial layer comprises sequentially disposed a high resistance buffer layer, a first GaN layer, an active layer, and a second GaN layer. A plurality of recesses are formed on a first surface of the epitaxial layer, each of the recesses has an opening on the first surface, penetrates the high resistance buffer layer, and contacts the first GaN layer. The current dispatching layer is disposed on the first surface of the epitaxial layer, and is disposed into the recesses for contacting the first GaN layer. The first electrode layer is disposed on the current dispatching layer, and the second electrode layer is disposed on a second surface of the epitaxial layer.
The present disclosure can be more fully understood by reading the following detailed description of the embodiment, with reference made to the accompanying drawings as follows:
a˜5f are a top view of the recesses according to an embodiment of the present disclosure.
The detailed features and advantages of the disclosure are described below in great detail through the following embodiments, the content of which is sufficient for those of ordinary skill in the art to understand the technical content of the disclosure and to implement the disclosure accordingly. Based upon the content of the specification, the claims, and the drawings, those of ordinary skill in the art can easily understand the relevant objectives and advantages of the disclosure.
Please referred to
The epitaxial layer 10 is a multi-layers structure, and the epitaxial layer 10 at least has a high resistance buffer layer 100, a first GaN layer 102, an active layer 104, and a second GaN layer 106. The high resistance buffer layer 100, the first GaN layer 102, the active layer 104, and the second GaN layer 106 are stacked sequentially. In practice, the first GaN layer 102 can be a high quality n-GaN layer, the active layer 104 can be a multiple quantum well (MQW) active layer, and the second GaN layer 106 can be a high quality p-GaN layer.
To be noted, the epitaxial layer 10 is originally grown on a silicon substrate (not shown, already removed in
In practice, the high resistance buffer layer 100, the first GaN (n-GaN) layer 102, the active (MQW) layer 104, and the second GaN (p-GaN) layer 106 are sequentially disposed on the silicon substrate in the first place. And then, the second electrode layer 16, the adhesive layer 18, the substrate 20, and the bottom metal layer 22 are sequentially disposed on the second GaN (p-GaN) layer 106. After the bottom metal layer 22 is formed, the silicon substrate can be removed, for example, by chemicals, so that the first surface of the epitaxial layer 10 can be exposed.
Moreover, a plurality of recesses 108 are formed on the first surface of the epitaxial layer 10, and each of the recesses 108 has an opening on the first surface. The recesses 108 penetrate though the high resistance buffer layer 100, and contact the first GaN layer 102. The recesses 108 are non-through holes formed on the epitaxial layer 10, but could be considered as through holes in view of the high resistance buffer layer 100. The diameter of each recess 108 may be 3˜5 μm (e.g. 4 μm) or 1˜20 μm.
And then, the current dispatching layer 12 can be disposed (could be pasted or coated) on the first surface of the epitaxial layer 10, and can be filled into the recesses 108. In practice, the current dispatching layer 12 could be only a thin film covering the side wall 108a and the bottom surface 108b of the recesses 108. The current dispatching layer 12 is made of conductive materials such as indium tin oxide (ITO), and the current dispatching layer 12 is configured to provide a current path directly from the first GaN layer 102 to the first surface of the epitaxial layer 10. Thus, the current path bypasses the high resistance buffer layer 100 to provide a shortcut without huge resistance. In an embodiment of the present disclosure, the current dispatching layer 12 which covers the side wall 108a of the recesses 108 can be considered as a vertical transparent conductive layer, and the current dispatching layer covers the bottom surface 108b of the recesses 108 can be considered as a horizontal ohmic contact layer.
After the current dispatching layer 12 is disposed, the first electrode layer 14 can be disposed on the current dispatching layer 12. In practice, the recesses 108 do not filled up with the current dispatching layer 12, and the first electrode layer 14 can also be filled into a part of the recesses 108. To be noted, the first electrode layer 14 may not fully cover the current dispatching layer 12. In practice, the first electrode layer 14 is made of metal material, which may block the emitted light, thus the first electrode layer 14 may only be disposed in specific pattern.
Besides, the high resistance buffer layer 100 could be roughened to increase the light illumination efficiency after the silicon substrate is removed, and the current dispatching layer 12 disposed on the roughened high resistance buffer layer 100 may or may not have a flat surface. The present disclosure does not limit the means to roughen the high resistance buffer layer 100 or to form the recesses 108 on the first surface of the epitaxial layer 10, those skilled in the art may select proper means.
In an embodiment of the present disclosure, the first surface of the roughened high resistance buffer layer 100 may smaller than 3 μm roughness (or gap depth) or have 2˜4 μm, and the roughened high resistance buffer layer 100 could be considered as a tiny prism array to increase the light illumination efficiency.
Please referred to
As shown in
To be noted, where the first GaN layer 102 contacts the bottom surface 108b of the recess 108 has a n-type doping density no less than 1×1018 cm−3. Therefore, the proper n-type doping density can provide good current conductivity that the current dispatching layer 12 and the first GaN layer 102 may form the current path mentioned above.
Please referred to
Therefore, the high resistance buffer layer 100 is bypassed, the present disclosure can reduce the equivalent impedance between LED electrodes to enhance illumination efficiency. Besides, the current dispatching layer 12 can also uniformize the current distribution within the active layer 104, because the number of the current paths which provide power to the first GaN layer 102 is greatly increased.
In general, increasing the number of the electrodes may be able to increase the uniformity of the current distribution, but the electrodes may block the light emitted from the active layer 104. The present disclosure utilizes the substantially transparent current dispatching layer 12 which does not block the light. Thus, the present disclosure does not need to increase the number of the electrodes (or covering area of the first electrode layer 14), and provides a solution to increase the uniformity of the current distribution.
Please referred to
Please referred to
As shown in
The embodiments depicted above and the appended drawings are exemplary and are not intended to be exhaustive or to limit the scope of the present disclosure to the precise forms disclosed. Many modifications and variations are possible in view of the above teachings.
