The exemplary and non-limiting embodiments of this invention relate generally to digital imaging devices such as digital cameras having one or more arrays of image sensors and corresponding lenslets.
This section is intended to provide a background or context to the invention that is recited in the claims. The description herein may include concepts that could be pursued, but are not necessarily ones that have been previously conceived or pursued. Therefore, unless otherwise indicated herein, what is described in this section is not prior art to the description and claims in this application and is not admitted to be prior art by inclusion in this section.
Digital imaging can be broken into two main categories. Complementary metal-oxide semiconductor CMOS technology uses an array of pixels whose outputs are read out by an integrated circuit. Often this read-out circuit and the pixel array are made as one semiconductor device, and together they are termed an image sensor. Each pixel contains a photodetector and possibly an amplifier. There are many types of such active pixel sensors, and CMOS is the technology commonly used in mobile phone cameras, web cameras, and some digital single-lens reflex camera systems. The other main category is a charge coupled device CCD which uses an array of diodes, typically embodied as an array of p-n junctions on a semiconductor chip. Analog signals at these diodes are integrated at one or chains of capacitors and the signal is also processed by a read-out circuit, and the capacitor arrangements may be within the readout circuit. Often, the term pixel is used generically, referring to both an active sensor pixel of CMOS devices and to a diode junction of a CCD system. The term ‘image sensing node’ is used herein generically for an individual image capturing element, and includes a CMOS pixel, a CCD diode junction, and individual image capture nodes of other technologies now available or yet to be developed.
Digital imaging systems (cameras) use an array of image sensing nodes aligned behind an array of lenslets which focus light onto the image sensing nodes. Each image sensing node has a corresponding lenslet, though this does not always mean a one-to-one correspondence of lenslet to image sensing node. It is known to use multiple arrays of image sensing nodes to improve resolution. For example, some commercial embodiments of this include multiple charge-coupled devices CCD, in which each CCD is a separate diode array and the multiple CCDs each image the scene simultaneously. For CMOS implementations, the different image sensing node arrays may be different image sensors disposed adjacent to one another behind the system aperture. There may be a single lenslet array for the multiple sensor arrays or a separate lenslet array corresponding to each sensor array.
Whatever the underlying image-capture technology, the lower resolution output of each of these different arrays is integrated into a higher resolution image by a super resolution algorithm. For example, one particular imaging system may have four arrays of image sensing nodes, each with a 2 MP (mega-pixel) resolution capacity, so that in the ideal the super resolution algorithm can generate from those four lower resolution images that are input to it a single 8 MP image.
Note that the above characterization is in the ideal. The super resolution algorithms work well if the arrays of image sensing nodes are aligned so that the system nodes are sampling at as high a frequency as possible. Super resolution algorithms rely on perfectly aligned sets of image sensing nodes. But for the case where the nodes are not correctly aligned with one another, the portion of the scene that the mis-aligned nodes captures overlaps, and the extent of the overlap represents oversampling of the scene and a reduction from a theoretical maximum resolution that the super resolution algorithm might otherwise generate. For example, if a CMOS system had two pixel arrays of 2 MP each and they were perfectly aligned, the resultant image from the super resolution algorithm would be 4 MP. With a 25% overlap due to pixel array mis-alignment, the final image would have a resolution of 3.5 MP (since 25% of the image captured by one pixel array is identical to that captured by the other array and so cannot add to resolution). This alone understates the true amount of resolution reduction. If we assume that perfect alignment would have each pixel imaging a separate and non-overlapping portion of the scene, the 25% overlap necessarily means that there is 25% of the scene imaged by one of the pixel arrays, or 12.5% of the entire scene, that is never captured. This is because the amount of the sample overlap with other pixels directly diminishes what is captured from the scene itself, since perfect alignment would have no overlap in the image captured by individual pixels. Thus while the resultant image may in fact be 3.5 MP, there are 12.5% discontinuities at the pixel level which occur during scene capture. Typically these are resolved by smoothing software before the final image is output for viewing by a user.
The above problem arises because it is very difficult to achieve perfectly accurate sub pixel alignment accuracies due to mechanical tolerances. In practical implementation, during mass production of a population of end-user imaging systems there would be a distribution of image resolution output by the different units of that population. To assume an extreme example, assume a population of four camera lenslet systems in which the best units have perfect alignment and the worst units have 100% overlap of all four lenslet systems. Those best units then have four times higher resolution than the worst systems, even though their underlying design and manufacturing processes are identical.
The foregoing and other problems are overcome, and other advantages are realized, by the use of the exemplary embodiments of this invention.
In a first exemplary and non-limiting aspect of this invention there is a method which comprises: digitally capturing a first set of samples of a scene with a first array of image sensing nodes while simultaneously digitally capturing a second set of samples of the scene with a second array of image sensing nodes. The image sensing nodes of the second array are oriented in a rotated position relative to the image sensing nodes of the first array. Further in the method, the first and second sets of samples are integrated with one another while correcting for the rotated orientation of the image sensing nodes of the second array relative to the image sensing nodes of the first array, and a high resolution image is output.
In a second exemplary and non-limiting aspect of this invention there is an apparatus comprising: at least a first array of image sensing nodes and a second array of image sensing nodes. The second array of image sensing nodes is oriented in a rotated position relative to the image sensing nodes of the first array. The apparatus further comprises at least one array of lenslets disposed to direct light from external of the apparatus toward the first and second arrays. The apparatus also comprises a memory storing a program that integrates outputs of the first and second arrays to a high resolution image while correcting for the rotated orientation of the image sensing nodes of the second array relative to the image sensing nodes of the first array. And this particular embodiment of the apparatus comprises also at least one processor that is configured to execute the stored program on outputs of the first and second arrays.
In a third exemplary and non-limiting aspect of this invention there is a computer readable memory storing a program of executable instructions. When executed by a processor the program result in actions comprising: digitally capturing a first set of samples of a scene with a first array of image sensing nodes while simultaneously digitally capturing a second set of samples of the scene with a second array of image sensing nodes. The image sensing nodes of the second array are oriented in a rotated position relative to the image sensing nodes of the first array. The actions further comprise integrating the first and second sets of samples with one another while correcting for the rotated orientation of the image sensing nodes of the second array relative to the image sensing nodes of the first array, and outputting a high resolution image.
Consider
A fourth array of image sensing nodes designed by the dotted + marks is oriented the same as the first array (rows and columns are parallel as between those two arrays) and the pixel sizes as illustrated appear to be the same (the size of the circle which is the portion of the scene that one pixel captures). In fact, they differ slightly as will be appreciated by an example below in which one pixel size is 0.9 units and another pixel size is 1.1 units. Note that the dashed + center-points of the fourth array in the
Now consider
Using the same convention as in
Individual image sensing nodes of the second array, which correspond to the dashed + marks at
From the examples at
As shown at
Assume that the first size is 1 arbitrary unit. If the second size is 2 units, there are many integer values which yield the same results for both arrays: e.g., 2*1=1*2; 4*1=2*2; 6*1=3*2, etc. This is a poor design from the perspective of increasing resolution regardless of nodes that are not perfectly aligned.
If instead the first size is 1.5 arbitrary units while the second size is 2 units, then there are still many integer values which yield the same result as these two arrays: e.g., 4*1.5=3*2; 8*1.5=6*2; 12*1.5=9*2; etc. There are fewer solutions than in the first example so the design is a bit improved, but not yet sufficiently good.
For a third example, assume that the first size is 0.9 arbitrary units while the second size is 1.1 units. In this case there are very few integer values which yield the same result as both arrays. One example is 33*0.9=27*1.1, but since there are relatively few occurrences for this size disparity this design is a better choice than either of the previous two examples.
As noted above, the rotation of image sensing nodes may also be used in combination with using nodes that capture different size portions of the scene being imaged. Varies the sampling even more than either one option alone.
Once the sensors are properly disposed, whether rotated relative to one another and/or different pixel sizes, then by calibrating the super resolution algorithm the end result is an improved resolution for the final image as compared to what the prior art would produce under conditions of manufacturing mis-alignment of the pixels in different arrays. This calibration computes the exact location of each sampling pixel, which is simply done because the randomized sampling arises from the rotation or different size pixels to begin with. Clearly sometimes individual pixels that correspond to one another but from different arrays will still overlap in some embodiments. While this causes a localized drop in resolution (as compared to idealized alignment) at that point of overlap, it is an acceptable outcome because the randomized sampling mitigates the likelihood that portions of the scene will not be imaged at all. In the prior art, such un-sampled portions are filled in by smoothing software, but in fact it remains that there is no actual sampling at those smoothed over discontinuities. Embodiments of this invention accept a reasonable likelihood of overlap for a much reduced likelihood that there will be un-sampled portions of the scene.
This randomness of sampling can be readily implemented for digital film. A digital film system can be implemented as a lenslet camera and utilizing the same approach as detailed above for image capture on a CMOS or CCD hardware array. For the digital film embodiment, individual nodes of the digital film to which individual lenslets image corresponding portions of the scene are in the position of the hardware nodes of the above CMOS or CCD implementations.
In another implementation shown at
Nodes in array A are oriented with the page and are used as an arbitrary reference orientation and size. Nodes in array B are rotated about 50 degrees relative to nodes in array A. Nodes in array C are rotated about 25 degrees relative to nodes in array A. Nodes in array D capture a larger size portion of the scene (larger pixel size) as compared to nodes in array A. Optionally, array D may be also rotated with respect to array A.
For convenience each rotated or different size node is shown as lying in a physically distinct substrate as compared to nodes of array A, but in an embodiment the different nodes may be disposed on the same substrate and nodes of one like-size or like-orientation array may be interspersed with nodes of a different like-size or like-orientation array. While this is relatively straightforward to do with different size nodes on a common substrate, from a manufacturing perspective it is anticipated to be a bit more costly to manufacture nodes with different rotation orientation on the same substrate, particularly for pixels in a CMOS implementation.
Shown are individual image sensing nodes A1 of array A, B1 of array B, C1 of array C and D1 of array D. These are corresponding nodes because they are positioned so as to capture a similar (at least partially overlapping) portion of the overall scene. At the lower portion of
There are numerous host devices in which embodiments of the invention can be implemented. One example host imaging system is disposed within a mobile terminal/user equipment UE, shown in a non-limiting embodiment at
At least one of the programs 10C and 12C is assumed to include program instructions that, when executed by the associated DP 10A, enable the apparatus 10 to operate in accordance with the exemplary embodiments of this invention, as detailed above by example. One such program 10C is the super resolution algorithm which calibrates and accounts for the different orientation and/or size of the nodes of the arrays. That is, the exemplary embodiments of this invention may be implemented at least in part by computer software executable by the DP 10A of the UE 10, or by a combination of software and hardware (and firmware).
In general, the various embodiments of the UE 10 can include, but are not limited to, cellular telephones, personal digital assistants (PDAs) or gaming devices having digital imaging capabilities, portable computers having digital imaging capabilities, image capture devices such as digital cameras, music storage and playback appliances having digital imaging capabilities, as well as portable units or terminals that incorporate combinations of such functions. Representative host devices need not have the capability, as mobile terminals do, of communicating with other electronic devices, either wirelessly or otherwise.
The computer readable memories as will be detailed below may be of any type suitable to the local technical environment and may be implemented using any suitable data storage technology, such as semiconductor based memory devices, flash memory, magnetic memory devices and systems, optical memory devices and systems, fixed memory and removable memory. The DP 10A may be of any type suitable to the local technical environment, and may include one or more of general purpose computers, special purpose computers, application specific integrated circuits, read-out integrated circuits, microprocessors, digital signal processors (DSPs) and processors based on a dual/multicore processor architecture, as non-limiting examples.
Within the sectional view of
Signals to and from the imaging system 28 pass through an image/video processor 44 which encodes and decodes the various image frames. The read-out circuitry is in one embodiment one with the image sensing nodes and in another embodiment is within the image/video processor 44. In an embodiment the image/video processor executes the super resolution algorithm. A separate audio processor 46 may also be present controlling signals to and from the speakers 34 and the microphone 24. The graphical display interface 20 is refreshed from a frame memory 48 as controlled by a user interface chip 50 which may process signals to and from the display interface 20 and/or additionally process user inputs from the keypad 22 and elsewhere.
Also shown for completeness are secondary radios such as a wireless local area network radio WLAN 37 and a Bluetooth® radio 39. Throughout the apparatus are various memories such as random access memory RAM 43, read only memory ROM 45, and in some embodiments removable memory such as the illustrated memory card 47 on which the various programs 10C are stored. The super resolution algorithm program may be stored on any of these individually, or in an embodiment is stored partially across several memories. All of these components within the UE 10 are normally powered by a portable power supply such as a battery 49.
The aforesaid processors 38, 40, 42, 44, 46, 50, if embodied as separate entities in a UE 10, may operate in a slave relationship to the main processor 10A, which then is in a master relationship to them. Any or all of these various processors of
Further at block 804 there is the step of integrating the first and second sets of samples with one another while correcting for the rotated orientation of the image sensing nodes of the second array relative to the image sensing nodes of the first array. This is done by the super resolution algorithm which accounts for the different relative orientations. What is eventually output is a high resolution image, high resolution meaning a resolution higher than is output from any one of the first or second arrays alone.
As detailed above the image sensing nodes may be pixels of a complementary metal-oxide semiconductor device, or diodes of a charge coupled device.
There may also be a third set of samples of the scene which are digitally captured with a third array of image sensing nodes, in which each image sensing node of the third array samples a different size portion of the scene as compared to the image sensing nodes of the first array. In this case the third set of samples is also integrated with the first and second sets of samples. In a particular CMOS embodiment, this is a larger pixel size at the third array as compared to the first array.
In one embodiment, each image sensing node of the second array samples a different size portion of the scene as compared to the image sensing nodes of the first array. This is a combination of the relative rotation orientation plus different size portion sampling. Whether combined with rotation orientation or not, in an embodiment the different size portions of the scene that make up the third set of samples (from the third array) is not an integer multiple of the size of the portions of the scene that make up the first set of samples (from the first array).
For an embodiment in which there are a total of N arrays of image sensing nodes, then N sets of samples of a scene are digitally captured with the N arrays of image sensing nodes, in which no pair of the N arrays exhibit both a same rotational orientation and a same portion size of the scene sampled by corresponding image sensing nodes. In this embodiment N is an integer at least equal to three, and
In another embodiment detailed with respect to
The various blocks shown in
In general, the various exemplary embodiments may be implemented in hardware or special purpose circuits, software, logic or any combination thereof. For example, some aspects may be implemented in hardware, while other aspects may be implemented in firmware or software which may be executed by a controller, microprocessor or other computing device, although the invention is not limited thereto. While various aspects of the exemplary embodiments of this invention may be illustrated and described as block diagrams, flow charts, or using some other pictorial representation, it is well understood that these blocks, apparatus, systems, techniques or methods described herein may be implemented in, as nonlimiting examples, hardware, software, firmware, special purpose circuits or logic, general purpose hardware or controller or other computing devices, or some combination thereof.
It should thus be appreciated that at least some aspects of the exemplary embodiments of the inventions may be practiced in various components such as integrated circuit chips and modules, and that the exemplary embodiments of this invention may be realized in an apparatus that is embodied as an integrated circuit. The integrated circuit, or circuits, may comprise circuitry (as well as possibly firmware) for embodying at least one or more of a data processor or data processors, a digital signal processor or processors, baseband circuitry and radio frequency circuitry that are configurable so as to operate in accordance with the exemplary embodiments of this invention.
Various modifications and adaptations to the foregoing exemplary embodiments of this invention may become apparent to those skilled in the relevant arts in view of the foregoing description, when read in conjunction with the accompanying drawings. However, any and all modifications will still fall within the scope of the non-limiting and exemplary embodiments of this invention.
It should be noted that the terms “connected,” “coupled,” or any variant thereof, mean any connection or coupling, either direct or indirect, between two or more elements, and may encompass the presence of one or more intermediate elements between two elements that are “connected” or “coupled” together. The coupling or connection between the elements can be physical, logical, or a combination thereof. As employed herein two elements may be considered to be “connected” or “coupled” together by the use of one or more wires, cables and/or printed electrical connections, as well as by the use of electromagnetic energy, such as electromagnetic energy having wavelengths in the radio frequency region, the microwave region and the optical (both visible and invisible) region, as several non-limiting and non-exhaustive examples.
Furthermore, some of the features of the various non-limiting and exemplary embodiments of this invention may be used to advantage without the corresponding use of other features. As such, the foregoing description should be considered as merely illustrative of the principles, teachings and exemplary embodiments of this invention, and not in limitation thereof.