Claims
- 1. A circuit, comprising:
a first transistor having a current path coupled between a supply terminal and a first output terminal, the first transistor current path having a width and a length; a second transistor having a current path coupled between the first output terminal and a reference terminal, the second transistor current path having substantially the same width and length as the first transistor current path; a first comparator circuit having first and second input terminals and having a second output terminal, the first input terminal coupled to the first output terminal, the first comparator circuit producing a control signal in response to a voltage between the first and second input terminals; and a generator circuit coupled to receive the control signal, the generator circuit producing an output voltage at the supply terminal.
- 2. A circuit as in claim 1, wherein each of the first and second transistors have respective bulk and source terminals, each bulk terminal connected to its respective source terminal.
- 3. A circuit as in claim 1, wherein one of the first and second transistors has a control gate coupled to an output terminal of a reference circuit.
- 4. A circuit as in claim 1, further comprising a first reference circuit including first and second sets of series-connected transistors, each set including at least one MOS transistor and at least one bipolar transistor, each MOS transistor in the first set having a corresponding transistor in the second set with substantially the same size, wherein each set of transistors is arranged to conduct substantially the same reference current.
- 5. A circuit as in claim 4, further comprising a second reference circuit including a reference transistor having a current path connected to a first resistive element and having a gate connected to the first reference circuit, the first resistive element further coupled to a reference terminal.
- 6. A circuit as in claim 5, wherein the second reference circuit further comprises at least another bipolar transistor in series with the reference transistor, the reference transistor arranged to conduct a current that is a multiple of the reference current, the second reference circuit producing a reference voltage that corresponds to a product of the multiple of the reference current and a resistance of the first resistive element.
- 7. A circuit as in claim 5, further comprising:
a second comparator circuit having first and second input terminals and having an output terminal, the first input terminal coupled to the first resistive element, the second comparator output terminal coupled to a feedback transistor; and a second resistive element coupled between a current path of the feedback transistor and the reference terminal, the second resistive element having plural output terminals distributed along the resistive element, each terminal producing a voltage corresponding to a product of a reference current through the resistive element and a resistance between each output terminal and the reference terminal.
- 8. A circuit as in claim 2, further comprising a first reference circuit including first and second sets of series-connected transistors, each set including at least one MOS transistor and at least one bipolar transistor, each MOS transistor in the first set having a corresponding transistor in the second set with substantially the same size, the first reference circuit having an output terminal coupled to a control gate of one of the first and second transistors, wherein each set of transistors is arranged to conduct substantially the same reference current.
- 9. A circuit as in claim 8, further comprising third and fourth transistors having bulk and source terminals and having current paths connected in series with current paths of the first and second transistors, wherein each bulk terminal is connected to its respective source terminal.
- 10. A circuit as in claim 8, further comprising a voltage multiplier circuit having an input terminal coupled to the output terminal of the first reference circuit, the voltage multiplier circuit having an output terminal coupled to the control gate of one of the first and second transistors.
- 11. A circuit, comprising:
a bandgap reference circuit including at least one bipolar transistor, the bandgap reference circuit arranged to produce a reference voltage corresponding to a current through the bipolar transistor; a multiplier circuit coupled to receive the reference voltage, the multiplier circuit producing a reference current through a resistive element in response to the reference voltage, the resistive element having plural output terminals along a length of the resistive element, the resistive element producing plural multiplied reference voltages at corresponding output terminals; a first transistor having a current path coupled between a supply terminal and a first output terminal, the first transistor current path having a width and a length; a second transistor having a current path coupled between the first output terminal and a reference terminal, the second transistor current path having substantially the same width and length as the first transistor current path, wherein one of the first and second transistors has a control gate coupled to receive at least one of the multiplied reference voltages; and a first comparator circuit having first and second input terminals and having a second output terminal, the first input terminal coupled to the first output terminal, the first comparator circuit arranged to produce a control signal in response to a voltage between the first and second input terminals.
- 12. A circuit as in claim 11, wherein the bandgap reference further comprises parallel current paths, each a current path including at least one MOS transistor and a bipolar transistor.
- 13. A circuit as in claim 11, wherein the resistive element of the multiplier circuit comprises P+ doped silicon.
- 14. A circuit as in claim 11, further comprising a multiplex circuit having an output terminal and coupled to receive at least one multiplied reference voltage and another reference voltage, the multiplex circuit producing said at least one multiplied reference voltage in response to a first logic state of a control signal, the multiplex circuit producing said another reference voltage in response to a second logic state of the control signal.
- 15. A circuit, comprising:
a bandgap reference circuit including at least one bipolar transistor, the bandgap reference circuit arranged to produce a reference voltage corresponding to a current through the bipolar transistor; a multiplier circuit coupled to receive the reference voltage, the multiplier circuit producing a reference current through a resistive element in response to the reference voltage, the resistive element having plural output terminals along a length of the resistive element, the resistive element producing plural multiplied reference voltages at corresponding output terminals; a comparator circuit having first and second input terminals and having a second output terminal, the first input terminal coupled to receive at least one multiplied reference voltage, the first comparator circuit arranged to produce a supply voltage at the second output terminal; and a supply reference circuit coupled between the second output terminal and a reference terminal, the supply reference circuit having at least one output terminal coupled to the second input terminal, the supply reference circuit arranged for producing a supply reference voltage having a magnitude that is different than a magnitude of the supply voltage.
- 16. A circuit as in claim 15, wherein the magnitude of the supply voltage is twice the magnitude of the supply reference voltage.
- 17. A circuit, comprising:
a first transistor having a current path coupled between a supply terminal and a first output terminal, the first transistor current path having a width and a length; a second transistor having a current path coupled between the first output terminal and a reference terminal, the second transistor current path having substantially the same width and length as the first transistor current path; a first comparator circuit having first and second input terminals and having a second output terminal, the first input terminal coupled to the first output terminal, wherein the first comparator circuit is enabled in response to a first logic state of a control signal and disabled in response to a second logic state of the control signal; and a feedback transistor having a control gate coupled to the second output terminal and having a current path coupled to the second input terminal.
- 18. A circuit as in claim 17, wherein the feedback transistor is an N-channel transistor.
- 19. A circuit as in claim 17, further comprising a load transistor in series with the feedback transistor current path, the load transistor controlling a magnitude of the current through the feedback transistor current path in response to a reference voltage.
- 20. A circuit as in claim 17, further including at least one resistive element coupled between respective current paths of the feedback transistor and the load transistor, wherein a reference voltage at one end of the resistive element is equal to a difference between a voltage at the first output terminal and a voltage that is a product of a current through the load transistor and a resistance of the resistive element.
- 21. A circuit as in claim 17, wherein the current path of each of the first and second transistors is enabled by the first logic state of the control signal.
CLAIM TO PRIORITY OF PROVISIONAL APPLICATION
[0001] This application claims priority under 35 U.S.C. § 119(e) (1) of provisional application number 60/098,671, filed Sep. 1, 1998.
Provisional Applications (1)
|
Number |
Date |
Country |
|
60098671 |
Sep 1998 |
US |
Divisions (1)
|
Number |
Date |
Country |
Parent |
09383696 |
Aug 1999 |
US |
Child |
09798172 |
Mar 2001 |
US |