LEVEL SHIFTER CIRCUIT

Abstract

A level shifter circuit, which includes a Schmitt trigger function, shifts voltage of a high level signal into a low voltage and shifts a signal at an intermediate value of an input voltage. The level shifter circuit includes an input terminal connected to low and high voltage circuits. The low voltage circuit outputs a low drive voltage or ground voltage. The high voltage circuit outputs a high drive voltage or a high reference voltage, which is supplied to an RS latch circuit via a potential adjustment circuit at a level equal to an output potential at the low voltage circuit. The RS latch circuit uses the output of the potential adjustment circuit when the input voltage shifts to a high level and uses the output of the low voltage circuit when the input voltage shifts to a low level.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

The invention, together with objects and advantages thereof, may best be understood by reference to the following description of the presently preferred embodiments together with the accompanying drawings in which:

FIG. 1 is a circuit diagram of a level shifter circuit including a Schmitt trigger function according to the present invention;

FIG. 2A is a chart showing changes in the voltage at a connection node in relation with the input voltage;

FIG. 2B is a chart showing changes in the voltage at the connection node in relation with the output voltage;

FIG. 3 is a circuit diagram of a level shifter circuit in a first prior art example;

FIG. 4A is a chart showing changes in the input voltage in relation with time in the first prior art example;

FIG. 4B is a chart showing changes in the voltage at the connection node in relation with time; and

FIG. 4C is a chart showing changes in the output voltage in relation with time;

FIG. 5 is a circuit diagram of a Schmitt trigger circuit in a second prior art example;

FIG. 6 is a chart showing changes in the output voltage in relation with the input voltage in the second prior art example; and

FIG. 7 is a circuit diagram of a level shifter circuit including a Schmitt trigger function that can be derived from the first and second prior art examples.

FIG. 8 is a diagram showing changes in the input voltage in relation with the output voltage in the level shifter circuit of FIG. 7.

Claims

1. A level shifter circuit comprising: a low voltage circuit for performing a switching operation in accordance with a first switching voltage, which changes in relation with an input voltage applied to an input terminal, to output voltage between a low drive voltage and a low reference voltage, which is lower than the low drive voltage;a high voltage circuit for performing a switching operation based on a second switching voltage, which is higher than the first switching voltage and changes in relation with the input voltage, to output voltage between a high drive voltage and a high reference voltage, which is lower than the high drive voltage;a potential adjustment circuit for shifting an output of the high voltage circuit from the high drive voltage to the low drive voltage and from the high reference voltage to the low reference voltage; andan output selection circuit for outputting a signal in accordance with an output of the potential adjustment circuit when a signal at the input terminal shifts from a low level to a high level, and for outputting a signal in accordance with an output of the low voltage circuit when the signal at the input terminal shifts from a high level to a low level.

2. The level shifter circuit according to claim 1, wherein: the high reference voltage is such that the difference between the low drive voltage and the low reference voltage is substantially equal to the difference between the high drive voltage and the high reference voltage; andthe potential adjustment circuit lowers the voltage output from the high voltage circuit by a predetermined potential to shift the high drive voltage to the low drive voltage and the high reference voltage to the low reference voltage.

3. The level shifter circuit according to claim 1, wherein: the low voltage circuit includes: a first voltage adjustment means for adjusting the first switching voltage in relation with the input voltage; anda complementary transistor circuit for performing a switching operation between the low drive voltage and the low reference voltage using an output of the first voltage adjustment means; andthe high voltage circuit includes: a second voltage adjustment means for adjusting the second switching voltage in relation with the input voltage; anda complementary transistor circuit for performing a switching operation between the high drive voltage and the high reference voltage using an output of the second voltage adjustment means.

4. The level shifter circuit according to claim 3, wherein: a voltage between the low reference voltage and the high drive voltage is used as the input voltage;the first voltage adjustment means includes an n-channel MOS transistor having a gate terminal supplied with a second low drive voltage, which is higher than the low drive voltage by a threshold voltage;the second voltage adjustment means includes a p-channel MOS transistor having a gate terminal supplied with a second high reference voltage, which is lower than the high reference voltage by a threshold voltage;the complementary transistor circuit of the low voltage circuit is supplied with the second low drive voltage via a third voltage adjustment means including an n-channel MOS transistor; andthe complementary transistor circuit of the high voltage circuit is supplied with the second high reference voltage via a fourth voltage adjustment means including a p-channel MOS transistor.

5. The level shifter circuit according to claim 1 wherein: the output selection circuit includes an RS circuit having an input terminal connected to an output terminal of the potential adjustment circuit and an output terminal of the low voltage circuit.