Level shifter

Abstract

A level shifter includes a reference voltage level and a voltage dividing circuit. The voltage dividing circuit is connected to the reference voltage level, a first voltage level, and a second voltage level. The second voltage level is between the reference voltage level and the first voltage level.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a circuit diagram of a conventional level shifter.

FIG. 2 is a block diagram of a level shifter according to an embodiment of the present invention.

FIG. 3 is a detailed circuit diagram of the level shifter shown in FIG. 2.

FIG. 4 is a detailed circuit diagram of another embodiment of the level shifter shown in FIG. 2.

DETAILED DESCRIPTION

Please refer to FIG. 2. FIG. 2 is a block diagram of a level shifter 200 according to an embodiment of the present invention. As shown in FIG. 2, the level shifter 200 includes a reference voltage level 210 and a voltage dividing circuit 220. The voltage dividing circuit 220 is coupled to the reference voltage level 210, a first voltage level, and a second voltage level. The voltage dividing circuit 220 of the present invention will perform a voltage dividing operation upon the reference voltage level 210 and the first voltage level to generate the second voltage level. In other words, since the voltage dividing circuit 220 performs the voltage dividing operation by using the reference voltage level 210 and the first voltage level, the second voltage level is between the reference voltage level 210 and the first voltage level. In view of the overall circuit configuration of the level shifter 200, the voltage dividing circuit of the level shifter 200 receives a first voltage level and then outputs a shifted second voltage level, thereby achieving the objective of shifting the first voltage level to the second voltage level.

Please refer to FIG. 3. FIG. 3 is a detailed circuit diagram of the level shifter 200 shown in FIG. 2. As shown in FIG. 3, the voltage dividing circuit 220 includes an output node A and two resistors R1, R2. Please note that the resistor R1 is coupled between the reference voltage source (the reference voltage level) 210 and the output node A, and the resistor R2 is coupled between the output node A and an input signal source V_in. The function and related operation of the level shifter 200 will be described in detail in the following disclosure.

Assume that the input signal V_in generated by the input signal source includes a high voltage level and a low voltage level. The high voltage level is represented by Va. For simplicity, the low voltage level is represented by the ground voltage 0V. Additionally, the reference voltage source will output a reference voltage level V1 continuously, and a voltage V_out at the output node A therefore can be calculated utilizing superposition as illustrated by the following formula (1):

V _out =V _in *R1/(R1+R2)+V1*R2/(R1+R2)   formula (1)

When the input signal V_in corresponds to the low voltage level (i.e. the ground voltage 0V), the voltage V_out at the output node A is represented by the following formula (2):

V _out(low) =V1*R2/(R1+R2)   formula (2)

When the input signal V_in corresponds to the high voltage level (i.e. the voltage level Va), the voltage V_out at the output node A is represented by the following formula (3):

V _out(high) =Va*R1/(R1+R2)+V1*R2/(R1+R2)   formula (3)

At this point, after processing by the level shifter 200, the input signal V_in originally corresponding to the ground voltage 0V and voltage level Va is converted to an output signal V_out having a low voltage level V1*R2/(R1+R2) and a high voltage level Va*R1/(R1+R2)+V1*R2/(R1+R2). As mentioned above, a circuit designer can obtain a corresponding proper voltage level of the output signal V_out by choosing a proper reference voltage level V1. For example, the conventional voltage shifter is used to amplify the level of the input signal V_in, while the level shifter 200 of the present invention shifts the original voltage level Va to Va*R1/(R1+R2)+V1*R2/(R1+R2). Therefore, the present invention only needs to set the reference voltage level V1 higher than the original voltage V_in and properly tune the resistance of the resistors R1, R2, and then the present invention can amplify the corresponding high voltage level of the input signal V_in.

In additional, the corresponding low voltage level of the input signal V_in is also converted from the original ground voltage 0V to V1*R2/(R1+R2). As mentioned above, the selected reference voltage level VI is usually not 0V, and the low voltage level V1*R2/(R1+R2) output by the level shifter therefore will be a little higher than the ground voltage 0V. Due to this property, the high voltage level and the low voltage level generated by the level shifter 200 of the present invention can be applied to many fields. For example, the high voltage level and the low voltage level output by the output node A can be fed to a hysteresis circuit to be referenced by the hysteresis circuit. The function and related operation of the hysteresis circuit are well known to a person of average skill in the pertinent art, and additional details are therefore omitted for the sake of brevity.

Please note that the aforementioned resistors R1, R2 are only used as a preferred embodiment of the present invention, but are not meant to be limitations of the present invention. In practical applications, the resistors R1, R2 can be realized by using other impedance devices. In other words, to achieve the same objective of voltage level shifting, the circuit designer only needs to properly choose impedance values of the impedance devices. Furthermore, the present invention does not limit how the resistors R1, R2 are realized in a practical implementation. For example, during the semiconductor process the resistors R1, R2 can be realized by transistors. This alternative design also falls within the scope of the present invention.

In the aforementioned embodiment, please note that the reference voltage level is a positive voltage level. The present invention can also be implemented by choosing a negative voltage level as the reference voltage level, however. Please refer to FIG. 4. FIG. 4 is a detailed circuit diagram of another embodiment of the level shifter shown in FIG. 2. Comparing the level shifter shown in FIG. 4 with the level shifter shown in FIG. 3, in this embodiment the level shifter 200 uses two transistors as the original resistors R1, R2. As shown in FIG. 4, the gate (control node) and the drain of the transistor R1 are coupled to the reference voltage level 210, and the source of the transistor R1 is coupled to the output node (second voltage level). The gate (control node) and the drain of the transistor R2 are coupled to the first voltage level (input signal V_in), and the source of the transistor R2 is coupled to the output node (second voltage level).

In addition, the reference voltage level 210 in this embodiment is a negative voltage level. Therefore, after the voltage dividing operation performed by the voltage dividing circuit 220, a similar level shifting result can be attained via the superposition. Since the related theorem and operation are described in the aforementioned embodiment, additional details are omitted here for the sake of brevity.

Please note that the voltage dividing circuit 220 can use a transistor acting as a resistor, and the other resistor remains the same. This alternative design also falls within the scope of the present invention.

Compared with the prior art, the level shifter of the present invention uses two resistors to form the voltage dividing circuit, achieving the level shifting objective. Therefore, the present invention not only uses fewer circuit components to realize the level shifter function, but also reduces the original high cost caused by implementing too many circuit components in the prior art level shifter.

Those skilled in the art will readily observe that numerous modifications and alterations of the device and method may be made while retaining the teachings of the invention. Accordingly, the above disclosure should be construed as limited only by the metes and bounds of the appended claims.

Claims

1. A level shifter, comprising: a reference voltage level; anda voltage dividing circuit, electrically connected to the reference voltage level, a first voltage level, and a second voltage level, wherein the second voltage level is between the reference voltage level and the first voltage level.

2. The level shifter of claim 1, wherein the reference voltage level is a positive voltage level.

3. The level shifter of claim 1, wherein the reference voltage level is a negative voltage level.

4. The level shifter of claim 1, wherein the voltage dividing circuit is implemented utilizing a first impedance unit and a second impedance unit.

5. The level shifter of claim 4, wherein the first impedance unit is a resistor component.

6. The level shifter of claim 4, wherein the first impedance is implemented utilizing a transistor.

7. The level shifter of claim 4, wherein the voltage dividing circuit comprises: a first resistor, having a node electrically connected to the reference voltage level and another node electrically connected to the second voltage level; anda second resistor, having a node electrically connected to the first voltage level and another node electrically connected to the second voltage level.

8. The level shifter of claim 1, wherein the voltage dividing circuit comprises: a first transistor, having a first node and a control node electrically connected to the reference voltage level and a second node electrically connected to the second voltage level; anda second transistor, having a first node and a control node electrically connected to the first voltage level and a second node electrically connected to the second voltage level.

9. A level shifter, comprising: a first impedance unit, having a node electrically connected to a reference voltage level and another node electrically connected to a second voltage level; anda second impedance unit, having a node electrically connected to a first voltage level and another node electrically connected to the second voltage level;wherein the second voltage level is between the reference voltage level and the first voltage level.

10. The level shifter of claim 9, wherein the reference voltage level is a positive voltage level.

11. The level shifter of claim 9, wherein the reference voltage level is a negative voltage level.

12. The level shifter of claim 9, wherein the first impedance unit is a resistor component.

13. The level shifter of claim 9, wherein the first impedance unit is implemented utilizing a transistor.