BRIEF DESCRIPTION OF THE DRAWINGS The invention can be more fully understood by reading the subsequent detailed description and examples with references made to the accompanying drawings, wherein:
FIG. 1 is a circuit diagram of a conventional light driving device;
FIG. 2 is a circuit diagram of a conventional light driving device;
FIG. 3 is a block diagram of a light driving device according to one embodiment of the invention;
FIG. 4 is a circuit diagram of the light driving device 300 shown in FIG. 3;
FIG. 5 is a timing diagram of signals for operation of the light driving device 300 shown in FIG. 4; and
FIG. 6 is a flow chart of a light driving method for driving lights according to an embodiment of the invention.
DETAILED DESCRIPTION OF THE INVENTION
The following description is of the best-contemplated mode of carrying out the invention. This description is made for the purpose of illustrating the general principles of the invention and should not be taken in a limiting sense. The scope of the invention is best determined by reference to the appended claims.
FIG. 3 is a block diagram of a light driving device according to one embodiment of the invention. The light driving device 300 comprises a signal generator 310, a demultiplexer 320 and at least one light driving circuit 330. The signal generator 310 generates a signal. The demultiplexer 320 converts the signal to at least one control signal. The light driving circuits 330 are controlled by the control signals. Preferably, the signal generator 310 is an LED pulse generator (LPG) which generates an LPG signal. Each light driving circuit 330 comprises a light emitting diode 331 and a switch 333. Preferably, the switch 333 is a MOS transistor. The light emitting diode 331 has a first terminal 332 connected to a first voltage VDD. The switch 333 has a first terminal (drain) 335 coupled to a second terminal 334 of the light emitting diode 331, a second terminal (source) 336 coupled to a second voltage VSS, and a third terminal (gate) 337 coupled to the demultiplexer 320 for receiving the control signal. Preferably, the first voltage VDD and the second voltage VSS are respectively a power supply voltage and a ground.
FIG. 4 is a circuit diagram of the light driving device 300 shown in FIG. 3. More specifically, the demultiplexer 320 comprises a D flip-flop 322, a first diode D1 and a second diode D2. The D flip-flop 322 has a data input terminal D, a clock terminal CLK, an output terminal Q and an inverting output terminal Q′. The clock terminal CLK receives the signal. The inverting output terminal Q′ outputs an output signal fed back to the data input terminal D. The output terminal and the inverting output terminal Q′ respectively control the light driving circuits 330. The first diode D1 has an anode 323 coupled to the output terminal Q and a cathode 325 coupled to the clock terminal CLK. The second diode D2 has an anode 327 coupled to the inverting output terminal Q′ and a cathode 328 coupled to the clock terminal CLK.
FIG. 5 is a timing diagram of signals for the operation of the light driving device 300 shown in FIG. 4. LPG represents a signal generated by the signal generator 310. Q and Q′ respectively represent output signals of the output terminal Q and the inverting output terminal Q′. A and B respectively represent voltage levels of the nodes A and B shown in FIG. 4. When signals Q and Q′ respectively start in low and high levels, operation of the light driving device 300 can be divided into four stages. In the first stage, when the signal LPG transits from low level to high level, the logic state of the signal Q′ is then latched via the data input terminal D. As a result, the signal Q transits from low level to high level and the signal Q′ transits from high level to low level. Thus, the first and second diodes D1, D2 are reverse-biased and the nodes A and B are respectively at high and low levels. In the second stage, when the signal LPG transits from high level to low level, the first diode D1 is forward biased such that the node A is pulled to low level and the node B stays in low level. In the third stage, when the signal LPG transits again from low level to high level, the logic state of the signal Q′ is then latched via the data input terminal D. As a result, the signal Q transits from high level to low level and the signal Q′ transits from low level to high level. Thus, the first diode D1 and the second diode D2 are reverse biased such that the node A stays in low level and the node B transits from low level to high level. In the fourth stage, when the signal LPG transits from high level to low level, the second diode D2 is forward biased such that the node B is pulled to low level and the node A still stays in low level. As a result, the four stages repeat again and again and the light emitting diodes 331 are alternately turned ON/OFF with a period twice of that of the LPG signal.
The present invention also provides a light driving method for driving lights. As shown in FIG. 6, the method comprises generating a signal (610), converting the generated signal to a first control signal and a second control signal (620), and controlling two lights according to the first control signal and the second control signal (630). More specifically, the generated signal is an LPG signal and the lights are light emitting diodes.
Compared with a traditional light driving device in which one LPG pin only controls one light emitting diode, the light driving device according to the present invention controls more than one light emitting diode with one LPG pin such that LPG pins can be saved. In addition, flashing duty cycles of the light emitting diodes can be controlled by setting the period and duty cycle of one LPG signal in software associated with the light driving device.
While the invention has been described by way of example and in terms of preferred embodiment, it is to be understood that the invention is not limited thereto. To the contrary, it is intended to cover various modifications and similar arrangements as would be apparent to those skilled in the art. Therefore, the scope of the appended claims should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements.
Patent Application
20080007419
