This application claims priority of Chinese Invention Patent Application No. 202111076835.1, filed on Sep. 14, 2021.
The disclosure relates to a light-emitting device and a display device.
Light-emitting diodes (LEDs) are solid-state semiconductor light-emitting devices which include different types of light-emitting materials and light-emitting components. LEDs, having advantages such as low cost, low power consumption, high luminous efficiency, small size, energy saving, and good photoelectric properties, are widely used in various applications such as lighting devices, visible light communication devices, and display devices.
An object of the disclosure is to provide a light-emitting device with high reliability.
According to a first aspect of the disclosure, a light-emitting device include a substrate, a semiconductor structure, and an insulating reflective layer. The substrate has an upper surface and a lower surface opposite to the upper surface. The semiconductor structure is disposed on the upper surface of the substrate, and includes a first semiconductor layer, a second semiconductor layer, and a light-emitting layer disposed between the first semiconductor layer and the second semiconductor layer. A projection of the semiconductor structure on the upper surface of the substrate has an outer periphery spaced apart a distance (D2) from an outer periphery of the upper surface of the substrate. The insulating reflective layer covers at least a part of the semiconductor structure and has an extending portion extending outwardly from the semiconductor structure and covering a part of the upper surface of the substrate. A peripheral end of the extending portion of the insulating reflective layer has an inclined lateral surface, and an included angle defined between the inclined lateral surface and the upper surface of the substrate is not less than 60°.
According to a second aspect of the disclosure, a display device includes a mounting element and the aforesaid light-emitting device that is mounted on the mounting element.
Other features and advantages of the disclosure will become apparent in the following detailed description of the embodiment(s) with reference to the accompanying drawings. It is noted that various features may not be drawn to scale.
Before the disclosure is described in greater detail, it should be noted that where considered appropriate, reference numerals or terminal portions of reference numerals have been repeated among the figures to indicate corresponding or analogous elements, which may optionally have similar characteristics.
Referring to
The light-emitting device may be a common size LED, which have a horizontal cross-sectional area ranging from about 90000 μm2 to about 2000000 μm2.
The light-emitting device may be a small size or a mini LED, which have a horizontal cross-sectional area less than 90000 μm2. For example, the light-emitting device may have a length and a width at least one of which ranges 100 μm to 300 μm, and a thickness which ranges 40 μm to 150 μm.
The light-emitting device may be a micro LED, which have a horizontal cross-sectional area less than 10000 μm2. For example, the light-emitting device may have a length ranging from 2 μm to 100 μm, a width ranging from 2 μm to 100 μm, and a thickness ranging from 2 μm to 100 μm. However, the length, width and thickness of the light-emitting device of the disclosure are not limited to such ranges.
The substrate 10 has an upper surface 11 and a lower surface 12 opposite to the upper surface 11. The semiconductor structure 20 is disposed on the upper surface 11 of the substrate 10. The substrate 10 may be a light-transmissive substrate, an opaque substrate, or a translucent substrate. When the substrate 10 is a light-transmissive substrate or a translucent substrate, light emitted from the semiconductor structure 20 may pass through the substrate 10 in a direction away from the semiconductor structure 20. In certain embodiments, the substrate 10 may be a growth substrate provided for growth of the semiconductor structure 20. As a growth substrate, the substrate 10 may be a sapphire substrate, a silicon nitride (SiN) substrate, a silicon substrate, a gallium nitride (GaN) substrate, or an aluminum nitride (AlN) substrate. In certain embodiments, the substrate 10 may have a thickness less than the short side length of the light-emitting device. In certain embodiments, the substrate 10 may have a thickness less than 200 μm, e.g., 150 μm, 100 μm, or 80 μm.
In this embodiment, at least a portion of the upper surface 11 of the substrate 10 is formed with an uneven structure 13 for improving the external light extraction efficiency and the crystallinity of a semiconductor material that forms the semiconductor structure 20. In this embodiment, the uneven structure 13 has structured elements which are dome-shaped protrusions. In other embodiments, the structured elements of the uneven structure 13 are protrusions, that may have at least one of a trapezoid-shape, a circular cone-shape, a triangular cone-shape, a hexagonal cone-shape, a circle-like cone-shape, a triangle-like cone-shape, and a hexagon-like cone-shape. The uneven structure 13 may be formed by embossing, dry etching, or wet etching. The uneven structure 13 may be formed at any selected areas on the substrate 10, or may be omitted. For example, the lower surface 12 of the substrate 10 may be formed with the uneven structure 13 for improving the external light extraction efficiency of the semiconductor material that forms the semiconductor structure 20. In some embodiments, the uneven structure 13 has structured elements or protrusions that are distributed on the upper surface 11 of the substrate 10. The uneven structure 13 and the substrate 10 may be made of a same material or different materials. If the uneven structure 13 and the substrate 10 are made of different materials, the material of the uneven structure 13 may have a refractive index that is lower than that of the material of the substrate 10, so as to improve the external light extraction efficiency of the light-emitting device. In some embodiments, the uneven structure 13 is made of SiO2 and has protrusions of substantially circular cone-shape. In other embodiments, the uneven structure 13 include at least one layer having a refractive index lower than that of the substrate 10. For example, the uneven structure 13 may be configured to have double layers; the bottom layer thereof may be made of a material the same as that of the substrate 10, while the top layer thereof is made of a material having a refractive index lower than that of the material of the substrate 10. In such configuration, the top layer may have a thickness more than twice that of the bottom layer.
The semiconductor structure 20 may have a lower surface with an area that is smaller than an area of the upper surface 11 of the substrate 10, such that a portion of the upper surface 11 of the substrate 10 located around the semiconductor structure 20 is exposed. When the semiconductor structure 20 is subjected to a multi-focus cutting process, if a focus is too close to the semiconductor structure 20, the semiconductor structure 20 may be damaged. In order to avoid such situation, as shown in
In this embodiment, since the portion of the upper surface 11 of the substrate 10 that is located around the semiconductor structure 20 is exposed, a warpage of the light-emitting device can be reduced during the manufacturing process thereof, thereby preventing the semiconductor structure 20 from being damaged, and improving the manufacturing yield of light-emitting devices. In addition, as the risk of warpage of the light-emitting device may be reduced, stress imposed on the semiconductor structure 20 may also be reduced, so that the substrate 10 can be made thinner. In this embodiment, the substrate 10 is a sapphire substrate having the upper surface 11 which is formed with the uneven structure 13. However, in other embodiments, the substrate 10 can be omitted.
The semiconductor structure 20 is disposed on the upper surface 11 of the substrate 10, and includes a first semiconductor layer 21, a second semiconductor layer 23, and a light-emitting layer 22 disposed between the first semiconductor layer 21 and the second semiconductor layer 23.
In this embodiment, the first semiconductor layer 21, the light-emitting layer 22, and the second semiconductor layer 23 are epitaxially formed on the substrate 10. In other embodiments, the semiconductor structure 20 may be attached to the substrate 10 by an adhesive layer (not shown). The adhesive layer may be a light-transmissive material or a translucent material, such as silicon dioxide, aluminum oxide, etc.
The first semiconductor layer 21 of the semiconductor structure 20 is disposed on the upper surface 11 of the substrate 10. In some embodiments, the first semiconductor layer 21 is an N-type doped layer. For example, the first semiconductor layer 21 may be made of a Group II-VI semiconductor material such as zinc selenide (ZnSe), or a Group III-V nitride material such as gallium nitride (GaN), aluminum nitride (AlN), indium nitride (InN), indium gallium nitride (InGaN), aluminum gallium nitride (AlGaN), and aluminum indium gallium nitride (AlInGaN). The first semiconductor layer 21 may include dopants such as silicon (Si) or germanium (Ge). In certain embodiments, the first semiconductor layer 21 may have a single-layer or multilayered structure.
The light-emitting layer 22 is disposed on the first semiconductor layer 21. The light-emitting layer 22 can emit light of different wavelengths depending on its material. For example, the light-emitting layer 22 made of InGaN materials can emit blue light (including dark blue light) with a wavelength between 400 nm and 490 nm, or green light with a wavelength between 490 nm and 550 nm. The light-emitting layer 22 made of AlGaN materials can emit UV light with a wavelength between 220 nm and 400 nm. In some embodiments, the light-emitting layer 22 may include at least one undoped semiconductor layer or at least one low-doped layer. For example, the light-emitting layer 22 may be a single quantum well layer, which may increase the electron-hole collision rate so as to enhance the electron-hole binding rate and luminescence efficiency, and which may include InGaN or GaN. In certain embodiments, the light-emitting layer 22 may be a multi-layer quantum well structure.
The second semiconductor layer 23 is disposed on the light-emitting layer 22. In some embodiments, the second semiconductor layer 23 is a P-type doped layer. For example, the second semiconductor layer 23 may be made of a Group III-V nitride material such as gallium nitride (GaN), aluminum nitride (AlN), indium nitride (InN), indium gallium nitride (InGaN), aluminum gallium nitride (AlGaN), or aluminum indium gallium nitride (AlInGaN). The second semiconductor layer 23 may include dopants such as magnesium (Mg) or carbon (C). In certain embodiments, the second semiconductor layer 23 may have a single-layer or multilayered structure.
Referring to
The first contact electrode 41 is disposed on and electrically connected to the first semiconductor layer 21 of the semiconductor structure 20. The second contact electrode 42 is disposed on and electrically connected to the second semiconductor layer 23. Referring to
In some embodiments, the light-emitting device may include a plurality of the first contact electrodes 41 and a plurality of the second contact electrodes 42.
In some embodiments, the second contact electrode 42 may at least include a main part 42a and two extending parts 42b each of that has an arc-shape and extends gradually outward with the distance from the main part 42a. The angle between the tangent line of the extending part 42b and the line X-X′ (see
The first and second contact electrodes 41, 42 may be made of the same material and may be formed simultaneously in the same manufacturing process. For example, the first and second contact electrodes 41, 42 may be metallic electrodes including nickel, gold, chromium, titanium, platinum, palladium, rhodium, iridium, aluminum, tin, indium, tantalum, copper, cobalt, iron, ruthenium, zirconium, tungsten, molybdenum or a combination thereof, and thus may have the same stacked structure. Further, the first and second contact electrodes 41, 42 may include an Al reflection layer and an Au connection layer. In some embodiments, the first and second contact electrodes 41, 42 may have a stacked structure including Cr/Al/Ti/Ni/Ti/Ni/Au/Ti layers. In other embodiments, the first and second contact electrodes 41, 42 may have a stacked structure including Cr/Al/Ti/Al/Ti/Al/Ti/Pt layers, in which the lower one of the Al layer is mainly used as a reflection layer, the upper one of the Al layer is mainly used as a lateral current expansion layer, and the Pt layer (i.e., the top layer) is used as an etch stop layer. Preferably, the Pt layer have a thickness greater than 100 nm, e.g., ranging from 130 nm to 400 nm. The Pt layer having appropriate thickness may increase the lateral current expansion capability of the electrodes, and may facilitate hole etching processes of the insulating reflective layer 30. In certain embodiments, the light-emitting device is a mini LED, for example, having a size of 4 mil*8 mil. Each of the first and second contact electrodes 41, 42 may have a stacked structure that includes Cr/Al/Ti/Pt layers so as to be capable of reducing the thickness thereof to less than 500 nm. Such configuration may improve coverage continuities of the insulating reflective layer 30 and electrode pads (i.e., first and second electrode pads 43, 44) above the first and second contact electrodes 41, 42, and thereby improving the reliability of the light-emitting device.
The insulating reflective layer 30 covers at least a part of the semiconductor structure 20 and has an extending portion extending outwardly from the semiconductor structure 20 and covering a part of the upper surface 11 of the substrate 10. Specifically, in this embodiment, the insulating reflective layer 30 covers an upper surface and a lateral surface of the semiconductor structure 20, and covers the first and second contact electrodes 41, 42. Since the insulating reflective layer 30 has the extending portion that is in contact with the upper surface 11 of the substrate 10, the insulating reflective layer 30 can more stably cover the lateral surface of the semiconductor structure 20. In some embodiments, the insulating reflective layer 30 has a thickness greater than 1 μm, such as ranging from 1 μm to 10 μm, from 1 μm to 6 μm, or from 2 μm and 6 μm. The insulating reflective layer 30 may have a risk of chipping if the thickness thereof is too large.
Referring to
For example, the interface layer 33a of the DBR 33 may be made of SiO2 and may have a thickness ranging from 50 nm to 200 nm. The stacked structure 33b of the DBR 33 may include TiO2 layers and SiO2 layers that are alternately stacked on one another on the interface layer 33a.
In this embodiment, the insulating reflective layer 30 may cover a part of an exposed portion of the upper surface 11 of the substrate 10. To be specific, as shown in
In this embodiment, the DBR 33 of the insulating reflective layer 30 covers almost the whole of the upper and lateral surfaces of the semiconductor structure 20 and is capable of reflecting light, thereby increasing the luminous efficiency of the light-emitting device. Further, the insulating reflective layer 30 has the extending portion extending outwardly from the semiconductor structure 20 to cover a part of the upper surface 11 of the substrate 10 while leaving a part of an outer periphery of the upper surface 11 of the substrate 10 exposed, i.e., the outer periphery of the upper surface 11 of the substrate 10 is not covered with the insulating reflective layer 30. Thus, during a wafer dicing process (e.g., internal machining, scribing, or breaking) for forming the light-emitting devices, possible damage (e.g., peeling, cracking, etc.) to the insulating reflective layer 30 that may be caused by a laser irradiation, etc., can be prevented. In particular, in the case where the insulating reflective layer 30 includes the DBR 33, if the insulating reflective layer 30 is damaged, not only the light reflectivity of the insulating reflective layer 30 may be reduced, but also a current leakage that causes a malfunction of the light-emitting device may occur. However, according to the present embodiment, such possible problems of the light-emitting device can be prevented. In some embodiments, a distance (D3) between an outer periphery of the insulating reflective layer 30 and the outer periphery of the upper surface 11 of the substrate 10 is greater than 2 μm. In certain embodiments, the distance (D3) between the outer periphery of the insulating reflective layer 30 and the outer periphery of the upper surface 11 of the substrate 10 ranges from 2 μm to 15 μm. When the distance (D3) is too small, the insulating reflective layer 30 may be damaged during the wafer dicing process, and when the distance (D3) is too large, the reflective area of the insulating reflective layer 30 may be significantly reduced and the luminous efficiency of the light-emitting device may be reduced.
Referring to
Referring to
Referring to
In this embodiment, the insulating reflective layer 30 further has a first through hole 31 that exposes the first contact electrode 41, a second through hole 32 that exposes the second contact electrode 42, a first hole-defining wall 311 that defines the first through hole 31, and a second hole-defining wall 321 that defines the second through hole 32. The first electrode pad 43 is disposed on the insulating reflective layer 30, and extends into the first through hole 31 to be electrically connected to the first contact electrode 41. The second electrode pad 44 is disposed on the insulating reflective layer 30, and extends into the second through hole 32 to be electrically connected to the second contact electrode 42. Referring to
Referring to
The first hole-defining wall 311 of the insulating reflective layer 30, which defines the first through hole 31, may incline relative to a bottom surface of the insulating reflective layer 30 by an included angle (γ) within 70°, e.g., ranging from 10° to 60°.
Referring to
The second hole-defining wall 321, which defines the second through hole 32, may incline relative to the bottom surface of the insulating reflective layer 30 by an included angle (β) within 70°, e.g., ranging from 10° to 60°.
In some embodiments, the light-emitting device is a mini LED that may has a horizontal cross-sectional area not greater than 62500 μm2. In some embodiments, in a top view, the sum of the areas of upper surfaces of the first and second electrode pads 43, 44 may occupy more than 50% of the horizontal cross-sectional area of the light-emitting device.
The upper surfaces of the first and second electrode pads 43, 44 may have the same or different shapes. As shown in
The first and second electrode pads 43, 44 may be the same or different in size, which may be width or area. The first and second electrode pads 43, 44 may be made of metallic materials such as chromium (Cr), titanium (Ti), tungsten (W), aluminum (Al), indium (In), tin (Sn), nickel (Ni), platinum (Pt), or alloys of these metallic materials, and may have a single-layer or multilayered structure.
Referring back to
In some embodiments, a distance between an outer periphery of a projection of the upper surface of the first electrode pad 43 on the upper surface 11 of the substrate 10 and an outer periphery of a projection of the upper surface of the first contact electrode 41 on the upper surface 11 of the substrate 10 is greater than 2 μm, such that the first electrode pad 43 covers the first contact electrode 41.
In some embodiments, a distance between an outer periphery of a projection of the upper surface of the second electrode pad 44 on the upper surface 11 of the substrate 10 and an outer periphery of a projection of the upper surface of the main part 42a of the second contact electrode 42 on the upper surface 11 of the substrate 10 is greater than 2 μm, such that the second electrode pad 44 covers the second contact electrode 42.
In some embodiments, a buffer layer (not shown) may be formed on the upper surface 11 of the substrate 10 prior to the formation of the first semiconductor layer 21 in order to relax the lattice mismatch between the substrate 10 and the semiconductor structure 20. The buffer layer may consist of a nitride material such as gallium nitride (GaN), aluminum gallium nitride (AlGaN), and aluminum nitride (AlN), and may have a single-layer or multilayered structure.
Referring to
The transparent conductive layer 50 may be disposed on an upper surface of the second semiconductor layer 23 of the semiconductor structure 20. In certain embodiments, the transparent conductive layer 50 is formed on the second semiconductor layer 23 to cover most of the upper surface (e.g., at least 80% of the upper surface) of the second semiconductor layer 23. The transparent conductive layer 50 is made of a conductive light-transmitting material, and is capable of spreading the current injected from the second contact electrode 42 to prevent the current from crowding in an area of the second semiconductor layer 23. The transparent conductive layer 50 may cover the entire area of the upper surface of the second semiconductor layer 23, or cover a part of the upper surface (e.g., at least 70% of the upper surface) of the second semiconductor layer 23. For example the transparent conductive layer 50 may be made of a transparent conductive oxide such as indium tin oxide (ITO), zinc doped indium tin oxide (ZITO), zinc indium oxide (ZIO), gallium indium oxide (GIO), zinc tin oxide (ZTO), fluorine doped tin oxide (FTO), aluminum doped zinc oxide (AZO), gallium doped zinc oxide (GZO), In4Sn3O12, and zinc magnesium oxide (Zn(1-x)MgxO, 0≤x≤1).
The thickness of the transparent conductive layer 50 is not limited, but may be in the range of about 50 Å to 3000 Å, such as 50 Å to 1500 Å. If the transparent conductive layer 50 is too thick, the transparent conductive layer 50 may absorb light passing therethrough thereby resulting in light loss; therefore, the thickness of the transparent conductive layer 50 may be limited to not greater than 3000 Å.
Referring to
Referring to
The current block layer 60 may be interposed between the transparent conductive layer 50 and the second semiconductor layer 23 of the semiconductor structure 20. As shown in
The current block layer 60 can block a current flowing from the second contact electrode 42 to the second semiconductor layer 23 vertically through the transparent conductive layer 50, so as to reduce current crowding near the second contact electrode 42, thereby improving the current spread performance. The current blocking layer 60 may be insulating and may include an insulation material such as SiOx and SiNx. The current blocking layer 60 may be formed as a single layer.
The current blocking layer 60 may have an area larger than that of the second contact electrode 42 disposed thereon to allow the second contact electrode 42 to be positioned within an upper area of the current blocking layer 60. Besides, the current blocking layer 60 may have an inclined lateral surface to prevent a corner part of the transparent conductive layer 50 from peeling off or shorting out. In certain embodiments, the current blocking layer 60 has a similar shape to that of the second contact electrode 42, and has a width larger than that of the second contact electrode 42. In certain embodiments, the current blocking layer 60 has an upper surface having a width at least 1 μm greater than that of an lower surface of the second contact electrode 42, and a projection of the second contact electrode 42 on the upper surface of the current blocking layer 60 falls within the upper surface of the current blocking layer 60. In some embodiments, the edge of the current blocking layer 60 is widened outward from the edge of the second contact electrode 42 by at least 2 μm, so that the width of the current blocking layer 60 is larger than that of the second contact electrode 42 by at least 4 μm. In some embodiments, the edge of the current blocking layer 60 is widened outward from the edge of the second contact electrode 42 by at least 4 μm. Such configuration is advantageous to facilitate current spreading.
Referring to
In this embodiment, the uneven structures 13 have protrusions that have heights varying by areas of the upper surface 11 of the substrate 10. Specifically, as shown in
The advantages of the light-emitting device according to the disclosure are described below with comparing AOI results of a sample according to the disclosure and the comparative example.
Referring to
When the light-emitting device of
These results indicate that if the included angle of the inclined lateral surface of the insulating reflective layer 30 is relatively small, regardless of whatever angular positions of the light-emitting device, efficient inspection and detection is impossible at the side of the light-emitting device where the included angle of the inclined lateral surface of the insulating reflective layer 30 is relatively small. On the other hand, the regions of light-emitting device, where a relatively large included angle of the inclined lateral surface of the insulating reflective layer 30 are present, AOI can be performed correctly at any one of angular positions of the light-emitting device.
The light-emitting device according to the disclosure can be used in a lighting device or a display device. Examples of the lighting device includes, but not limited to, COB (Chip on board) lightings, ultraviolet lamps, bulb lamps, and flexible filament lamps. Examples of the display device includes, but not limited to, backlight-equipped display devices and RGB display devices.
The light-emitting device according to the disclosure may be a flip-chip LED. The first and second electrode pads 43, 44 may be connected to a circuit board for an actual application by a reflow soldering or any high temperature process to be fabricated into a display device such as a backlight-equipped display device and an RGB display device.
The disclosure also provides a display device that include a mounting element and the light-emitting device of any one of the embodiments of the disclosure that is mounted on the mounting element. The display device may be a backlight-equipped display device or an RGB display device, and may be used in a television, a cellular phone, a display panel, a computer, or an outdoor display. The mounting element may be a frame for a chip-on-board (COB) LED, a chip-on-glass (COG) LED, or a surface-mounted device (SMD) LED.
It should be noted that, unless otherwise specified, the area of each layer or structure referred to in the disclosure is the projected area projected from above the light-emitting device perpendicular to a horizontal plane; the distance between the layers or structures referred to in the disclosure may be the distance between the projections of the layers or structures on the horizontal plane. When projecting, the light-emitting device should be placed on the horizontal plane in the order of the substrate 10 and the semiconductor structure 20 from lower to upper in a vertical direction that is perpendicular to the horizontal plane.
To sum up, since the light-emitting device according to the disclosure includes the insulating reflective layer 30 having the inclined lateral surface, and the included angle defined between the inclined lateral surface and the upper surface 11 of the substrate 10 is not less than 60°, reflection area of the inclined lateral surface can be reduced significantly, so that the amount of the scattered light will be relatively large, thereby improving the reliability of the light-emitting device, and allowing the light-emitting device to be more easily detected in AOI. In addition, by forming the uneven structure 13 on at least a portion of the upper surface 11 of the substrate 10, the external light extraction efficiency and the crystallinity of the semiconductor structure 20 can be improved.
It should be noted that, although there are many drawbacks in the prior art, each embodiment of the disclosure may alleviate at least one of the drawbacks of the prior art, and is not have to alleviate all of the drawbacks of the prior art. It also should be noted that any details not described in the claims should not be taken as a limitation thereon.
The terms used in the disclosure such as “substrate”, “upper surface”, “lower surface”, “uneven structure”, “semiconductor structure”, “first semiconductor layer”, “light-emitting layer”, “second semiconductor layer”, “insulating reflective layer”, “first through hole”, “second through hole”, “DBR”, “interface layer”, “stacked structure”, “first contact electrode”, “second contact electrode”, “first electrode pad”, “second electrode pad”, “transparent conductive layer”, “current blocking layer”, “atomic layer deposition layer”, “protrusion” are merely used for the sake of explanation, and may be replaced to any other terms.
In the description above, for the purposes of explanation, numerous specific details have been set forth in order to provide a thorough understanding of the embodiment(s). It will be apparent, however, to one skilled in the art, that one or more other embodiments may be practiced without some of these specific details. It should also be appreciated that reference throughout this specification to “one embodiment,” “an embodiment,” an embodiment with an indication of an ordinal number and so forth means that a particular feature, structure, or characteristic may be included in the practice of the disclosure. It should be further appreciated that in the description, various features are sometimes grouped together in a single embodiment, figure, or description thereof for the purpose of streamlining the disclosure and aiding in the understanding of various inventive aspects; such does not mean that every one of these features needs to be practiced with the presence of all the other features. In other words, in any described embodiment, when implementation of one or more features or specific details does not affect implementation of another one or more features or specific details, said one or more features may be singled out and practiced alone without said another one or more features or specific details. It should be further noted that one or more features or specific details from one embodiment may be practiced together with one or more features or specific details from another embodiment, where appropriate, in the practice of the disclosure.
While the disclosure has been described in connection with what is(are) considered the exemplary embodiment(s), it is understood that this disclosure is not limited to the disclosed embodiment(s) but is intended to cover various arrangements included within the spirit and scope of the broadest interpretation so as to encompass all such modifications and equivalent arrangements.
Number | Date | Country | Kind |
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202111076835.1 | Sep 2021 | CN | national |