1. Field of the Invention
This invention relates to a method for making a light emitting device, more particularly to a method involving forming an electrode-forming region on a semiconductor layer of a light emitting device using dry etching techniques.
2. Description of the Related Art
By virtue of dry etching, the material of the layered structure thus formed is removed in a highly anisotropic manner, i.e., an essentially vertical etch profile is produced. As a consequence, since the dry etching starts from the transparent conductive layer 14 which has a roughened surface (i.e., recesses and protrusions are formed thereon) conforming to that of the roughened layer 13, undesired sidewall residuals, which may include a residual 122+ of the active layer 122 and a residual 123′ of the second semiconductor layer 123, are likely to form and remain on the electrode-forming region 124 of the first semiconductor layer 121. Hence, instead of being formed on the first semiconductor layer 121, the n-type contact electrode 15 is formed on the sidewall residuals, which can cause current leakage or short circuit for the light emitting device 1.
The object of the present invention is to provide a method for making a light emitting device that can overcome the aforesaid drawbacks associated with the prior art.
According to one aspect of this invention, there is provided a method for making a light emitting device that comprises: (a) forming a multi-layer structure, which includes first and second semiconductor layers and an active layer disposed between the first and second semiconductor layers, on a substrate; (b) forming a patterned mask material on one side of the multi-layer structure that is opposite to the substrate so as to cover an etch region of the multi-layer structure; (c) forming a roughened layer on said one side of the multi-layer structure to cover an extraction region of the multi-layer structure; (d) removing the patterned mask material from the multi-layer structure so as to expose the etch region of the multi-layer structure; (e) forming an etch mask material on the roughened layer; (f) dry etching the multi-layer structure at the exposed etch region so as to form an etched recess extending through the second semiconductor layer and the active layer and into the first semiconductor layer and so as to define an electrode-forming region on the first semiconductor layer that corresponds to the etch region of the multi-layer structure; and (g) forming an electrode on the electrode-forming region of the first semiconductor layer.
According to another aspect of this invention, there is provided a light emitting device that comprises: a substrate; a multi-layer structure formed on the substrate and including first and second semiconductor layers and an active layer sandwiched between the first and second semiconductor layers, the multi-layer structure being formed with an etched recess that extends through the second semiconductor layer and the active layer and into the first semiconductor layer so as to define an electrode-forming region on the first semiconductor layer; a roughened layer formed on one side of the multi-layer structure that is opposite to the substrate, and formed with an electrode-receiving hole; a first electrode formed on the electrode-forming region of the first semiconductor layer; and a second electrode connected to said one side of the multi-layer structure and extending outwardly through the electrode-receiving hole. The electrode-forming region of the first semiconductor layer is defined by a process comprising forming a patterned mask material on said one side of the multi-layer structure so as to cover an etch region of the multi-layer structure that corresponds to the electrode-forming region of the first semiconductor layer, forming the roughened layer to cover an extraction region of the multi-layer structure, removing the patterned mask material from the multi-layer structure so as to expose the etch region of the multi-layer structure, forming an etch mask material on the roughened layer, and dry etching the multi-layer structure at the exposed etched region so as to form the etched recess and so as to define the electrode-forming region of the first semiconductor layer.
Other features and advantages of the present invention will become apparent in the following detailed description of the preferred embodiment of this invention, with reference to the accompanying drawings, in which:
In this embodiment, the multi-layer structure 4 further includes a transition layer 44 that is formed on the second semiconductor layer 43 and that is made from a II-V compound. The roughened layer 61 is made from a III-V compound, and is formed on the transition layer 44 so that growth of the roughened layer 61 on the transition layer 44 is conducted through heterogeneous nucleation mechanism. A transparent conductive layer 62 is made from indium tin oxide (ITO), and is formed on the roughened layer 61. Since the roughened layer 61 has a roughened surface, the transparent conductive layer 62 thus formed also has a roughened surface conforming to that of the roughened layer 61.
The second electrode 72 can be directly or indirectly connected to the transition layer 44. In this embodiment, a metal reflective layer 8 is formed on said one side of the multi-layer structure 4, i.e., on the transition layer 44, and extends into the electrode-receiving hole 63 in the roughened layer 61, and the second electrode 72 is formed on the metal reflective layer 8 and extends outwardly of the electrode-receiving hole 61 through the transparent conductive layer 62.
In this embodiment, the substrate 3 is made from sapphire, the first and second semiconductor layers 41, 43 are made from n-type and p-type GaN materials, respectively, and the active layer 42 is made from an InGaN-based material. Preferably, the transition layer 44 is made from a material having an energy gap ranging from 0.7 to 6.0 eV so as to enhance ohmic contact between the transparent conductive layer 62 and the second semiconductor layer 43.
Preferably, II group element of the II-V compound of the transition layer 44 is selected from the group consisting of Zn, Be, Mg, Ca, Sr, Ba, Ra, and combinations thereof, and V group element of the II-V compound of the transition layer 44 is selected from the group consisting of N, P, As, Sb, Bi, and combinations thereof. The transition layer 44 may be a binary, a ternary, or a quaternary compound. More preferably, the II-V compound of the transition layer 44 has a formula of MgxNy, in which 1<x<3, and 1<y<3.
Preferably, III group element of the III-V compound of the roughened layer 61 is selected from the group consisting of B, Al, Ga, In, Tl, and combinations thereof, and V group element of the III-V compound of the roughened layer 61 is selected from the group consisting of N, P, As, Sb, Bi, and combinations thereof.
Preferably, the metal reflective layer 8 is made from a metallic material selected from the group consisting of Ti, Al, Ag, Au, Cr, Pt, Cu, and combinations thereof.
In this embodiment, the transition layer 44 has a layer thickness ranging from 0.5 to 50 nm, the roughened layer 61 has a layer thickness ranging from 50 to 3000 nm, and the metal reflective layer 8 has a layer thickness ranging from 1 to 100 nm. When the layer thickness of the transition layer 44 is less than 0.5 nm, a continuous layer for the transition layer 44 cannot be achieved, and when the same is greater than 50 nm, ohmic contact between the second semiconductor layer 43 and the transparent conductive layer 62 is adversely affected. When the layer thickness of the roughened layer 61 is less than 50 nm, external light extraction thereby is significantly reduced, and when the same is greater than 3000 nm, external light extraction efficiency cannot be further enhanced. When the metal reflective layer 8 is less than 1 nm, reflectance of light is too low, and when the same is greater than 100 nm, adhesion strength of the metal reflective layer 8 on the transition layer 44 becomes poor and the metal reflective layer 9 tends to peel therefrom.
Preferably, the metal reflective layer 8 is subjected to a heat treatment under a working temperature ranging from 200 to 800° C., and more preferably, from 300 to 600° C. so as to permit atomic exchange through diffusion mechanism and to enhance adhesion strength between the metal reflective layer 8 and the transition layer 44. When the working temperature is less than 200° C., the extent of the atomic exchange is insufficient. When the working temperature is greater than 800° C., excessive atomic exchange occurs, which results in an adverse effect on the reflectively of the metal reflective layer 8.
Preferably, formation of the transition layer 44 is conducted using metal-organic chemical vapor deposition techniques with a II-containing source and a nitrogen-containing source as reactants under a working temperature ranging from 500 to 1200° C., and more preferably, from 600 to 1000° C. The II-containing source is selected from the group consisting of bis(cyclopentadienyl) magnesium, dimethylzinc, diethylzinc, and dimethylzinc:diethylzinc, and the nitrogen-containing source is selected from a mixture of hydrogen and nitrogen, ammonium, and combinations thereof.
Preferably, formation of the roughened layer 61 is conducted using metal-organic chemical vapor deposition techniques with a III-containing source and a nitrogen-containing source as reactants under a working temperature ranging from 500 to 1200° C. and a working pressure ranging from 76 to 760 Torr, and more preferably, under a working temperature ranging from 700 to 1000° C. and a working pressure ranging from 100 to 300 Torr. The III-containing source is selected from the group consisting of trimethylgallium (TMG), triethylgallium, triethylaluminum, and trimethylindium, and the nitrogen-containing source is selected from a mixture of hydrogen and nitrogen, ammonium, and combinations thereof. The roughened layer 61 is preferably doped with a II group element. Hence, when the transition layer 44 is made from Mg3N2, the roughened layer 61 is preferably made from Mg doped GaN.
The merits of the light emitting device of this invention will become apparent with reference to the following Example 1 and Comparative Examples 1 and 2.
The light emitting device of Example 1 was prepared by the following steps.
The first semiconductor layer 41 of n-type GaN having a layer thickness of 3 μm, the active layer 42 of an InxGal-xN/GaN multi-quantum well, and the second semiconductor layer 43 of Mg-doped p-type GaN having a layer thickness of 0.5 μm were successively formed on the sapphire substrate 3 in a MOCVD system under a working temperature of 1050° C. A nitrogen-containing source of a mixture of NH3:H2:N2 (gas flow rate ratio=1:2:1) and a Mg-containing source of vaporized (C5H5)2Mg carried by H2 gas were introduced into the MOCVD system under a working temperature of 930° C. and a working pressure of 200 Torr so as to form the transition layer 44 having a layer thickness of 1 nm on the second semiconductor layer 43. The patterned mask material 91 of SiOx was then formed on the transition layer 44. A mixture of TMG:NH3 (gas flow rate ratio=1:320) together with vaporized (C5H5)2Mg carried by H2 gas was then introduced into the MOCVD system under a working temperature of 930° C. and a working pressure of 200 Torr so as to form the roughened layer 61 having a layer thickness of 1000 nm. The transparent conductive layer 62 of indium tin oxide (ITO) was then formed on the roughened layer 61 using e-beam evaporation techniques in the presence of O2 gas. The patterned mask material 91 was then removed from the transition layer 44, followed by forming the etch mask material 92 on the transparent conductive layer 62. The semi-product thus formed was then subjected to dry etching so as to form the etched recess 40 and to define the electrode-forming region 411 of the first semiconductor layer 41. The etch mask material 92 was then removed, followed by forming the metal reflective layer 8 of Ti—Ag alloy having a layer thickness of about 20-50 nm on the transition layer 44 using e-beam evaporation techniques under a working temperature of 200° C. and heat treating the metal reflective layer 8 under a temperature of 450° C. The first and second electrodes 71, 72 were then formed on the electrode-forming region 411 of the first semiconductor layer 41 and the metal reflective layer 8, respectively.
The light emitting device of Comparative Example 1 was prepared by steps similar to those of Example 1, except that the etch region 401 of the multi-layer structure 4 was covered by the roughened layer 61 instead of being covered by the patterned mask material 91.
Samples of the light emitting devices of Example 1 and Comparative Example 1 thus formed were subjected to current leakage test under an applied voltage of −5V. The test results show that the sample of Comparative Example 1 has a current leakage of 0.1 μA, while the sample of Example 1 has a current leakage of 0.03 μA which is far less than that of Comparative Example 1. Hence, by maintaining flatness of the etch region 401 of the multi-layer structure 4 to be etched therefrom prior to dry etching, the aforesaid formation of the undesired sidewall residuals as encountered in the prior art can be eliminated.
The light emitting device of Comparative Example 2 was prepared by steps similar to those of Example 1, except that the transition layer 44 was omitted.
Samples of the light emitting devices of Example 1 and Comparative Example 2 thus formed were subjected to I-V characteristics test. As shown in
By forming the patterned mask material 91 on the transition layer 44 prior to the formation of the roughened layer 61 so as to obtain a flat region to be etched therefrom for subsequent dry etching of the layered structure according to the method of this invention, the aforesaid formation of the undesired sidewall residuals as encountered in the prior art can be eliminated.
While the present invention has been described in connection with what are considered the most practical and preferred embodiments, it is understood that this invention is not limited to the disclosed embodiments but is intended to cover various arrangements included within the spirit and scope of the broadest interpretation and equivalent arrangements.