The present invention relates to a light emitting device, a photoelectric conversion device, an electronic equipment, an illumination device, and a moving body.
There is known a semiconductor device having a structure in which a substrate on which a plurality of light emitting elements are arranged and a substrate on which driving circuits for driving the plurality of light emitting elements are arranged are stacked. A semiconductor device described in Japanese Patent Laid-Open No. 2018-174246 includes the first substrate with the first transistor for driving a light receiving element and the second substrate with the second transistor for driving a light emitting element. The first substrate includes the light emitting element, the light receiving element, and a through electrode that transmits a driving signal of the light emitting element from the second substrate through the first substrate.
In the structure in which the substrate on which the plurality of light emitting elements are arranged and the substrate on which the driving circuits for driving the plurality of light emitting elements are arranged are stacked, it is possible to implement high integration without miniaturizing the light emitting elements and the driving circuits. However, the arrangement in which the driving circuits are integrated in one substrate has limitation for increasing the density of the light emitting elements.
The present invention provides a technique advantageous in increasing the density of light emitting elements.
According to one aspect of the present invention, there is provided a light emitting device having a structure in which a first substrate and a second substrate are stacked, comprising: a plurality of light emitting elements; and a driving circuit configured to drive the plurality of light emitting elements, wherein part of the driving circuit is arranged in the first substrate, and another part of the driving circuit is arranged in the second substrate.
Further features of the present invention will become apparent from the following description of exemplary embodiments with reference to the attached drawings.
Hereinafter, embodiments will be described in detail with reference to the attached drawings. Note, the following embodiments are not intended to limit the scope of the claimed invention. Multiple features are described in the embodiments, but limitation is not made to an invention that requires all such features, and multiple such features may be combined as appropriate. Furthermore, in the attached drawings, the same reference numerals are given to the same or similar configurations, and redundant description thereof is omitted.
The vertical scanning circuit 104 can be configured to drive a plurality of scanning lines 106 extending in the row direction. In accordance with the vertical scanning control signal 111, the vertical scanning circuit 104 outputs a write control signal to each scanning line 106. Note that the output of the write control signal means activation of the write control signal. In accordance with the signal output control signal 112, the signal output circuit 105 can receive the image data 113 sequentially sent from the control unit 110. The signal output circuit 105 generates a voltage signal (to be referred to as Vsig hereinafter) as a luminance signal corresponding to the value of the image data 113 by D/A-converting the image data 113, and outputs the voltage signal to each signal line 107. At each of the intersection points of the scanning lines 106 and the signal lines 107, the pixel 102 is arranged, and each scanning line 106 and each signal line 107 are connected to the corresponding pixel 102. The pixel 102 emits light with luminance corresponding to the signal level of Vsig supplied to itself. Note that
The light emitting device 101 can have a structure in which a first substrate 11 and a second substrate 12 are stacked on each other. The light emitting device 101 may have an arrangement in which three or more substrates are stacked on each other. The light emitting device 101 may be configured as a display device, for example, an organic EL (Organic Electroluminescent) display device. In this case, the light emitting element 201 can include an organic layer with a light emitting layer between an anode and a cathode. The organic layer may include at least one of a hole injection layer, a hole transport layer, an electron injection layer, and an electron transport layer in addition to the light emitting layer. An example in which the driving transistor 202 is connected to the anode of the light emitting element 201 and all transistors are p-type transistors will be described below but the light emitting device according to the present invention is not limited to this. The polarity and conductivity types may all be reversed. For example, the driving transistor may be a p-type transistor and the remaining transistors may be n-type transistors, and supplied potentials and connection can be changed appropriately in accordance with the polarity and conductive type.
As a practical arrangement example, one (the drain in this example) of the source and drain of the driving transistor 202 is connected to the first electrode (the anode in this example) of the light emitting element 201. The other (the source in this example) of the source and drain of the driving transistor 202 is connected to a first voltage line (to be referred to as Vdd hereinafter) 204. The second electrode (the cathode in this example) of the light emitting element 201 is connected to a second voltage line (to be referred to as Vss hereinafter) 205.
The driving transistor 202 supplies a current from the Vdd 204 to the Vss 205 via the light emitting element 201, thereby causing the light emitting element 201 to emit light. More specifically, the driving transistor 202 supplies, to the light emitting element 201, a current corresponding to the voltage signal Vsig written in the write node via the signal line 107. The driving transistor 202 thus current-drives the light emitting element 201 to emit light.
One of the source and drain of the write transistor 203 can electrically be connected to the write node including the gate of the driving transistor 202. The other of the source and drain of the write transistor 203 can electrically be connected to the signal line 107 and the gate of the write transistor 203 can electrically be connected to the scanning line 106.
The light emitting element 201 can be arranged on a second surface S2 of the first substrate 11, the driving transistor 202 can be arranged in the first substrate 11, and the Vdd 204 and the Vss 205 can be arranged in a first wiring structure 512. From another viewpoint, the light emitting element 201, the driving transistor 202, the Vdd 204, and the Vss 205 can be arranged in the first structure formed from the first substrate 11 and the first wiring structure 512. The write transistor 203 can be arranged in the second substrate 12, and the scanning line 106 and the signal line 107 can be arranged in the second wiring structure 522. From another viewpoint, the write transistor 203, the scanning line 106, and the signal line 107 can be arranged in the second structure formed from the second substrate 12 and the second wiring structure 522. A bonding portion 513 can electrically be connected to the gate of the driving transistor 202 arranged in the first substrate 11 via a conductive path (for example, a wiring pattern or plug).
A bonding portion 523 can electrically be connected to the source of the write transistor 203 arranged in the second substrate 12 via a conductive path (for example, a wiring pattern or plug). The bonding portions 513 and 523 can be bonded to each other. The bonding portions 513 and 523 can be made of copper (Cu) and can be bonded by Cu—Cu bonding. However, the bonding method is not limited to Cu—Cu bonding.
The write transistor 203 is rendered conductive in response to the control signal applied to the gate. This allows the write transistor 203 to write, in the write node of the pixel 102, the voltage signal Vsig corresponding to display data supplied from the signal output circuit 105 via the signal line 107. The voltage signal Vsig written in the write node is applied to the gate of the driving transistor 202. Note that in any of the transistors, a back gate voltage can be the voltage of the Vdd 204.
If the light emitting element 201 is formed by an organic EL element, the current flowing through the driving transistor 202 can depend on the voltage signal Vsig. With this current, the capacitance between the first electrode (the anode in this example) and the second electrode (the cathode in this example) of the light emitting element 201 is charged to a potential corresponding to the voltage signal Vsig, and a current corresponding to the potential flows through the light emitting element 201. Thus, the light emitting element 201 emits light with luminance corresponding to the voltage signal Vsig.
The first wiring structure 512 can include a plurality of stacked conductive paths (wiring patterns or plugs) 510, and an interlayer insulating film 511 arranged to insulate the plurality of conductive paths 510. The second wiring structure 522 can include a plurality of stacked conductive paths (wiring patterns or plugs) 520, and an interlayer insulating film 521 arranged to insulate the plurality of conductive paths 520. Each of the conductive paths 510 and 520 can be made of a wiring material such as copper (Cu), tungsten (W), or aluminum (Al). The conductive paths 510 and 520 can be formed by bonding the bonding portions 513 and 523 to each other. The bonding portions 513 and 523 can electrically be connected by, for example, Cu—Cu bonding.
An n-type well layer 506 can be arranged in the first substrate 11. Part of the driving transistor 202 can be arranged between the first substrate 11 and the first wiring structure 512. More specifically, p-type diffusion regions 401 and 403 of the driving transistor 202 can be arranged in the first substrate 11, and a gate 402 of the driving transistor 202 can be arranged on the first surface S1 of the first substrate 11 via a gate insulating film. The driving transistor 202 can be formed by, for example, a general CMOS process. An n-type well layer 507 and a p-type semiconductor layer 509 can be arranged in the second substrate 12. Part of the write transistor 203 is arranged between the second substrate 12 and the second wiring structure 522. More specifically, p-type diffusion regions 404 and 406 of the write transistor 203 can be arranged in the second substrate 12, and a gate 405 of the write transistor 203 can be arranged on the third surface S3 of the second substrate 12 via a gate insulating film. The write transistor 203 can be formed by a general CMOS process. The p-type diffusion regions 401 and 403 of the first substrate 11 may be different from the p-type diffusion regions 404 and 406 of the second substrate 12 in at least one of the density and the depth.
In the first substrate 11, for example, a conductive plug 600 can be arranged as a conductive path penetrating the first substrate 11. In one example, a through hole can be formed in the first substrate 11, and the conductive plug 600 can be arranged in the through hole via an insulating film 601. The conductive plug 600 can be made of, for example, copper (Cu), tungsten (W), or aluminum (Al). An STI (Shallow Trench Isolation) 508 can be arranged at the boundary between the pixels in the first substrate 11. The STI (Shallow Trench Isolation) 508 can also be arranged at the boundary between the pixels in the second substrate 12.
An insulating film 501 can be arranged on the second surface S2 of the first substrate 11. The light emitting element 201 can be arranged on the insulating film 501. The light emitting element 201 can include, for example, a lower electrode 502, an organic EL film (light emitting layer) 503, and an upper electrode 504. The lower electrode 502 can be made of a metal material. The upper electrode 504 can be formed by a transparent electrode that transmits light. In one example, the lower electrode 502 serves as the anode and the upper electrode 504 serves as the cathode but they may be reversed. The light emitting element 201 can emit light in accordance with the driving signal transmitted via the conductive plug 600.
The light emitting device 101 can include the first substrate 11 in which the driving transistor 202 that drives the light emitting element 201 is arranged and the second substrate 12 in which the write transistor 203 is arranged. The light emitting element 201 can be arranged on the second surface S2 of the first substrate 11, and the driving transistor 202 and the light emitting element 201 can electrically be connected by the conductive plug 600 penetrating the first substrate 11. In this arrangement, an area occupied by the transistor in each of the first substrate 11 and the second substrate 12 can be decreased. Therefore, the light emitting device 101 according to the first embodiment is advantageous in arranging the light emitting elements at a high density without reducing the size of each transistor. Furthermore, the first embodiment is advantageous in increasing the resolution when the light emitting device 101 is implemented as a display device.
A bonding portion 523 can electrically be connected to a gate 405 of the driving transistor 202 arranged in the second substrate 12 via a conductive path (for example, a wiring pattern or plug). A bonding portion 513 can electrically be connected to the source of the write transistor 203 arranged in the first substrate 11 via a conductive path (for example, a wiring pattern or plug). The bonding portions 513 and 523 can be bonded to each other. The bonding portions 513 and 523 can be made of copper (Cu) and can be bonded by Cu—Cu bonding. However, the bonding method is not limited to Cu—Cu bonding.
Part of the write transistor 203 can be arranged between the first substrate 11 and the first wiring structure 512. More specifically, p-type diffusion regions 401 and 403 of the write transistor 203 can be arranged in the first substrate 11, and a gate 402 of the write transistor 203 can be arranged on a first surface S1 of the first substrate 11 via a gate insulating film. The write transistor 203 can be formed by, for example, a general CMOS process. Part of the driving transistor 202 can be arranged between the second substrate 12 and the second wiring structure 522. More specifically, p-type diffusion regions 404 and 406 of the driving transistor 202 can be arranged in the second substrate 12, and a gate 405 of the driving transistor 202 can be arranged on a third surface S3 of the second substrate 12 via a gate insulating film. The driving transistor 202 can be formed by a general CMOS process. The p-type diffusion regions 401 and 403 of the first substrate 11 may be different from the p-type diffusion regions 404 and 406 of the second substrate 12 in at least one of the density and the depth.
In the above-described arrangement, an area occupied by the transistor in each of the first substrate 11 and the second substrate 12 can be decreased. Therefore, the light emitting device 101 according to the second embodiment is advantageous in arranging the light emitting elements at a high density without reducing the size of each transistor. Furthermore, the second embodiment is advantageous in increasing the resolution when the light emitting device 101 is implemented as a display device.
In this modification, the driving transistor 202 of the second embodiment is replaced by a driving transistor 302. The back gate of the driving transistor 302 is self-biased. The source and back gate of the driving transistor 302 are electrically connected to the Vdd 204. An n-type well layer 507 and a p-type semiconductor layer 509 can be arranged in the second substrate 12. A p-type semiconductor region 407 can be arranged inside the n-type well layer 507 and an n-type well layer 408 can be arranged inside the p-type semiconductor region 407. The n-type well layer 507 and the n-type well layer 408 can be separated by the p-type semiconductor region 407. Part of the driving transistor 302 using the n-type well layer 408 can be arranged between the second substrate 12 and the second wiring structure 522. More specifically, p-type diffusion regions 404 and 406 of the driving transistor 302 can be arranged in the second substrate 12, and a gate 405 of the driving transistor 302 can be arranged on the third surface S3 of the second substrate 12 via a gate insulating film. The driving transistor 302 can be formed by a general CMOS process. The p-type diffusion regions 401 and 403 of the first substrate 11 may be different from the p-type diffusion regions 404 and 406 of the second substrate 12 in at least one of the density and the depth.
In the light emitting device 101 according to the modification of the second embodiment, the driving transistor 302 whose back gate is self-biased is arranged in the second substrate 12, and it is thus possible to suppress characteristic variations caused by manufacturing variations of the transistors. This is advantageous in suppressing the light amount variations in the plurality of pixels 102 of the light emitting device 101.
The light emitting element 201, the driving transistor 202, the write transistor 203, the first capacitive element 702, and the second capacitive element 703 can be arranged in a first substrate 11. The first scanning line 106a, the signal line 107, and the Vss 205 can be arranged in a first wiring structure 512. From another viewpoint, the light emitting element 201, the driving transistor 202, the write transistor 203, the first capacitive element 702, the second capacitive element 703, the first scanning line 106a, the signal line 107, and the Vss 205 can be arranged in the first structure formed from the first substrate 11 and the first wiring structure 512. The light emission control transistor 701 can be arranged in a second substrate 12, and the second scanning line 106b and the Vdd 204 can be arranged in a second wiring structure 522. From another viewpoint, the light emission control transistor 701, the second scanning line 106b, and the Vdd 204 can be arranged in the second structure formed from the second substrate 12 and the second wiring structure 522. The source of the light emission control transistor 701 arranged in the second substrate 12 and the second capacitive element 703 arranged in the first substrate 11 can electrically be connected via bonding such as Cu—Cu bonding. The drain of the light emission control transistor 701 arranged in the second substrate 12 and the source of the driving transistor 202 arranged in the first substrate 11 can electrically be connected via bonding such as Cu—Cu bonding.
One (the source in this example) of the source and drain of the light emission control transistor 701 can be connected to one (the drain in this example) of the source and drain of the driving transistor 202. The other of the source and drain of the light emission control transistor 701 can be connected to the Vdd 204. The gate of the write transistor 203 can be connected to the first scanning line 106a. The gate of the light emission control transistor 701 can be connected to the second scanning line 106b. The first capacitive element 702 is arranged to electrically connect the gate and source (the connection node of the driving transistor 202 and the light emission control transistor 701) of the driving transistor 202. The second capacitive element 703 can be arranged to electrically connect the source of the driving transistor 202 to the Vdd 204. The first capacitive element 702 and the second capacitive element 703 have a function of holding the voltage between the source and the gate of the driving transistor 202. Each of the first capacitive element 702 and the second capacitive element 703 can be formed by a parasitic capacitance or a MIM structure.
The light emission control transistor 701 is rendered conductive, thereby making it possible to supply a current from the Vdd 204 to the driving transistor 202. This causes the driving transistor 202 to drive the light emitting element 201 to emit light. That is, the light emission control transistor 701 functions as a transistor that controls light emission/non-light emission of the light emitting element 201.
In the third embodiment, the light emitting element 201, the driving transistor 202, the write transistor 203, the first scanning line 106a, the signal line 107, the Vss 205, the first capacitive element 702, and the second capacitive element 703 are arranged in the first structure formed from the first substrate 11 and the first wiring structure 512. The light emission control transistor 701, the second scanning line 106b, and the Vdd 204 are arranged in the second structure formed from the second substrate 12 and the second wiring structure 522. This can reduce an area occupied by the transistor in each of the first substrate 11 and the second substrate 12. Therefore, the light emitting device 101 according to the third embodiment is advantageous in arranging the light emitting elements at a high density without reducing the size of each transistor. Furthermore, the third embodiment is advantageous in increasing the resolution when the light emitting device 101 is implemented as a display device.
According to the fourth embodiment, since the second capacitive element 703 is arranged in the second substrate 12, an area occupied by the element in each of the first substrate 11 and the second substrate 12 can be decreased. Therefore, the light emitting device 101 according to the fourth embodiment is advantageous in arranging the light emitting elements at a high density without reducing the size of each transistor. Furthermore, the fourth embodiment is advantageous in increasing the resolution when the light emitting device 101 is implemented as a display device.
One (the source in
As described above, according to the sixth embodiment, the light emitting element 201, the driving transistor 202, the write transistor 203, the light emission control transistor 701, the first capacitive element 702, and the second capacitive element 703 can be arranged in the first substrate 11. The first scanning line 106a, the second scanning line 106b, the signal line 107, the Vdd 204, and the Vss 205 can be arranged in the first wiring structure 512. Furthermore, the reset transistor 704 can be arranged in the second substrate 12, and the third scanning line 106c and the Vss 205 can be arranged in the second wiring structure 522. This can reduce an area occupied by the element in each of the first substrate 11 and the second substrate 12. Therefore, the light emitting device 101 according to the sixth embodiment is advantageous in arranging the light emitting elements at a high density without reducing the size of each transistor. Furthermore, the sixth embodiment is advantageous in increasing the resolution when the light emitting device 101 is implemented as a display device.
As described above, each of the plurality of pixels 102 forming a pixel array 103 can include a light emitting element 201 and a plurality of elements for driving the light emitting element 201. The plurality of elements of each pixel 102 can form a unit driving circuit. It can be understood that an aggregate of the plurality of elements of the plurality of pixels 102 forming the pixel array 103 forms a driving circuit that drives the plurality of light emitting elements 201 of the pixel array 103. It may be understood that the plurality of light emitting elements 201 include a plurality of light emitting elements of the first type and a plurality of light emitting elements of the second type. It may be understood that the driving circuit which drives the plurality of light emitting elements 201 of the pixel array 103 includes a plurality of first driving circuits that drive the plurality of light emitting elements of the first type, respectively, and a plurality of second driving circuits that drive the plurality of light emitting elements of the second type, respectively. At least part of each of the plurality of first driving circuits can be arranged in a second substrate 12, and at least part of each of the plurality of second driving circuits can be arranged in a first substrate 11.
The first pixel 102-a includes a first type of light emitting element 201-a, a Vss 205, a driving transistor 202-a, a write transistor 203-a, a first scanning line 1061, a signal line 107-a, and a Vdd 204. The driving transistor 202-a and the write transistor 203-a form the first driving circuit that drives the first type of light emitting element 201-a. The first type of light emitting element 201-a is arranged on a second surface S2 of the first substrate 11, and the Vss 205 is arranged in a first wiring structure 512. From another viewpoint, the first type of light emitting element 201-a and the Vss 205 are arranged in the first structure formed from the first substrate 11 and the first wiring structure 512. The driving transistor 202-a and the write transistor 203-a can be arranged in the second substrate 12, and the first scanning line 1061, the signal line 107-a, and the Vdd 204 can be arranged in a second wiring structure 522. From another viewpoint, the driving transistor 202-a, the write transistor 203-a, the first scanning line 1061, the signal line 107-a, and the Vdd 204 can be arranged in the second structure formed from the second substrate 12 and the second wiring structure 522. It may be understood that the driving transistor 202-a is a transistor that decides the luminance of the light emitting element 201-a, a transistor that controls a current flowing through the light emitting element 201-a, or a transistor that is directly connected to the electrode of the light emitting element 201-a.
The second pixel 102-b includes a second type of light emitting element 201-b, a Vss 205, a driving transistor 202-b, a write transistor 203-b, a second scanning line 1062, a signal line 107-b, and a Vdd 204. The driving transistor 202-b and the write transistor 203-b form the second driving circuit that drives the second type of light emitting element 201-b. The second type of light emitting element 201-b can be arranged on the second surface S2 of the first substrate 11, and the driving transistor 202-b and the write transistor 203-b can be arranged in the second substrate 12. The Vss 205, the first scanning line 1061, the signal line 107-b, and the Vdd 204 can be arranged in the first wiring structure 512. From another viewpoint, the second type of light emitting element 201-b, the Vss 205, the driving transistor 202-b, the write transistor 203-b, the second scanning line 1062, the signal line 107-b, and the Vdd 204 can be arranged in the first structure formed from the first substrate 11 and the first wiring structure 512. It may be understood that the driving transistor 202-b is a transistor that decides the luminance of the light emitting element 201-b, a transistor that controls a current flowing through the light emitting element 201-b, or a transistor that is directly connected to the electrode of the light emitting element 201-b.
An n-type well layer 506 can be arranged in the first substrate 11. Part of each of the driving transistor 202-b and the write transistor 203-b is arranged between the first substrate 11 and the first wiring structure 512. Note that
An n-type well layer 507 and a p-type semiconductor layer 509 can be arranged in the second substrate 12. Part of each of the driving transistor 202-a and the write transistor 203-a is arranged between the second substrate 12 and the second wiring structure 522. Note that
As described above, according to the seventh embodiment, the first pixel 102-a includes the first driving circuit that drives the first type of light emitting element 201-a, and at least part of the first driving circuit is arranged in the second substrate 12. Furthermore, according to the seventh embodiment, the second pixel 102-b includes the second driving circuit that drives the second type of light emitting element 201-b, and at least part of the second driving circuit is arranged in the first substrate 11. This can reduce an area occupied by the element in each of the first substrate 11 and the second substrate 12. Therefore, the light emitting device 101 according to the seventh embodiment is advantageous in arranging the light emitting elements at a high density without reducing the size of each transistor. Furthermore, the seventh embodiment is advantageous in increasing the resolution when the light emitting device 101 is implemented as a display device.
Application examples of the above-described light emitting device 101 will be described below.
The above-described light emitting device 101 can be used as a constituent member of a display device or an illumination device. In addition, the light emitting device 101 is applicable to the exposure light source of an electrophotographic image forming device, the backlight of a liquid crystal display device, a white light source, and the like.
The display device may be an image information processing device that includes an image input unit for inputting image information from an area CCD, a linear CCD, a memory card, or the like, and an information processing unit for processing the input information, and displays the input image on a display unit.
In addition, a display unit included in an image capturing device or an inkjet printer can have a touch panel function. The driving type of the touch panel function may be an infrared type, a capacitance type, a resistive film type, or an electromagnetic induction type, and is not particularly limited. The display device may be used for the display unit of a multifunction printer.
A display device according to one application example will be described next with reference to the accompanying drawings.
The interlayer insulating layer 1 can include a transistor and a capacitive element arranged in the interlayer insulating layer 1 or a layer below it. The transistor and the first electrode can electrically be connected via a contact hole (not shown) or the like.
The insulating layer 3 is also called a bank or a pixel separation film. The insulating layer 3 covers the end of the first electrode, and is arranged to surround the first electrode. A portion where no insulating layer is arranged contacts the organic compound layer 4 to form a light emission region.
The organic compound layer 4 includes a hole injection layer 41, a hole transport layer 42, a first light emitting layer 43, a second light emitting layer 44, and an electron transport layer 45.
The second electrode 5 may be a transparent electrode, a reflective electrode, or a translucent electrode.
The protection layer 6 suppresses permeation of water into the organic compound layer. The protection layer is shown as a single layer but may include a plurality of layers. Each layer can be an inorganic compound layer or an organic compound layer.
The color filter 7 is divided into color filters 7R, 7G, and 7B by colors. The color filters can be formed on the planarizing layer (not shown). A resin protection layer (not shown) can be provided on the color filters. The color filters can be formed on the protection layer 6. Alternatively, the color filters can be provided on the counter substrate such as a glass substrate, and then the substrate may be bonded.
A display device 100 shown in
Note that a method of electrically connecting the electrodes (anode and cathode) included in the organic light emitting element 26 and the electrodes (source electrode and drain electrode) included in the TFT is not limited to that shown in
In the display device 100 shown in
A transistor is used as a switching element in the display device 100 shown in
The transistor used in the display device 100 shown in
The transistor included in the display device 100 shown in
The light emission luminance of the organic light emitting element according to this embodiment can be controlled by the TFT which is an example of a switching element, and the plurality of organic light emitting elements can be provided in a plane to display an image with the light emission luminances of the respective elements. Note that the switching element according to this embodiment is not limited to the TFT, and may be a transistor formed from low-temperature polysilicon or an active matrix driver formed on the substrate such as an Si substrate. The term “on the substrate” may mean “in the substrate”. Whether to provide a transistor in the substrate or use a TFT is selected based on the size of the display unit. For example, if the size is about 0.5 inch, the organic light emitting element is preferably provided on the Si substrate.
The display device can include color filters of red, green, and blue. The color filters of red, green, and blue can be arranged in a delta array.
The display device can also be used for a display unit of a portable terminal. At this time, the display unit can have both a display function and an operation function. Examples of the portable terminal are a portable phone such as a smartphone, a tablet, and a head mounted display.
The display device can be used for a display unit of an image capturing device including an optical unit having a plurality of lenses, and an image sensor for receiving light having passed through the optical unit. The image capturing device can include a display unit for displaying information acquired by the image sensor. In addition, the display unit can be either a display unit exposed outside the image capturing device, or a display unit arranged in the finder. The image capturing device can be a digital camera or a digital video camera.
The timing suitable for image capturing is a very short time, so the information is preferably displayed as soon as possible. Therefore, the display device using the organic light emitting element of the present invention is preferably used. This is so because the organic light emitting element has a high response speed. The display device using the organic light emitting element can be used for the apparatuses that require a high display speed more preferably than for the liquid crystal display device.
The image capturing device 1100 includes an optical unit (not shown). This optical unit has a plurality of lenses, and forms an image on an image sensor that is accommodated in the housing 1104. The focal points of the plurality of lenses can be adjusted by adjusting the relative positions. This operation can also automatically be performed. The image capturing device may be called a photoelectric conversion device. Instead of sequentially capturing an image, the photoelectric conversion device can include, as an image capturing method, a method of detecting the difference from a previous image, a method of extracting an image from an always recorded image, or the like.
The display device 1300 includes a base 1303 that supports the frame 1301 and the display unit 1302. The base 1303 is not limited to the form shown in
In addition, the frame 1301 and the display unit 1302 can be bent. The radius of curvature in this case can be 5,000 (inclusive) mm to 6,000 (inclusive) mm.
The illumination device is, for example, a device for illuminating the interior of the room. The illumination device can emit white light, natural white light, or light of any color from blue to red. The illumination device can also include a light control circuit for controlling these light components. The illumination device can also include the organic light emitting element according to the present invention and a power supply circuit connected to the organic light emitting element. The power supply circuit is a circuit for converting an AC voltage into a DC voltage. White has a color temperature of 4,200 K, and natural white has a color temperature of 5,000 K. The illumination device may also include a color filter.
In addition, the illumination device according to this embodiment can include a heat radiation unit. The heat radiation unit radiates the internal heat of the device to the outside of the device, and examples are a metal having a high specific heat and liquid silicon.
The taillight 1501 can include the organic light emitting element according to this embodiment. The taillight can include a protection member for protecting the organic EL element. The material of the protection member is not limited as long as the material is a transparent material with a strength that is high to some extent, and is preferably polycarbonate. A furandicarboxylic acid derivative, an acrylonitrile derivative, or the like may be mixed in polycarbonate.
The automobile 1500 can include a vehicle body 1503, and a window 1502 attached to the vehicle body 1503. This window can be a window for checking the front and back of the automobile, and can also be a transparent display. This transparent display can include the organic light emitting element according to this embodiment. In this case, the constituent materials of the electrodes and the like of the organic light emitting element are preferably formed by transparent members.
The moving body according to this embodiment can be a ship, an airplane, a drone, or the like. The moving body can include a main body and a lighting appliance installed in the main body. The lighting appliance can emit light for making a notification of the position of the main body. The lighting appliance includes the organic light emitting element according to this embodiment.
Application examples of a display device will be described with reference to
Glasses 1600 (smartglasses) according to one application example will be described with reference to
The glasses 1600 can further include a control device 1603. The control device 1603 functions as a power supply that supplies power to the image capturing device 1602 and the display device according to each embodiment. In addition, the control device 1603 controls the operations of the image capturing device 1602 and the display device. An optical system configured to condense light to the image capturing device 1602 is formed on the lens 1601.
Glasses 1610 (smartglasses) according to one application example will be described with reference to
The line of sight of the user to the displayed image is detected from the captured image of the eyeball obtained by capturing the infrared rays. An arbitrary known method can be applied to the line-of-sight detection using the captured image of the eyeball. As an example, a line-of-sight detection method based on a Purkinje image obtained by reflection of irradiation light by a cornea can be used.
More specifically, line-of-sight detection processing based on pupil center corneal reflection is performed. Using pupil center corneal reflection, a line-of-sight vector representing the direction (rotation angle) of the eyeball is calculated based on the image of the pupil and the Purkinje image included in the captured image of the eyeball, thereby detecting the line-of-sight of the user.
The display device according to the embodiment of the present invention can include an image capturing device including a light receiving element, and a displayed image on the display device can be controlled based on the line-of-sight information of the user from the image capturing device.
More specifically, the display device can decide a first visual field region at which the user is gazing and a second visual field region other than the first visual field region based on the line-of-sight information. The first visual field region and the second visual field region may be decided by the control device of the display device, or those decided by an external control device may be received. In the display region of the display device, the display resolution of the first visual field region may be controlled to be higher than the display resolution of the second visual field region. That is, the resolution of the second visual field region may be lower than that of the first visual field region.
In addition, the display region includes a first display region and a second display region different from the first display region, and a region of higher priority is decided from the first display region and the second display region based on line-of-sight information. The first display region and the second display region may be decided by the control device of the display device, or those decided by an external control device may be received. The resolution of the region of higher priority may be controlled to be higher than the resolution of the region other than the region of higher priority. That is, the resolution of the region of relatively low priority may be low.
Note that AI may be used to decide the first visual field region or the region of higher priority. The AI may be a model configured to estimate the angle of the line of sight and the distance to a target ahead the line of sight from the image of the eyeball using the image of the eyeball and the direction of actual viewing of the eyeball in the image as supervised data. The AI program may be held by the display device, the image capturing device, or an external device. If the external device holds the AI program, it is transmitted to the display device via communication.
When performing display control based on line-of-sight detection, smartglasses further including an image capturing device configured to capture the outside can preferably be applied. The smartglasses can display captured outside information in real time.
As described above, when a device using the organic light emitting element according to this embodiment is used, stable display with high image quality can be performed even in long time display.
According to the present invention, there is provided a technique advantageous in increasing the density of light emitting elements.
Embodiment(s) of the present invention can also be realized by a computer of a system or apparatus that reads out and executes computer executable instructions (e.g., one or more programs) recorded on a storage medium (which may also be referred to more fully as ‘non-transitory computer-readable storage medium’) to perform the functions of one or more of the above-described embodiment(s) and/or that includes one or more circuits (e.g., application specific integrated circuit (ASIC)) for performing the functions of one or more of the above-described embodiment(s), and by a method performed by the computer of the system or apparatus by, for example, reading out and executing the computer executable instructions from the storage medium to perform the functions of one or more of the above-described embodiment(s) and/or controlling the one or more circuits to perform the functions of one or more of the above-described embodiment(s). The computer may comprise one or more processors (e.g., central processing unit (CPU), micro processing unit (MPU)) and may include a network of separate computers or separate processors to read out and execute the computer executable instructions. The computer executable instructions may be provided to the computer, for example, from a network or the storage medium. The storage medium may include, for example, one or more of a hard disk, a random-access memory (RAM), a read only memory (ROM), a storage of distributed computing systems, an optical disk (such as a compact disc (CD), digital versatile disc (DVD), or Blu-ray Disc (BD)?), a flash memory device, a memory card, and the like.
While the present invention has been described with reference to exemplary embodiments, it is to be understood that the invention is not limited to the disclosed exemplary embodiments. The scope of the following claims is to be accorded the broadest interpretation so as to encompass all such modifications and equivalent structures and functions.
This application claims the benefit of Japanese Patent Application No. 2021-131743, filed Aug. 12, 2021, which is hereby incorporated by reference herein in its entirety.
Number | Date | Country | Kind |
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2021-131743 | Aug 2021 | JP | national |