This disclosure claims the right of priority of TW Application No. 111113123 filed on Apr. 6, 2022, and the content of which is hereby incorporated by reference in its entirety.
The present disclosure relates to a light-emitting device, and in particular to a flip-chip light-emitting device comprising a plurality of first electrode pads and a second electrode pad.
Light-emitting diode (LED) is a solid-state semiconductor light-emitting device, which has the advantages of low power consumption, low heat generation, long lifetime, shockproof, small size, high response speed and good optical-electrical characteristics, such as stable emission wavelength. Therefore, light-emitting diodes have been widely applied in household appliances, equipment indicator lights, and optoelectronic products, and so forth.
A light-emitting device including a substrate; a first semiconductor layer and a semiconductor platform disposed on the first semiconductor layer, wherein the semiconductor platform includes a second semiconductor layer and an active layer between the first semiconductor layer and the second semiconductor layer; a plurality of openings passing through the semiconductor platform to uncover the first semiconductor layer; a plurality of first electrodes located on the first semiconductor layer in the plurality of openings and not covering the semiconductor platform; a second electrode on the second semiconductor layer and not covering the first semiconductor layer in the plurality of openings; a plurality of first electrode pads located on the first semiconductor layer in the plurality of openings and not covering the semiconductor platform; and a second electrode pad located on the semiconductor platform and not covering the first semiconductor layer in the plurality of openings, wherein a first surface of the plurality of first electrode pads is higher than a second surface of the second electrode pad, and a step difference between the first surface and the second surface is less than 2 μm.
In order to make the description of the present disclosure more detailed and complete, please refer to the description of the following embodiments with relevant figures. The embodiments shown below are for exemplifying the light-emitting device of the present disclosure, and the present disclosure is not limited to the following embodiments. In addition, the scope of the present disclosure is not limited thereto in the case that the dimensions, materials, shapes, relative arrangements, and so forth, of the constituent parts described in the embodiments of the present disclosure are not limited, which are merely for illustration. In addition, other layers/structures or steps may be incorporated in the following embodiments. For example, a description of “forming a second layer/structure on a first layer/structure” may comprise an embodiment where the first layer/structure directly contacts the second layer/structure, or an embodiment where the first layer/structure indirectly contacts the second layer/structure, namely other layers/structures exist between the first layer/structure and the second layer/structure. In addition, the spatial relative relationship between the first layer/structure and the second layer/structure may be varied depending on the operation or use of the apparatus. The first layer/structure itself is not limited to a single layer or a single structure; the first layer may include a plurality of sub-layers, and the first structure may include a plurality of sub-structures. Furthermore, the sizes or positional relationships, and so forth, of the components shown in each of the figures may be enlarged for the sake of clarity. Furthermore, in the following description, in order to appropriately omit the detailed description, identical names and designations are used for the same or similar components.
As shown in
The sizes of the light-emitting devices 1 and 1a-1g are not particularly limited. For example, LED chips having the following sizes may be used as light-emitting devices 1 and 1a-1g: a square with a side length of 28 mils (28 mils×28 mils), a square with a side length of 40 mils (40 mils×40 mils), a square with a side length of 46 mils (46 mils×46 mils), a square with a side length of 55 mils (55 mils×55 mils). In addition, the planar shapes of the light-emitting devices 1 and 1a-1g are not limited to the square shape, and a rectangular shape or other shapes may also be adopted. When the planar shapes of the light-emitting devices 1 and 1a-1g are rectangular, for example, an LED chip with a size of 12 mils×50 mils can be adopted as the light-emitting devices 1 and 1a-1g.
The substrate 10 may be a growth substrate for epitaxial growth of the semiconductor stack 200. The substrate 10 includes a gallium arsenide (GaAs) wafer for epitaxial growth of aluminum gallium indium phosphide (AlGaInP), or a sapphire (Al2O3) wafer, a gallium nitride (GaN) wafer, a silicon carbide (SiC) wafer, or an aluminum nitride (AlN) wafer for epitaxial growth of gallium nitride (GaN), indium gallium nitride (InGaN) or aluminum gallium nitride (AlGaN).
The upper surface 10t of the substrate 10 connected with the semiconductor stack 200 may be a roughened surface. The roughened surface may be a surface with irregular morphology or a surface with regular morphology. For example, relative to the upper surface 10t of the substrate 10, the substrate 10 includes one or more convex portions (not shown) protruding from the upper surface 10t, or includes one or more concave portions (not shown) recessed on the upper surface 10t. In a cross-sectional view, the convex portions or the concave portions (not shown) may be in the shape of a hemisphere, a cone, a projectile head, or a polygonal cone.
In one embodiment, the convex portions (not shown) of the substrate 10 includes a first layer (not shown) and a second layer (not shown), the first layer includes the same material as that of the substrate 10, such as gallium arsenide (GaAs), sapphire (Al2O3), gallium nitride (GaN), silicon carbide (SiC), or aluminum nitride (AlN). The second layer includes a material different than that of the first layer or the substrate 10. The material of the second layer includes an insulating material, such as silicon oxide, silicon nitride, or silicon oxynitride. Viewed from a side surface of the light-emitting device 1, the convex portions (not shown) may be in the shape of a hemisphere, a cone, a projectile head, or a polygonal cone. A top of the convex portion (not shown) may be a flat surface, a curved surface, or a sharp point. In an embodiment of the present disclosure, the convex portion (not shown) includes the second layer without the first layer, wherein a bottom surface of the second layer is flush with the upper surface 10t of the substrate 10.
In one embodiment of the present disclosure, by metal organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), hydride vapor phase epitaxy (HVPE), physical vapor deposition (PVD) wherein the physical vapor deposition includes sputtering or evaporation, or ion plating method, a semiconductor stack 200 with optoelectronic properties, such as a light-emitting stack, is formed on the substrate 10.
The semiconductor stack 200 has a thickness greater than 4 μm and less than 7 μm. The semiconductor stack 200 includes a first semiconductor layer 201, a second semiconductor layer 202, and an active layer 203 formed between the first semiconductor layer 201 and the second semiconductor layer 202. By changing the physical and chemical composition of one or more layers in the semiconductor stack 200, the wavelength of the light emitted by the light-emitting device 1 can be adjusted. The material of the semiconductor stack 200 includes group III-V semiconductor materials, such as AlxInyGa(1-x-y)N or AlxInyGa(1-x-y)P, wherein 0≤x, y≤1. When the material of the semiconductor stack 200 includes AlInGaP series material, the semiconductor stack 200 can emit red light with a wavelength between 610 nm and 650 nm. When the material of the semiconductor stack 200 includes InGaN series material, the semiconductor stack 200 can emit blue light or deep blue light with a wavelength between 400 nm and 490 nm, or green light with a wavelength between 530 nm and 570 nm. When the material of the semiconductor stack 200 includes AlGaN series material or AlInGaN series material, the semiconductor stack 200 can emit ultraviolet light with a wavelength between 250 nm and 400 nm.
The first semiconductor layer 201 and the second semiconductor layer 202 may be a cladding layer or a confinement layer, both of which have different conductivity types, electrical properties, polarities, or dopants that can provide electrons or electron holes. For example, the first semiconductor layer 201 includes n-type semiconductor and the second semiconductor layer 202 includes p-type semiconductor. The active layer 203 is formed between the first semiconductor layer 201 and the second semiconductor layer 202. Electrons and electron holes are driven by an external current to recombine in the active layer 203 so the electrical energy is converted into light energy to emit light. The active layer 203 may be a single heterostructure (SH), a double heterostructure (DH), a double-side double heterostructure (DDH), or a multi-quantum well (MQW) structure. The material of the active layer 203 may be an intrinsic semiconductor, a p-type semiconductor, or an n-type semiconductor. The first semiconductor layer 201, the second semiconductor layer 202, or the active layer 203 may be a single layer or a structure including a plurality of sub-layers.
In one embodiment of the present disclosure, the semiconductor stack 200 may further include a buffer layer (not shown) located between the first semiconductor layer 201 and the substrate 10 to release the stress caused by the lattice mismatch between the substrate 10 and the semiconductor stack 200, and to reduce misalignment and lattice defects, so the epitaxial quality is improved. The buffer layer may be a single layer or a structure including multiple sub-layers. In one embodiment, PVD aluminum nitride (AlN) may be formed as a buffer layer disposed between the semiconductor stack 200 and the substrate 10 to improve the epitaxial quality of the semiconductor stack 200. In one embodiment, a target material for forming PVD aluminum nitride (AlN) is composed of aluminum nitride. In another embodiment, the aluminum nitride is formed by a target material composed of aluminum reacting with a nitrogen source in the environment.
In the light-emitting device 1, a portion of the semiconductor stack 200 is removed by etching the semiconductor stack 200 from the surface until the first semiconductor layer 201 is exposed. In other words, the light-emitting device 1 has the semiconductor platform M and one or more of the exposed portions 201p of the first semiconductor layer 201 formed by etching a portion of the semiconductor stack 200. Therefore, a step difference is formed between the surface of the second semiconductor layer 202 and the exposed portion 201p of the first semiconductor layer 201 in the light-emitting device 1. In the light-emitting device 1, the first electrode 41 is formed on the exposed portion 201p of the first semiconductor layer 201, and the second electrode 40 is formed on the surface of the second semiconductor layer 202. In the light-emitting device 1, when the conductivity type (first conductivity type) of the first semiconductor layer 201 is n-type, and the conductivity type (second conductivity type) of the second semiconductor layer 202 is p-type, the first electrode 41 and the second electrode 40 function as a negative electrode and a positive electrode, respectively. In addition, in the light-emitting device 1, when the first conductivity type is p-type and the second conductivity type is n-type, the first electrode 41 and the second electrode 40 serve as a positive electrode and a negative electrode, respectively.
The shape, size, position, and quantity of the exposed portions 201p of the first semiconductor layer 201 may be appropriately adjusted according to the size, shape or electrode pattern of the light-emitting device 1. As shown in
As shown in
In the light-emitting device 1, a surface area of the second semiconductor layer 202 is greater than a total surface area of the exposed portions 201p of the first semiconductor layer 201 to increase the luminous area of the active layer 203. Therefore, in the light-emitting device 1, the size of the area where the second semiconductor layer 202 and the first semiconductor layer 201 overlap in a thickness direction of the first semiconductor layer 201 can be increased to improve luminous efficiency.
The shape of the exposed portion 201p of the first semiconductor layer 201 in the top view includes a circle, an ellipse or a polygon, such as a triangle, a quadrangle, or a hexagon. The size of the exposed portion 201p of the first semiconductor layer 201 may be appropriately adjusted according to the size, output power, or luminance of the light-emitting device 1. The size of the diameter may be from about several tens of micrometers to about several hundreds of micrometers.
All of the exposed portions 201p of the first semiconductor layer 201 may have substantially the same shape and substantially the same size in the top view, each of the exposed portions 201p of the first semiconductor layer 201 may have different shapes and sizes in the top view, or a portion of the exposed portions 201p of the first semiconductor layer 201 may have different shapes and sizes from the other portion of which in the top view. The exposed portions 201p of the first semiconductor layer 201 are located on an area without being covered by the active layer 203, so by regularly arranging and disposing the exposed portions 201p of the first semiconductor layer 201 of the same size, the overall luminance uniformity of the light-emitting device 1 is improved.
As shown in
The second electrode 40 is disposed in the second opening 302 of the passivation layer 30 and contacts the second semiconductor layer 202. The second electrode 40 covers an upper surface of the semiconductor platform M. For example, the second electrode 40 may cover more than 80% or 90% of the upper surface of the semiconductor platform M. In an embodiment of the present disclosure, the second electrode 40 may include any one or more layers of a transparent conductive layer 401, a reflective layer 402, and a barrier layer (not shown).
The transparent conductive layer 401 may be disposed between the reflective layer 402 and the second semiconductor layer 202. In another embodiment, another transparent conductive layer (not shown) may be formed between the passivation layer 30 and the second semiconductor layer 202 and extended between the passivation layer 30 and the second semiconductor layer 202. In order to reduce the contact resistance and improve the efficiency of current spreading, the material of the transparent conductive layer 401 includes a material transparent to the light emitted by the active layer 203, such as a transparent conductive oxide. The transparent conductive oxide includes indium tin oxide (ITO) or indium zinc oxide (IZO). In one embodiment of the present disclosure, the transparent conductive layer 401 may be a metal layer with a thickness less than 500 angstroms.
The material of the reflective layer 402 includes a reflective metal, such as aluminum (Al), silver (Ag), rhodium (Rh), platinum (Pt), or an alloy of the previously-mentioned metals. The reflective layer 402 can reflect the light emitted by the active layer 203 so the reflected light can emit outward towards the substrate 10.
In an embodiment of the present disclosure, a barrier layer (not shown) may cover one side of the reflective layer 402 to prevent the reflective layer 402 from being oxidized and deteriorating the reflectivity. The material of the barrier layer includes a metal material, such as titanium (Ti), tungsten (W), aluminum (Al), indium (In), tin (Sn), nickel (Ni), chromium (Cr), platinum (Pt), or an alloy of the previously-mentioned metal materials. In one embodiment, the barrier layer does not cover the reflective layer 402. One side of the barrier layer may be flush with one side of the reflective layer 402, or may be formed on the reflective layer 402 and uncover a portion of the upper surface of the reflective layer 402.
In one embodiment, each of the transparent conductive layer 401, the reflective layer 402 and the barrier layer (not shown) overlaps the passivation layer 30. In other words, the second opening 302 of the passivation layer 30 uncovers the second semiconductor layer 202. The transparent conductive layer 401, the reflective layer 402 and the barrier layer (not shown) are formed in the second opening 302 of the passivation layer 30 and extend upward from the second opening 302 of the passivation layer 30 along the side surface of the passivation layer 30 to cover the upper surface of the passivation layer 30. The side of the reflective layer 402 may be disposed inside or outside of the side of the transparent conductive layer 401, and/or the side of the barrier layer (not shown) may be disposed inside or outside of the side of the reflective layer 402. In other words, an area of the reflective layer 402 may be smaller than an area of the transparent conductive layer 401 and be located within the periphery of the transparent conductive layer 401, or the area of the reflective layer 402 may be larger than the area of the transparent conductive layer 401 and be located outside the periphery of the transparent conductive layer 401. Similarly, the area of the barrier layer may be smaller than the area of the reflective layer 402 and be located within the periphery of the reflective layer 402, or the area of the barrier layer may be larger than the area of the reflective layer 402 and be located outside the periphery of the reflective layer 402. The reflective layer 402 located on the upper surface of the passivation layer 30 includes a sidewall with a slope between 2 and 20 degrees, and the barrier layer (not shown) located on the upper surface of the passivation layer 30 includes a sidewall with a slope between 20 and 60 degrees so that the subsequent insulating layer 50 can evenly cover the barrier layer. The sidewall of the barrier layer has a slope greater than that of the sidewall of the reflective layer. In order to prevent holes in the barrier layer from deteriorating the film quality of the reflective layer 401, the barrier layer has a thickness greater than that of the reflective layer. The barrier layer comprises a thickness greater than 300 nm and less than 1000 nm, or less than 800 nm. The barrier layer includes gold (Au) instead of aluminum (Al) to improve the reliability of the light-emitting device.
The first electrode 41 is located in the exposed portion 201p of the first semiconductor layer 201 and does not cover the semiconductor platform M. In another embodiment, the amount of the first electrode 41 and the exposed portion 201p of the first semiconductor layer 201 may be plural. The external current supplied to the first electrode pad 61 can flow to the first semiconductor layer 201 through the first electrode 41. The second electrode 40 is located on the second semiconductor layer 202 and does not cover one or more the exposed portions 201p of the first semiconductor layer 201. The external current supplied to the second electrode pad 62 can flow to the second semiconductor layer 202 through the second electrode 40. In addition, the first electrode 41 and the second electrode 40 have good light reflectivity and can serve as a reflective layer, so that the light emitted by the active layer 203 and directed towards the first electrode 41 and the second electrode 40 is reflected to the light output surface (namely, one side of the substrate 10).
The first electrode 41 includes a metal material such as chromium (Cr), titanium (Ti), tungsten (W), gold (Au), aluminum (Al), indium (In), tin (Sn), nickel (Ni), platinum (Pt), silver (Ag), or alloys of the previously-mentioned materials. The first electrode 41 may be composed of a single layer or multiple layers, for example, Ti/Au layer, Ti/Pt/Au layer, Cr/Au layer, Cr/Pt/Au layer, Ni/Au layer, Ni/Pt/Au layer, Cr/Al/Cr/Ni/Au layer, or Ag/NiTi/TiW/Pt layer.
When the first electrode 41 and the second electrode 40 are composed of multiple layers, the last layers of the first electrode 41 and the second electrode 40 may include platinum (Pt). The first electrode 41 and the second electrode 40 may serve as a current path for supplying current from an external power source to the first semiconductor layer 201 and the second semiconductor layer 202. Each of the first electrode 41 and the second electrode 40 has a thickness between 1 μm and 10 μm, between 1.5 μm and 5 μm, or between 2.5 μm and 4.5 μm. The first electrode 41 has a thickness greater than or equal to the total thickness of the step difference between the semiconductor platform M and the exposed portion 201p of the first semiconductor layer 201 and the thickness of the second electrode 40. In other words, the first electrode 41 has a thickness greater than that of the second electrode 40.
The insulating layer 50 covering the first electrode 41 and the second electrode 40 includes a first opening 501 exposing the first electrode 41, and a second opening 502 exposing the second electrode 40. The first electrode pad 61 covers the first opening 501 of the insulating layer 50 and contacts the first electrode 41. The second electrode pad 62 covers the second opening 502 of the insulating layer 50 and contacts the second electrode 40.
The passivation layer 30 and/or the insulating layer 50 are disposed on the semiconductor stack 200, and serve as a protective film and an antistatic interlayer insulating film of the light-emitting device 1. As an insulating film, the passivation layer 30 and/or the insulating layer 50 may be a single-layer structure, including metal oxide or metal nitride, and may be selected from oxide, oxynitride, or nitride of the group consisting of silicon (Si), titanium (Ti), zirconium (Zr), Niobium (Nb), tantalum (Ta), and aluminum (Al), for example. The passivation layer 30 and/or the insulating layer 50 may also include two or more materials with different refractive indices stacked alternately to form a distributed Bragg reflector (DBR) structure, which selectively reflects light of a specific wavelength. For example, an insulating reflective structure with high reflectivity may be formed by laminating layers such as SiO2/TiO2 or SiO2/Nb2O5. When SiO2/TiO2 or SiO2/Nb2O5 forms a distributed Bragg reflector (DBR) structure, each of the layers of the distributed Bragg reflector (DBR) structure is designed to be one or integer multiples of the optical thickness of a quarter of the wavelength of light emitted by the active layer 203. The optical thickness of each of the layers of the distributed Bragg reflector (DBR) structure may have a deviation of ±30% on the basis of one or integer multiples of λ/4. Since the thickness of each of the layers of the distributed Bragg reflector (DBR) structure can affect the reflectivity, E-beam evaporation may be used to form the passivation layer 30 and/or the insulating layer 50 to stably control the thickness of each of the layers of the distributed Bragg reflector (DBR) structure.
In the light-emitting device 1, a size of the second electrode pad 62 may be greater than that of the first electrode pad 61. The second electrode pad 62 may be formed in the central area of the light-emitting device 1, and extend along the periphery of the exposed portions 201p of the first semiconductor layer 201. The second electrode pad 62 includes an area greater than a total area of the plurality of first electrode pads 61, and the second electrode 40 includes an area greater than a total area of the plurality of first electrodes 41. In one embodiment of the present disclosure, the area of the first electrode pad 61 accounts for more than 20%, more than 35%, or more than 50% and less than 65% of the area of the first electrode 41. In one embodiment of the present disclosure, the area of the second electrode pad 62 accounts for more than 20%, more than 35%, or more than 50% and less than 65% of the area of the second electrode 40. In one embodiment of the present disclosure, the area of the second electrode pad 62 is more than 30 times, more than 50 times, or more than 70 times that of the first electrode pad 61. Since the area of the first electrode pad 61 is smaller than that of the second electrode pad 62, in order to avoid affecting the bonding force between the first electrode pad 61, the second electrode pad 62 and the mounting substrate 20a, 20b, 20c described below, resulting in component failure or affecting the service life of the component, the quantity of the first electrode pads 61 may be multiple.
In an embodiment of the present disclosure, as shown in each of
In one embodiment of the present disclosure, as shown in
Compared with the first electrode 41 illustrated in
As shown in
The second electrode pad 62 illustrated in
As shown in
Each of the mounting substrates 20a, 20b, 20c includes a first conductor portion 210 and a second conductor portion 220, so that the light-emitting devices 1a, 1b, 1c are in flip-chip form and mounted on the mounting substrates 20a, 20b, 20c, respectively. Each of the mounting substrates 20a, 20b, 20c has a base 1000 to support and to electrically insulate the first conductor portion 210 and the second conductor portion 220. Each of the mounting substrates 20a, 20b, 20c may serve as a heat sink to effectively conduct the heat generated by the light-emitting devices 1a, 1b, 1c to the outside, respectively. For this purpose, the bases 1000 of the mounting substrates 20a, 20b, 20c may be made of a high thermal conductivity material. For example, a material of the base 1000 may include aluminum nitride (AlN), sapphire or silicon carbide (SiC). Alternatively, the base 1000 may have an electrically insulating layer formed on the surface of a silicon substrate, or by forming an electrically insulating layer made of a suitable material on a surface of a metal plate. The material of the metal plate may include a metal exhibiting thermal conductivity. For example, copper (Cu), aluminum (Al), iron (Fe), aluminum (Al) alloy, gold (Au), iron-nickel-cobalt (Fe—Ni—Co) alloy may be the material of the metal plate. For example, SiO2 or Si3N4 may be the material of the electrically insulating layer formed on the surface of the silicon substrate.
As long as the first conductor portion 210 and the second conductor portion 220 can supply current to the light-emitting device 1, the first conductor portion 210 and the second conductor portion 220 may be formed with materials, thicknesses or shapes, which are generally adopted in this industry. Specifically, the first conductor portion 210 and the second conductor portion 220 may be formed of a metal, such as copper (Cu), aluminum (Al), gold (Au), silver (Ag), platinum (Pt), titanium (Ti), tungsten (W), palladium (Pd), iron (Fe), nickel (Ni), or an alloy including the previously-mentioned metals. In particular, in order to efficiently extract the light from the light-emitting device 1, the outermost surfaces of the first conductor portion 210 and the second conductor portion 220 are covered with a material with high reflectivity such as silver or gold. The first conductor portion 210 and the second conductor portion 220 may be formed by electroplating, electroless plating, evaporation deposition, or sputtering. For example, when the outermost surfaces of the first electrode pad 61 and the second electrode pad 62 of the light-emitting device 1 are formed of gold (Au), the outermost surfaces of the first conductor portion 210 and the second conductor portion 220 may be formed of gold (Au) as well. Accordingly, the bondability of the light-emitting devices 1a, 1b, 1c and the mounting substrates 20a, 20b, 20c can be improved, respectively.
The first electrode pad 61 and the second electrode pad 62 in the light-emitting device 1 may be bonded to the first conductor portion 210 and the second conductor portion 220 on the mounting substrates 20a, 20b, 20c by ultrasonic bonding. In addition, the first electrode pad 61 and the second electrode pad 62 may be bonded to the first conductor portion 210 and the second conductor portion 220 on the mounting substrates 20a, 20b, 20c by a bonding member. The bonding member may include a bump, metal powders, metal pastes of resin adhesives, solders, or a low melting point metal, wherein the bump is formed of gold (Au), silver (Ag) or copper (Cu), the metal powders contain such as silver (Ag), gold (Au), copper (Cu), platinum (Pt), aluminum (Al) or palladium (Pd), and the solders contain tin-bismuth, tin-copper, tin-silver or gold-tin.
Each of the first conductor portion 210 and the second conductor portion 220 on the mounting substrate 20a, 20b, 20c has a wiring pattern corresponding to the positions and/or patterns of the first electrode pad 61 and the second electrode pad 62 of the light-emitting devices 1a, 1b, 1c, respectively. Each of the first conductor portions 210 on the mounting substrates 20a, 20b, 20c includes first conductor extensions 2011 corresponding to the first electrode pads 61 on the light-emitting devices 1a, 1b, 1c, respectively. In order to connect with the first electrode pad 61, the first conductor extensions 2011 include different lengths and shapes. Each of the first conductor extensions 2011 includes a portion having a shape identical or similar to a shape of a portion of the first electrode pad 61. A portion of the second conductor portion 220 has a shape identical to that of the second electrode pad 62 to be connected with the second electrode pad 62. The second conductor portion 220 includes concave portions 2020 to respectively accommodate first conductor extensions 2011, and convex portions 2021 disposed corresponding to the convex portions 621 of the second electrode pad 62 illustrated in
As shown in
The wavelength converter 3001 may include various types of phosphors known to those skilled in the art, such as garnet-type phosphors, aluminate phosphors, sulfide phosphors, oxynitride phosphors, nitrogen phosphors, fluoride phosphors, or silicate phosphors, and can convert the wavelength of light emitted from the light-emitting device to emit white light. In one embodiment, when the above-mentioned light-emitting element 3002 releases light with a peak wavelength in the blue light range, the wavelength converter 3001 may include a phosphor which emits light with a peak wavelength longer than that of blue light, for example, green light, red light, or yellow light.
As shown in
As shown in
Each of the embodiments listed in the present disclosure is merely used to illustrate the present disclosure and is not intended to limit the scope of the present disclosure. Any obvious modifications or variations made by anyone to the present disclosure will not depart from the spirit and scope of the present disclosure.
Number | Date | Country | Kind |
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111113123 | Apr 2022 | TW | national |