1. Technical Field
The present disclosure relates to a light-emitting diode (LED) control circuit.
2. Description of Related Art
LEDs are used in lighting equipment nowadays. However, lots of lighting equipment has fixed brightness. Users cannot adjust the brightness of the lighting equipment as required.
Many aspects of the embodiments can be better understood with reference to the following drawings. The components in the drawings are not necessarily drawn to scale, the emphasis instead being placed upon clearly illustrating the principles of the present embodiments. Moreover, in the drawings, like reference numerals designate corresponding parts throughout the several views.
The disclosure, including the accompanying drawings, is illustrated by way of example and not by way of limitation. It should be noted that references to “an” or “one” embodiment in this disclosure are not necessarily to the same embodiment, and such references mean at least one.
Referring to
In the embodiment, the lighting equipment includes eight LEDs L1-L8. The LEDs L1 and L2 are regarded as a first group of LEDs 30. The LEDs L3 and L4 are regarded as a second group of LEDs 32. The LEDs L5 and L6 are regarded as a third group of LEDs 35. The LEDs L7 and L8 are regarded as a fourth group of LEDs 36. An anode of the LED L1 is connected to a first terminal of the current detecting circuit 15 through a resistor R8. A cathode of the LED L1 is connected to an anode of the LED L2. A cathode of the LED L2 is connected to the first switching circuit 13a and an anode of the LED L3. A cathode of the LED L3 is connected to an anode of the LED L4. A cathode of the LED L4 is connected to the second switching circuit 13b and an anode of the LED L5. A cathode of the LED L5 is connected to an anode of the LED L6. A cathode of the LED L6 is connected to the third switching circuit 13c and an anode of the LED L7. A cathode of the LED L7 is connected to an anode of the LED L8. A cathode of the LED L8 is connected to the fourth switching circuit 13d. In other embodiments, the lighting equipment may include more or less than four groups of LEDs.
The switch SW1 is connected between an alternating current (AC) power supply 20 and the AC/DC rectifier 10. The AC/DC rectifier 10 rectifies the AC power supply 20 to a direct current (DC) power supply V0. An input of the control signal generating circuit 12 is connected to the AC/DC rectifier 10 to receive the DC power supply V0. The control signal generating circuit 12 outputs control signals according to the DC power supply V0.
The LDO regulator 11 is connected to the AC/DC rectifier 10 for converting the DC power supply V0 to another DC power supply Vcc to supply power to certain components of the control signal generating circuit 12. In other embodiments, other voltage conversion devices may replace the LDO regulator 11.
Four output terminals of the control signal generating circuit 12 are connected to control terminals of the first to fourth switching circuit 13a-13d correspondingly. A first terminal of the first switching circuit 13a is connected to a node between the first group of LEDs 30 and the second group of LEDs 32 (namely a node between the LEDs L2 and L3). A second terminal of the first switching circuit 13a receives the DC power supply V0. A third terminal of the first switching circuit 13a is grounded. A first terminal of the second switching circuit 13b is connected to a node between the second group of LEDs 32 and the third group of LEDs 35 (namely a node between the LEDs L4 and L5). A second terminal of the second switching circuit 13b receives the DC power supply V0. A third terminal of the second switching circuit 13b is grounded. A first terminal of the third switching circuit 13c is connected to a node between the third group of LEDs 35 and the fourth group of LEDs 36 (namely a node between the LEDs L6 and L7). A second terminal of the third switching circuit 13c receives the DC power supply V0. A third terminal of the third switching circuit 13c is grounded. A first terminal of the fourth switching circuit 13d is connected to the cathode of the LED L8. A second terminal of the fourth switching circuit 13d receives the DC power supply V0. A third terminal of the fourth switching circuit 13d is grounded.
The first to fourth switching circuits 13a-13d are turned on or off according to control signals from the control signal generating circuit 12. For example, when the first switching circuit 13a is turned on, and the second to fourth switching circuits 13b-13d are turned off, the first group of LEDs 30 (namely the LEDs L1 and L2) are turned on. When the second switching circuit 13b is turned on, and the first switching circuit 13a, the third switching circuit 13c, and the fourth switching circuit 13d are turned off, the first and second groups of LEDs 30 and 32 (namely the LEDs L1-L4) are turned on. When the third switching circuit 13c is turned on, and the first switching circuit 13a, the second switching circuit 13b, and the fourth switching circuit 13d are turned off, the first, second, and third groups of LEDs 30, 32, and 35 (namely the LEDs L1-L6) are turned on. When the fourth switching circuit 13d is turned on, and the first switching circuit 13a, the second switching circuit 13b, and the third switching circuit 13c are turned off, the first to fourth groups of LEDs 30, 32, 35, and 36 (namely the LEDs L1-L8) are turned on. At this time, the lighting equipment has the most brightness.
A second terminal of the current detecting circuit 15 is connected to the AC/DC rectifier 10, for sensing the current flowing through the LEDs. The current detecting circuit 15 further adjusts the current flowing through the LEDs to make the current flowing through the LEDs equal to a predetermined value.
The control signal generating circuit 12 includes a field effect transistor (FET) T1, a first JK flip-flop J1, a second JK flip-flop J2, a first inverter U1a, a second inverter U1b, a first AND gate U2a, a second AND gate U2b, a third AND gate U2c, and a fourth AND gate U2d.
Input terminals J and K of the first JK flip-flop J1 are connected to the DC power supply Vcc. A triggering terminal CLK of the first JK flip-flop J1 is connected to a drain of the FET T1. A first output terminal
Input terminals of the second JK flip-flop J2 are connected to the DC power supply Vcc. A triggering terminal CLK of the second JK flip-flop J2 is connected to a second output terminal Q0 of the first JK flip-flop J1. A first output terminal
An input terminal of the first inverter U1a is connected to the second output terminal Q0 of the first JK flip-flop J1. An output terminal of the first inverter U1a is connected to a first input terminal of the first AND gate U2a. An input terminal of the second inverter U1b is connected to a second output terminal Q1 of the JK flip-flop J2. An output terminal of the second inverter U1b is connected to a second input terminal of the first AND gate U2a. A first input terminal of the second AND gate U2b is connected to the second output terminal Q0 of the first JK flip-flop J1. A second input terminal of the second AND gate U2b is connected to the output terminal of the second inverter U1b. A first input terminal of the third AND gate U2c is connected to the output terminal of the first inverter U1a. A second input terminal of the third AND gate U2c is connected to the output terminal Q1 of the second JK flip-flop J2. A first input terminal of the fourth AND gate U2d is connected to the second output terminal Q0 of the first JK flip-flop J1. A second input terminal of the fourth AND gate U2d is connected to the second output terminal Q1 of the second JK flip-flop J2. Output terminals of the first to fourth AND gates U2a-U2d function as the four output terminals S1-S4, and are connected to the first to fourth switching circuits 13a-13d.
The first switching circuit 13a includes a FET T2. A gate of the FET T2 is connected the first output terminal S1 of the control signal generating circuit 12. A drain of the FET T2 is connected to the DC power supply V0 through a resistor R4. A source of the FET T2 is grounded. The drain of the FET T2 is further connected to a node between the LEDs L2 and L3.
The second switching circuit 13b includes a FET T3. A gate of the FET T3 is connected the second output terminal S2 of the control signal generating circuit 12. A drain of the FET T3 is connected to the DC power supply V0 through a resistor R5. A source of the FET T3 is grounded. The drain of the FET T3 is further connected to a node between the LEDs L4 and L5.
The third switching circuit 13c includes a FET T4. A gate of the FET T4 is connected the third output terminal S3 of the control signal generating circuit 12. A drain of the FET T4 is connected to the DC power supply V0 through a resistor R6. A source of the FET T4 is grounded. The drain of the FET T4 is further connected to a node between the LEDs L6 and L7.
The fourth switching circuit 13d includes a FET T5. A gate of the FET T5 is connected the fourth output terminal S4 of the control signal generating circuit 12. A drain of the FET T5 is connected to the DC power supply V0 through a resistor R7. A source of the FET T5 is grounded. The drain of the FET T5 is further connected to a cathode of the LED L8.
When the switch SW1 is turned on for a first time, the DC power supply V0 is output to the current detecting circuit 15 and the gate of the FET T1. The capacitor C1 is charged by the DC power supply Vcc. At this time, the control signal generating circuit 12 is activated. The FET T1 is turned on. The triggering terminal CLK of the first JK flip-flop J1 receives a low level signal.
When the switch SW1 is turned off, the capacitor C1 supplies power to the control signal generating circuit 12. At this time, the voltage on the capacitor C1 is not enough to turn on the FET T1. The first JK flip-flop J1 receives a high level signal. When the switch SW1 is turned on for a second time, the FET T1 is turned on again. The triggering terminal CLK of the first JK flip-flop J1 receives a low level signal.
The first JK flip-flop J1 and the second JK flip-flop J2 form an adding counter. When the triggering terminal CLK receives a signal on a rising edge, output of the output terminals Q1 and Q0 of the adding counter add one, as shown in the table 1:
The first and second inverters U1a and U1b, and the first to fourth AND gates U2a-U2d form a 2-to-4 line single bit decoder. The 2-to-4 line single bit decoder converts a 2-bit code to a 4-bit code. The 2-bit code from the output terminals Q1 and Q0 of the adding counter are converted to a 4-bit code. For example, when the adding counter outputs a 2-bit code “00”, the 2-bit to 4-bit encoder outputs a 4-bit code “1000”. At this time, the FET T2 is turned on, and the FETs T3-T5 are turned off. As a result, the LEDs L1 and L2 are turned on, and the LEDs L3-L8 are not working. The relationship between the triggering terminal CLK of the first JK flip-flop J1, the output terminals Q1 and Q0 of the adding counter, the output terminals S1-S4 of the 2-to-4 line single bit decoder, and the FETs T2-T5 is described as follows:
When the switch SW1 is turned on for a first time, the triggering terminal CLK of the first JK flip-flop J1 receives a low level signal. At this time, the first switching circuit 13a is turned on, and the second to fourth switching circuits 13b-13d are turned off. The LEDs L1 and L2 are turned on as a result. When the switch SW1 is turned on once again, the triggering terminal CLK of the first JK flip-flop J1 receives a signal on a rising edge, the second switching circuit 13b is turned on, and the first switching circuit 13a, the third switching circuit 13c, and the fourth switching circuit 13d are turned off. The LEDs L1-L4 are turned on as a result. When the switch SW1 is turned on for a third time, the triggering terminal CLK of the first JK flip-flop J1 receives a signal on a rising edge, the third switching circuit 13c is turned on, the first switching circuit 13a, the second switching circuit 13b, and the fourth switching circuit 13d are turned off. The LEDs L1-L6 are turned on as a result. When the switch SW1 is turned on for a fourth time, the triggering terminal CLK of the first JK flip-flop J1 receives a signal on a rising edge, the fourth switching circuit 13d is turned on, the first switching circuit 13a, the second switching circuit 13b, and the third switching circuit 13c are turned off. The LEDs L1-L8 are turned on as a result.
In the embodiment, the FETs T1-T4 function as switches. In other embodiments, the FETs T1-T4 can be replaced by other elements, such as bipolar transistors.
Referring to
The foregoing description of the embodiments of the disclosure has been presented only for the purposes of illustration and description and is not intended to be exhaustive or to limit the disclosure to the precise forms disclosed. Many modifications and variations are possible in light of the above everything. The embodiments were chosen and described in order to explain the principles of the disclosure and their practical application so as to enable others of ordinary skill in the art to utilize the disclosure and various embodiments and with various modifications as are suited to the particular use contemplated. Alternative embodiments will become apparent to those of ordinary skills in the art to which the present disclosure pertains without departing from its spirit and scope. Accordingly, the scope of the present disclosure is defined by the appended claims rather than the foregoing description and the exemplary embodiments described therein.
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