Patent Application
20240222558
This application claims the priority benefit of China application serial no. 202211696015.7, filed on Dec. 28, 2022. The entirety of the above-mentioned patent application is hereby incorporated by reference herein and made a part of this specification.
The disclosure relates to the technical field of semiconductor manufacturing, and in particular, relates to a light emitting diode, a manufacturing method, and a light emitting device.
Due to advantages such as low costs, high luminous efficiency, energy conservation, and environmental protection, light emitting diodes (LEDs) are widely used in lighting, visible light communications, luminous displays, and other scenarios. LED chips are categorized into three structures: the lateral structure, the flip-chip structure, and the vertical structure. Compared to the conventional lateral chips, the flip chips have the advantages of high current, reliability, and ease of use, so the flip chips have gained large-scale application at present.
The flip-chip structure of a light emitting diode means that the lateral chip is turned upside down, so that the light excited by the light emitting layer is emitted directly from the other side of the electrode. The light-emitting diodes designed based on this flip-chip structure are called the flip-chip light emitting diodes. As shown in
Currently, the working region of the push-up pin is bypassed mainly by changing the position of the extension portion of the contact electrode. However, when the structural shape or position of the contact electrode changes to a certain extent, the current inside the light emitting diode will become abnormal, so the problem of uneven light emission may occur in the light emitting diode. Therefore, how to prevent the push-up pin from pushing against the protruding structure of the extension portion of the metal electrode while ensuring uniform light emission in the light emitting diode is an urgent technical problem that needs to be solved.
The disclosure provides a light emitting diode at least including an epitaxial structure, a first electrode, a second electrode, and an insulating layer. The epitaxial structure includes a second semiconductor layer, a light emitting layer, and a first semiconductor layer stacked in sequence from bottom to top. The first electrode is located on the first semiconductor layer and is electrically connected to the first semiconductor layer. The second electrode is located on the second semiconductor layer and is electrically connected to the second semiconductor layer. The first electrode at least includes a first metal electrode, and the first metal electrode has a strip-shaped extension portion. The insulating layer is located at least on the first semiconductor layer and the first metal electrode. The insulating layer has a partially thinned portion, and at least part of the extension portion is located below the partially thinned portion of the insulating layer.
The disclosure further provides a manufacturing method of a light emitting diode, and the method includes the following steps. An epitaxial structure including a second semiconductor layer, a light emitting layer, and a first semiconductor layer stacked in sequence from bottom to top is provided. A first metal electrode is manufactured, and this step includes depositing the first metal electrode on the first semiconductor layer, wherein the first metal electrode has a strip-shaped extension portion. An insulating layer covering at least the first semiconductor layer and the first metal electrode is deposited. Part of the insulating layer above the extension portion of the first metal electrode is thinned through a removal process to form a partially thinned portion of the insulating layer.
The disclosure further provides a light emitting device using the light emitting diode according to any one of the above.
In the light emitting diode provided by the disclosure, the partially thinned portion is provided on the insulating layer, such that at least part of the extension portion is located below the partially thinned portion of the insulating layer. In this way, the push-up pin does not push through the protruding structure of the metal electrode and does not cause chip abnormality. Further, the problem of uneven light emission caused by changes in the current due to changes in the structural shape or position of the contact electrode may also be prevented.
Additional features and advantages of the disclosure will be set forth in the following specification, and in part will be apparent from the specification or can be learned by practice of the disclosure.
To make the technical solutions provided in the embodiments of the disclosure or the prior art more clearly illustrated, several accompanying drawings required by the embodiments or the prior art for description are briefly introduced as follows. Obviously, the drawings in the following description are some embodiments of the disclosure, and for a person having ordinary skill in the art, other drawings can be obtained based on these drawings without any inventive effort.
In order to make the objectives, technical solutions, and advantages of the embodiments of the disclosure more clearly, the technical solutions in the embodiments of the disclosure will be clearly and completely described in the following paragraphs together with the accompanying drawings in the embodiments of the disclosure. The technical features designed in different embodiments of the disclosure described in the following paragraphs can be combined with one another as long as they do not conflict with one another.
With reference to
The epitaxial structure 10 has a first surface and a second surface opposite to each other. A substrate 60 is provided on the second surface side of the epitaxial structure 10. The substrate 60 may be a transparent substrate, a non-transparent substrate, or a translucent substrate. The transparent substrate or the translucent substrate may allow the light radiated by a light emitting layer 12 to pass through the substrate 60 and reach a side of the substrate 60 away from the epitaxial structure 10. For instance, the substrate 60 may be any one of a sapphire flat substrate, a sapphire patterned substrate, a silicon substrate, a silicon carbide substrate, a gallium nitride substrate, and a glass substrate. In some embodiments, thinning or removal may also be performed to form a thin-film light emitting diode chip. In this embodiment, the light emitting diode is preferably a sapphire substrate. In other embodiments, the epitaxial structure 10 may be connected to the substrate 60 through an adhesive layer (not shown).
The epitaxial structure 10 includes a second semiconductor layer 13, the light emitting layer 12, and a first semiconductor layer 11 stacked in sequence from bottom to top on the substrate 60. As an example, the first semiconductor layer 11 and the second semiconductor layer 13 have different conductivity types, which may be N-type or P-type. Radiative recombination may occur on the light emitting layer 12. To be specific, the light emitting layer 12 may be a single quantum well layer or a multiple quantum well layer. For instance, the first semiconductor layer 11 may be an N-type GaN layer, or the second semiconductor layer 13 may be an N-type GaN layer. Herein, the N-type is a silicon-based doping type, and the P-type is a magnesium-based doping type. Certainly, the epitaxial structure 10 may also include other layer materials, such as window layers or ohmic contact layers, which are arranged into different multi-layers according to different doping concentrations or component contents.
The first electrode 20 is located on the first semiconductor layer 11 on one side of the first surface and is electrically connected to the first semiconductor layer 11. The second electrode 30 is located on the second semiconductor layer 13 on one side of the first surface and is electrically connected to the second semiconductor layer 13. The first electrode 20 at least includes a first metal electrode 21 and a first pad electrode 22, and the second electrode 30 at least includes a second metal electrode 31 and a second pad electrode 32. As an example, with reference to
With reference to
With reference to
Preferably, the partially thinned portion 41 of the insulating layer 40 has a thinner thickness relative to the remaining portions of the insulating layer 40. With reference to
Through the abovementioned definition of the first thickness D1 and the second thickness D2, a height difference between an upper surface of the partially thinned portion 41 of the insulating layer 40 and the upper surface of the insulating layer 40 around the partially thinned portion 41 is reduced. Therefore, the push-up pin may not push through the protruding structure 40a of the metal electrode, so chip abnormality thus may not occur. In addition, the problem of uneven light emission caused by changes in current caused by changing the structural shape or position of the metal electrode in the prior art may also be avoided. Therefore, in LED production and application, the yield rate of the products is greatly improved, and important practical application values are thus provided.
In a preferred embodiment, a thickness difference between the second thickness D2 and the first thickness D1 is less than or equal to a thickness of the extension portion 21a. To be specific, the upper surface of the partially thinned portion 41 may be thinned so that the thickness difference between the second thickness D2 and the first thickness D1 is less than or equal to the thickness of the extension portion 21a. That is, by reducing the height difference between the upper surface of the partially thinned portion 41 and the upper surface of the insulating layer 40 around the partially thinned portion 41, damage to the extension portion 21a located below the partially thinned portion 41 due to uneven contact may be effectively reduced when the push-up pin contacts the partially thinned portion 41.
As an example, the second thickness D2 ranges from 1 micron to 6 microns. Through the setting of this range, the protective and insulating effect of the insulating layer 40 on the metal electrode is ensured. Further, when the insulating layer 40 is a reflective layer, in order to ensure the reflection effect of the insulating layer 40, the second thickness D2 of the insulating layer 40 may range from 2 microns to 5 microns.
Preferably, with reference to
Optionally, the extension portion 21a is linear, extends from below the first pad electrode 22 and parallel to the extension portion of the second metal electrode 31 toward the second pad electrode 32, and extends without passing through the center of the epitaxial structure 10.
Optionally, the extension portion 21a is in a non-linear shape (e.g., an arc shape), extends from below the first pad electrode 22 and without being parallel to the extension portion of the second metal electrode 31 toward the second pad electrode 32, and extends without passing through the center of the epitaxial structure 10.
In an embodiment, when viewed from above the light emitting diode toward the epitaxial structure 10, the partially thinned portion 41 of the insulating layer 40 is located between the first pad electrode 22 and the second pad electrode 32. During the packaging process of the light emitting diode, a region between the first pad electrode 22 and the second pad electrode 32 is a region where the push-up pin works. Therefore, the partially thinned portion 41 of the insulating layer 40 is arranged in this region, and the partially thinned portion 41 may be thinned through a removal process, so that the first thickness D1 is lower than the second thickness D2, and that the push-up pin is effectively prevented from pushing through the metal electrode. In the general packaging process, it is necessary to use a circular push-up pin to act on a center of a light emitting diode to lift up the light emitting diode for die bonding. Therefore, the partially thinned portion 41 of the insulating layer 40 may be located in the center of the light emitting diode.
In some embodiments, when viewed from above the light emitting diode toward the epitaxial structure 10, a size range of a push-up pin working region S in a length direction of the extension portion 21a falls within a size range of the partially thinned portion 41 of the insulating layer 40 in the length direction of the extension portion 21a. As shown in
In other embodiments, for instance, as shown in
It should be noted that the maximum width D3 refers to the longest dimension formed by the partially thinned portion 41 of the insulating layer 40 in the length direction of the extension portion 21a. In
It should also be noted that, according to the inventive concept, the partially thinned portion 41 may also be a region of any shape (e.g., a diamond-shaped region or a crescent-shaped region) located above part of the structure of the extension portion 21a. The specific position may be set according to the size and position of the push-up pin working region S.
Further, in order to more effectively prevent the protruding structure 40a from affecting the operation of the push-up pin, in this embodiment, the upper surface of the partially thinned portion 41 of the insulating layer 40 is at a same level as the upper surface of the insulating layer 40 located around the extension portion 21a. To be specific, with reference to
In an embodiment, as shown in
As an example, a material of the current spreading layer 50 may be a metal oxide. Further, the current spreading layer 50 may be a relatively transparent material that allows at least part of the radiation from the light emitting layer 12 to pass through, such as one or a combination of ITO, IZO, InO, SnO, GTO, GZO, and ZnO. The disclosure is not limited to the examples listed here. A thickness of the current spreading layer 50 is preferably 30 nm to 200 nm, such as 30 nm, 50 nm, 70 nm, 100 nm, 150 nm, or 200 nm.
The current blocking layer 70 is located above the first semiconductor layer 11 and below the current spreading layer 50 and is configured to block vertical and longitudinal current transmission between the first metal electrode 21 and the first semiconductor layer 11, thereby facilitating lateral current spreading through the current spreading layer 50. Preferably, when viewed from above the light emitting diode toward the epitaxial structure 10, the width of the current blocking layer 70 is greater than the width of the extension portion 21a of the first metal electrode 21. Exemplarily, shapes of the current blocking layer 70 and the first metal electrode 21 are the same. Further, the current blocking layer 70 is located below the first metal electrode 21, and further, is located at least below the extension portion 21a. The current blocking layer 70 is also in a strip shape, and its width is greater than the width of the extension portion 21a of the first metal electrode 21, for example, 3 microns to 8 microns wide.
As an example, a material of the current blocking layer 70 is an insulating material, which may be an oxide. Further, the current blocking layer 70 may be a relatively transparent material that allows at least part of the radiation from the light emitting layer 12 to pass through, such as one or a combination of silicon oxide, silicon nitride, and other materials. The disclosure is not limited to the examples listed here. A thickness of the current blocking layer 70 is 200 nm to 500 nm.
Further, if the current blocking layer 70 is provided between the first semiconductor layer 11 and the first metal electrode 21, the thickness difference between the second thickness D2 and the first thickness D1 is less than or equal to a sum of the thicknesses of the extension portion 21a and the current blocking layer 70. Through the above arrangement, it is defined that the upper surface of the partially thinned portion 41 of the insulating layer 40 is lower than or flush with the upper surface of the insulating layer 40 around the partially thinned portion 41 when the current blocking layer 70 is provided. In this way, the possibility of deformation of the metal electrode or pushing and cracking of the epitaxial structure 10 caused by contact of the push-up pin is effectively prevented.
With reference to
With reference to
With reference to
In a preferred embodiment, the removal process is at least one of laser, dry etching, and wet etching. The specific selection may be made according to actual needs and is not limited herein. In this embodiment, the ISO dry etching process is preferred.
Further, with reference to
The disclosure further provides a light emitting device using the light emitting diode as described in any of the above embodiments, so that the performance of the light emitting device may be effectively improved.
In view of the foregoing, in the light emitting diode provided by the disclosure, by changing the thickness of the insulating layer, the chip abnormality caused by the deformation of the metal electrode or pushing and cracking of the epitaxial structure caused by the action of the push-up pin may be effectively avoided. Further the problem of uneven light emission caused by changes in the current due to changes in the structural shape or position of the contact electrode may also be prevented. The overall performance and reliability of the light emitting diode is thereby improved.
Finally, it is worth noting that the foregoing embodiments are merely described to illustrate the technical means of the disclosure and should not be construed as limitations of the disclosure. Even though the foregoing embodiments are referenced to provide detailed description of the disclosure, people having ordinary skill in the art should understand that various modifications and variations can be made to the technical means in the disclosed embodiments, or equivalent replacements may be made for part or all of the technical features; nevertheless, it is intended that the modifications, variations, and replacements shall not make the nature of the technical means to depart from the scope of the technical means of the embodiments of the disclosure.
| Number | Date | Country | Kind |
|---|---|---|---|
| 202211696015.7 | Dec 2022 | CN | national |
