Patent Application
20130299863
The present invention relates generally to a light-emitting element, and more particularly to a light-emitting diode (LED) structure and a method for manufacturing the same.
In the LED structure 100 in such an SP mode, the energy of photons emitted from the active layer 106 can be transferred to the resonant metal layer 112 disposed on the p-type semiconductor layer 108. The resonant metal layer 112, upon absorbing the energy transferred from the photons, presents the energy in a photon mode or an SP mode, and generates an electromagnetic field. The electromagnetic field generated by the resonant metal layer 112 excites the active layer 106 in turn. Therefore, the active layer 106 emits more photons, thereby further enhancing the light emitting efficiency of the LED structure 100. In addition, the resonant metal layer 112 can emit the absorbed photons again, so as to solve the problem of total internal reflection that occurs due to an excessively large refractive index difference between the semiconductor material layer and the air interface, thereby further enhancing the light extraction efficiency of the LED structure 100.
However, the thickness of the p-type semiconductor layer 108 is often about thousands of angstroms (Å). Therefore, a distance is present between the resonant metal layer 112 located on the p-type semiconductor layer 108 and the active layer 106. Therefore, the photon coupling efficiency of the resonant metal layer 112 and the active layer 106 becomes undesirable, further causing that the effect of enhancing the light efficiency fails to meet the expectations.
To enhance the photon coupling efficiency of a resonant metal layer and an active layer, it is proposed in the industry to dispose a resonant metal layer between the n-type semiconductor layer and the active layer or to dispose a resonant metal layer between the active layer and the p-type semiconductor layer. Although such a structural design can make the resonant metal layer closer to the active layer, the epitaxial process of the epitaxial structure needs to be interrupted to deposit the resonant metal layer. Therefore, the epitaxial quality of the epitaxial structure is severely affected, and the light emitting efficiency of the epitaxial structure is significantly reduced.
In one aspect, the present invention provides an LED structure and a method for manufacturing the same, in which an SP structure is concavely disposed in a light-emitting structure, so that the distance between a resonant metal layer of the SP structure and an active layer can be effectively reduced, so as to enhance the coupling efficiency of the resonant metal layer and the active layer, thereby further enhancing the internal quantum efficiency of the LED structure.
In another aspect, the present invention provides an LED structure and a method for manufacturing the same, which is capable of reducing the phenomenon of total internal reflection inside an LED structure by adjusting the material of an insulating layer in an SP structure, thereby further enhancing the external quantum efficiency of the LED structure.
An LED structure according to one embodiment of the present application includes a substrate, a light-emitting structure, at least one SP structure, and a first electrode and a second electrode. The light-emitting structure is disposed on the substrate, and includes a first electrical type semiconductor layer, an active layer, a second electrical type semiconductor layer, and a first conductive layer stacked sequentially on the substrate. The active layer is located on a first portion of the first electrical type semiconductor layer and is exposed from a second portion of the first electrical type semiconductor layer. The first electrical type semiconductor layer and the second electrical type semiconductor layer have different electrical types. The at least one SP structure is concavely disposed in the first conductive layer and the second electrical type semiconductor layer. The first electrode and the second electrode are disposed on the second portion of the first electrical type semiconductor layer and the first conductive layer, respectively.
In one embodiment, the at least one SP structure includes a plurality of SP bars or a plurality of SP dots.
In one embodiment, the light-emitting structure further includes at least one groove disposed in the first conductive layer and the second electrical type semiconductor layer, and the at least one SP structure is located in the at least one groove. The at least one SP structure includes a first insulating layer, a resonant metal layer, and a second insulating layer sequentially stacked.
In one embodiment, the distance between the bottom surface of the at least one groove and the active layer is from 50 Å to 1000 Å.
In one embodiment, the width of the bottom surface of the at least one SP structure is from 10 nm to 5 μm. In a preferred embodiment, the width of the bottom surface of the at least one SP structure is from 0.5 μm to 2 μm.
In one embodiment, the thickness of the resonant metal layer is from 5 Å to 500 Å.
In one embodiment, the material of the first insulating layer and the second insulating layer includes titanium dioxide (TiO2), aluminum oxide (Al2O3), silicon dioxide (SiO2) or silicon nitride (Si3N4).
In one embodiment, the refractive index of the first insulating layer is greater than the refractive index of the second insulating layer.
In one embodiment, the LED structure further includes a second conductive layer covering the first conductive layer and the at least one SP structure.
In one embodiment, the at least one SP structure includes a resonant metal layer.
In one embodiment, the at least one SP structure includes an insulating layer and a resonant metal layer covering the insulating layer.
A method for manufacturing an LED structure according to one embodiment of the present invention includes the following steps. A light-emitting structure is formed on a substrate. The light-emitting structure includes a first electrical type semiconductor layer, an active layer, a second electrical type semiconductor layer, and a first conductive layer sequentially stacked on the substrate. The active layer is located on a first portion of the first electrical type semiconductor layer and is exposed from a second portion of the first electrical type semiconductor layer. The first electrical type semiconductor layer and the second electrical type semiconductor layer have different electrical types. At least one groove is formed in the first conductive layer and the second electrical type semiconductor layer. At least one SP structure is formed in the at least one groove. A first electrode and a second electrode are formed on the second portion of the first electrical type semiconductor layer and the first conductive layer, respectively.
In one embodiment, the step of forming the at least one SP structure includes sequentially forming a first insulating layer, a resonant metal layer, and a second insulating layer to be filled in the at least one groove.
In one embodiment, between the step of forming the at least one SP structure and the step of forming the first electrode and the second electrode, the method for manufacturing an LED structure further includes forming a second conductive layer covering the first conductive layer and the at least one SP structure.
In one embodiment, the step of forming the at least one SP structure includes forming a resonant metal layer covering the at least one groove.
In one embodiment, the step of forming the at least one SP structure includes forming an insulating layer covering the at least one groove, and forming a resonant metal layer covering the insulating layer.
These and other aspects of the present invention will become apparent from the following description of the preferred embodiment taken in conjunction with the following drawings, although variations and modifications therein may be effected without departing from the spirit and scope of the novel concepts of the disclosure.
The accompanying drawings illustrate one or more embodiments of the invention and together with the written description, serve to explain the principles of the invention. Wherever possible, the same reference numbers are used throughout the drawings to refer to the same or like elements of an embodiment, and wherein:
The present invention will now be described more fully hereinafter with reference to the accompanying drawings, in which exemplary embodiments of the invention are shown. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. Like reference numerals refer to like elements throughout.
Example embodiments are described herein with reference to cross-sectional illustrations that are schematic illustrations of idealized embodiments (and intermediate structures) of example embodiments. As such, variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and/or tolerances, are to be expected. Thus, example embodiments should not be construed as limited to the shapes of regions illustrated herein but are to include deviations in shapes that result, for example, from manufacturing.
It will be understood that when an element or layer is referred to as being “on,” “connected to,” “coupled to,” or “covering” another element or layer, it may be directly on, connected to, coupled to, or covering the other element or layer or intervening elements or layers may be present. In contrast, when an element is referred to as being “directly on” another element, there are no intervening elements present. As used herein, the term “and/or” includes any and all combinations of one or more of the associated listed items.
It will be understood that, although the terms first, second, third etc. may be used herein to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the present invention.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the singular forms “a”, “an” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms “comprises” and/or “comprising,” or “includes” and/or “including” or “has” and/or “having” when used in this specification, specify the presence of stated features, regions, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, regions, integers, steps, operations, elements, components, and/or groups thereof.
Furthermore, relative terms, such as “lower” or “bottom” and “upper” or “top,” may be used herein to describe one element's relationship to another element as illustrated in the Figures. It will be understood that relative terms are intended to encompass different orientations of the device in addition to the orientation depicted in the Figures. For example, if the device in one of the figures is turned over, elements described as being on the “lower” side of other elements would then be oriented on “upper” sides of the other elements. The exemplary term “lower”, can therefore, encompasses both an orientation of “lower” and “upper,” depending of the particular orientation of the figure. Similarly, if the device in one of the figures is turned over, elements described as “below” or “beneath” other elements would then be oriented “above” the other elements. The exemplary terms “below” or “beneath” can, therefore, encompass both an orientation of above and below.
Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and the present disclosure, and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
As shown in
As shown in
In certain embodiments of the present invention, the first electrical type and the second electrical type are different electrical type. For example, one of the first electrical type and the second electrical type is n-type, and the other is p-type. In this exemplary embodiment, the first electrical type is n-type, and the second electrical type is p-type. In some examples, the material of the epitaxial structure includes, for example, gallium nitride (GaN) series materials, such as gallium nitride, aluminum gallium nitride (AlGaN), indium gallium nitride (InGaN) and indium aluminum gallium nitride (InAlGaN). The active layer 208 includes, for example, a multiple quantum well (MQW) structure.
In certain embodiments, when the LED structure 200a is applied to a wire bonding packaging structure, the conductive layer 212 can be, for example, a transparent conductive layer. At this time, the material of the transparent conductive layer 212 is, for example, indium tin oxide (ITO), zinc oxide (ZnO), gallium zinc oxide (GZO), aluminum zinc oxide (AZO) or indium oxide (In2O3). Alternatively, when the LED structure 200a is applied to a flip chip packaging structure, the conductive layer 212 can be, for example, an ohmic reflection layer. At this time, the material of the conductive layer 212 is, for example, silver (Ag), or silver/nickel/titanium/platinum (Ag/Ni/Ti/Pt).
In the LED structure 200a, the light-emitting structure 214 includes a mesa structure 256. As shown in
As shown in
Referring to
In another embodiment, the SP structure 220a further selectively includes an insulating layer 236. The insulating layer 236 first covers the bottom surface 244 and the side surface 242 of the groove 218a, the resonant metal layer 238 then covers the insulating layer 236, and the material of the insulating layer 236 is, for example, titanium dioxide, aluminum oxide, silicon dioxide or silicon nitride. Further, the thickness of the insulating layer 236 is for example, from 20 Å to 200 Å. In this embodiment, because of the deposition of the insulating layer 236, the SP structure 220a might be excited by photons more easily to generate an electromagnetic field, which subsequently affecting the active layer 208 to generate more photons. Additionally, the insulating layer 236 may prevent that the depth of the groove 218a exceeds the active layer 208, and therefore avoid short circuits.
In yet another embodiment, the SP structure 220a also selectively includes an insulating layer 240. The insulating layer 240 covers the resonant metal layer 238 and can fill the groove 218a. The material of the insulating layer 240 is, for example, titanium dioxide, aluminum oxide, silicon dioxide or silicon nitride. In an embodiment, the refractive index of the material of the insulating layer 236 is greater than the refractive index of the material of the insulating layer 240, so as to prevent total internal reflection of light emitted from the active layer 208 inside the light-emitting structure 214. The insulating layer 240 is disposed to effectively reduce the aspect ratio (depth to width ratio) of the groove 218a or even to achieve a planar effect for the surface of the light-emitting structure 214. Therefore, the problem of undesirable coverage caused by an excessively large aspect ratio of the groove 218a does not occur in the subsequent deposition of the conductive layer 216. In certain embodiments, the insulating layer 240 can completely fill or partly fill the groove 218a. Even if the insulating layer 240 does not completely fill the groove 218a, the effect of reducing the aspect ratio of the groove 218a can still be achieved.
Therefore, in this embodiment, the SP structure 220a can include only the resonant metal layer 238, or include the resonant metal layer 238 and the insulating layer 236 thereunder, or include the resonant metal layer 238 and the insulating layer 240 thereon, or includes the resonant metal layer 238, the insulating layer 236 thereunder, and the insulating layer 240 thereon at the same time.
Further, a width 246 of the bottom surface of the SP structure 220a is, for example, from 10 nm to 5 μm, so as to prevent the SP structure 220a from affecting the even distribution of current in the second electrical type semiconductor layer 210. By designing the range of the width 246 of the bottom surface of the SP structure 220a, the lateral current in the second electrical type semiconductor layer 210 is evenly distributed into the entire second electrical type semiconductor layer 210, so as to prevent uneven current distribution. In a preferred embodiment, the width 246 of the bottom surface of the SP structure 220a is, for example, 0.5 μm to 2 μm.
By the design of the groove 218a, the distance between the resonant metal layer 238 of the SP structure 220a and the active layer 208 is effectively reduced. Therefore, after the metal resonate structure layer 238 acquires the energy transferred by photons emitted by the active layer 208, the generated local electromagnetic field can further effectively excite the active layer 208, making the active layer 208 emit more light. Accordingly, the coupling effect between the resonant metal layer 238 and the active layer 208 can be significantly enhanced, thereby further enhancing the light emitting efficiency of the LED structure 200a.
In an embodiment, as shown in
Similarly, when the LED structure 200a is applied to a wire bonding packaging structure, the conductive layer 216 is a transparent conductive layer. At this time, the material of the transparent conductive layer 216 is, for example, indium tin oxide, zinc oxide, gallium zinc oxide, aluminum zinc oxide or indium oxide. Also, the same material or different materials can be selected for the conductive layers 212 and 216. In a preferred embodiment, the refractive indexes of the insulating layers 236 and 240 of the SP structure 220a are greater than the refractive index of the conductive layer 216, so as to prevent total internal reflection of the light emitted from the active layer 208 inside the LED structure 200a.
In another aspect, when the LED structure 200a is applied to a flip chip packaging structure, the conductive layer 216 and the conductive layer 212 are both ohmic reflection layers. At this time, the material of the conductive layer 212 is, for example, silver (Ag), or silver/nickel/titanium/platinum (Ag/Ni/Ti/Pt). When the conductive layer 216 is also an ohmic reflection layer, a barrier layer covers the conductive layer 212 and the conductive layer 216. Preferably, the barrier layer completely covers the conductive layer 212 and conductive layer 216 serving as ohmic reflection layers, so as to prevent the oxidation of the conductive layer 212 and the conductive layer 216. In another embodiment, the conductive layer 216 is a barrier layer. At this time, the material of the conductive layer 216 is, for example, gold/tungsten (Au/W), nickel/platinum/gold/platinum/gold (Ni/Pt/Au/Pt/Au) or titanium tungsten alloy/platinum/titanium tungsten alloy/platinum (TiW/Pt/TiW/Pt). Also, the conductive layer 216 serving as the barrier layer preferably completely covers the conductive layer 212 serving as the ohmic reflection layer, so as to prevent the oxidation of the conductive layer 212.
Referring to
In this embodiment, as shown in
In certain embodiments, the SP structure can also be a structure having other shapes, for example, a dot-shaped structure.
As shown in
Referring to
The LED structure 200a shown in
Then, a conductive layer 212 is formed on the second electrical type semiconductor layer 210 of the epitaxial structure through, for example, an evaporation or sputtering technique, so as to complete the manufacturing of all material layers of the light-emitting structure 214. After that, as shown in
By controlling the etching process, the depth of the groove 218a in the light-emitting structure 214 is controlled. In one embodiment, as shown in
Next, as shown in
The material of the insulating layers 236a and 240a is, for example, titanium dioxide, aluminum oxide, silicon dioxide or silicon nitride. In an embodiment, the refractive index of the insulating layer 236a is greater than the refractive index of the insulating layer 240a, so as to prevent total internal reflection of the light emitted from the active layer 208 inside the light-emitting structure 214. The material of the resonant metal layer 238a includes, for example, silver, gold, aluminum, titanium or a random combination of the metals.
Next, the conductive layer 212 is taken as an etching stop layer or a polishing stop layer. A part of the insulating layers 236a and 240a above the conductive layer 212, as well as a part of the resonant metal layer 238a are removed through, for example, etching or chemical-mechanical polishing (CMP). By keeping the insulating layers 236 and 240, as well as the resonant metal layer 238 inside the groove 218a, an SP structure 220a sequentially stacked by the insulating layer 236, the resonant metal layer 238, and the insulating layer 240 is formed inside the groove 218a in the conductive layer 212 and the second electrical type semiconductor layer 210, as shown in
The width 246 of the bottom surface 244 of the SP structure 220a is, for example, from 10 nm to 5 μm, so as to prevent the SP structure 220a from affecting the even distribution of current in the second electrical type semiconductor layer 210. By designing the range of the width 246 of the bottom surface 244 of the SP structure 220a, the lateral current in the second electrical type semiconductor layer 210 is evenly distributed into the entire second electrical type semiconductor layer 210, so as to prevent uneven current distribution. In a preferred embodiment, the width 246 of the bottom surface 244 of the SP structure 220a is, for example, 0.5 μm to 2 μm.
Next, selectively, another conductive layer 216 is formed covering the conductive layer 212 and the SP structure 220a through, for example, an evaporation or sputtering technique, so as to enhance the evenness of current distribution. When the LED structure 200a is applied to a wire bonding packaging structure, the conductive layers 212 and 216 can be transparent conductive layers. At this time, the material of the conductive layers 212 and 216 is, for example, indium tin oxide, zinc oxide, gallium zinc oxide, aluminum zinc oxide or indium oxide. Further, the same material or different materials can be selected for the conductive layers 212 and 216. In a preferred embodiment, the refractive indexes of the insulating layers 236 and 240 of the SP structure 220a are greater than the refractive index of the conductive layer 216, so as to prevent total internal reflection of the light emitted from the active layer 208 inside the LED structure 200a.
Alternatively, when the LED structure 200a is applied to a flip chip packaging structure, the conductive layer 212 is an ohmic reflection layer, while the conductive layer 216 is a barrier layer. At this time, the material of the conductive layer 212 is silver, or silver/nickel/titanium/platinum; and the material of the conductive layer 216 is gold/tungsten, nickel/platinum/gold/platinum/gold or titanium tungsten alloy/platinum/titanium tungsten alloy/platinum. The conductive layer 216 preferably completely covers the conductive layer 212, so as to prevent the oxidation of the conductive layer 212. In another embodiment, both the conductive layer 212 and the conductive layer 216 are ohmic reflection layers, and then another barrier layer (not shown) completely covers the conductive layer 212 and the conductive layer 216, so as to prevent the oxidation of the conductive layer 212 and the conductive layer 216.
Next, the mesa structure 256 of the LED structure 200a is defined through, for example, a lithography and etching technique. When the mesa structure 256 is defined, a part of the conductive layer 216 and a part of the light-emitting structure 214 are removed till the surface of a portion 260 of the first electrical type semiconductor layer 206 below is exposed, so as to form the mesa structure 256, as shown in
Subsequently, referring to
As shown in
In certain embodiments, when the LED structure 200a is applied to a wire bonding packaging structure, the electrode pads 222 and 224 are, for example, electrically connected to two electrodes of an external power supply directly through leads (not shown), respectively. Alternatively, when the LED structure 200a is applied to a flip chip packaging structure, the completed LED structure 200a can be inverted, and the inverted LED structure 200a is connected to another packaging substrate or a circuit substrate (not shown) through, for example, bonding pads.
In the LED structure 200a, the SP structures 220a are substantially evenly arranged between the finger-shaped electrode 230 of the first electrode 232 and the finger-shaped electrode 226 of the second electrode 228. As shown in
As can be seen through the embodiments, one advantage of the present invention, among other things, is that an SP structure is concavely disposed in a light-emitting structure, the distance between a resonant metal layer of the SP structure and an active layer can be effectively reduced, and the coupling efficiency of the resonant metal layer and the active layer is enhanced, so that the internal quantum efficiency of the LED structure is enhanced.
As can be seen through the embodiments, another advantage of the present invention, among other things, is that total internal reflection inside the LED structure is reduced by adjusting the selection of the insulating material in the SP structure, so that the external quantum efficiency of the LED structure is enhanced.
The foregoing description of the exemplary embodiments of the invention has been presented only for the purposes of illustration and description and is not intended to be exhaustive or to limit the invention to the precise forms disclosed. Many modifications and variations are possible in light of the above teaching.
The embodiments are chosen and described in order to explain the principles of the invention and their practical application so as to activate others skilled in the art to utilize the invention and various embodiments and with various modifications as are suited to the particular use contemplated. Alternative embodiments will become apparent to those skilled in the art to which the present invention pertains without departing from its spirit and scope. Accordingly, the scope of the present invention is defined by the appended claims rather than the foregoing description and the exemplary embodiments described therein.
| Number | Date | Country | Kind |
|---|---|---|---|
| 101116363 | May 2012 | TW | national |
This non-provisional application claims priority under 35 U.S.C. §119(a) on Patent Application No. 101116363 filed in Taiwan, R.O.C. on May 8, 2012, the entire contents of which are hereby incorporated by reference. Some references, if any, which may include patents, patent applications and various publications, may be cited and discussed in the description of this invention. The citation and/or discussion of such references, if any, is provided merely to clarify the description of the present invention and is not an admission that any such reference is “prior art” to the invention described herein. All references listed, cited and/or discussed in this specification are incorporated herein by reference in their entireties and to the same extent as if each reference was individually incorporated by reference.
