(a) Field of the Invention
The present invention relates to a light emitting display and a driving method thereof. More specifically, the present invention relates to an organic EL (electroluminescent) display.
(b) Description of the Related Art
In general, an organic EL display electrically excites a phosphorous organic compound to emit light, and it voltage- or current-drives N×M organic emitting cells to display images. As shown in
Methods for driving the organic emitting cells include a passive matrix method, and an active matrix method using TFTs (thin film transistors) or MOSFETs. In the passive matrix method, cathodes and anodes that cross over each other are formed and used to selectively drive lines. In the active matrix method, a TFT and a capacitor are connected with each ITO (indium tin oxide) pixel electrode to thereby maintain a predetermined voltage according to capacitance. The active matrix method is classified as either a voltage programming method or a current programming method based on signal forms supplied to maintain the voltage at the capacitor.
A transistor Ma coupled between the power supply voltage VDD and an OLED controls the current flowing to the OLED. A transistor Mb transmits a data line voltage to a gate of the transistor Ma in response to a select signal applied from a scan line Sn. A capacitor Cst coupled between a source and the gate of the transistor Ma is charged with the data voltage and maintains the charged state for a predetermined time.
In detail, when the transistor Mb is turned on in response to a select signal applied to the gate of the switching transistor Mb, a data voltage from the data line Dm is applied to the gate of the transistor Ma. Accordingly, the current IOLED corresponding to a voltage VGS charged by the capacitor Cst between the gate and the source of the transistor Ma flows through the transistor Ma, and the OLED emits light corresponding to the current IOLED.
By way of example, the current that flows to the OLED is given in Equation 1.
where IOLED is the current flowing to the OLED, VGS is a voltage between the source and the gate of the transistor Ma, VTH is a threshold voltage at the transistor Ma, β is a constant, and VDD is a power supply voltage for a pixel.
As given in Equation 1, the current corresponding to the applied data voltage is supplied to the OLED, and the OLED gives light corresponding to the supplied current, according to the pixel circuit of
However, when a voltage drop (IR-drop) is generated on a line for supplying the power supply voltage VDD, and the power supply voltage VDD applied to a plurality of pixel circuits is not uniform, a desired amount of current may not flow to the OLED, thereby degrading image qualities, since the current flowing to the OLED is influenced by the power supply voltage VDD in the conventional pixel circuit based on the voltage programming method. As the area of the organic EL display becomes larger, and the brightness increases, the voltage drop on the line for supplying the power supply voltage VDD increases to generate further problems.
In exemplary embodiments of the present invention, a current that flows to the OLED of a pixel circuit in a light emitting display is substantially prevented from being influenced by a power supply voltage.
Further, a current that flows to the OLED of a pixel circuit in a light emitting display may be substantially prevented from being influenced by deviations of a threshold voltage of a driving transistor.
In exemplary embodiments of the present invention, a light emitting display suitable for application as a large screen and high brightness display is provided.
In an exemplary embodiment of the present invention, a light emitting display includes a plurality of data lines for transmitting data voltages corresponding to video signals, a plurality of scan lines for transmitting select signals, and a plurality of pixel circuits. Each said pixel circuit is coupled to a corresponding said data line to receive a corresponding said data voltage and a corresponding said scan line to receive a corresponding said select signal. Each said pixel circuit includes a transistor including a first electrode, a second electrode for receiving a first power supply voltage, and a third electrode for outputting a current corresponding to a voltage between the first electrode and the second electrode. A light emitting element coupled to the third electrode emits light corresponding to the current outputted by the third electrode. A first switch transmits the corresponding said data voltage in response to the corresponding said select signal from the corresponding said scan line. A voltage compensator receives the corresponding said data voltage transmitted by the first switch and a second power supply voltage, and applies a compensated data voltage based on the corresponding said data voltage, the first power supply voltage and the second power supply voltage to the first electrode of the transistor.
In another exemplary embodiment of the present invention, a light emitting display includes a plurality of data lines for transmitting data voltages corresponding to video signals, a plurality of scan lines for selecting select signals, and a plurality of pixel circuits. Each said pixel circuit is coupled to a corresponding said data line to receive a corresponding said data voltage and a corresponding said scan line to receive a corresponding said select signal. Each said pixel circuit includes a transistor including a first electrode, a second electrode for receiving a first power supply voltage, and a third electrode for outputting a current corresponding to a voltage between the first electrode and the second electrode. A light emitting element coupled to the third electrode emits light corresponding to the current outputted by the third electrode. A first capacitor is coupled between the first and second electrodes of the transistor. A first switch transmits the corresponding said data voltage in response to the corresponding said select signal from the corresponding said scan line. A voltage compensator receives the corresponding said data voltage transmitted by the first switch and applies a compensated data voltage based on the corresponding said data voltage and the first power supply voltage to the first electrode of the transistor.
In still another exemplary embodiment of the present invention, a method for driving a display panel including a matrix of pixel circuits is provided. Each said pixel circuit includes a transistor including a first electrode, a second electrode for receiving a first power supply voltage, and a third electrode for outputting a current corresponding to a voltage between the first electrode and the second electrode. A light emitting element coupled to the third electrode emits light corresponding to the current outputted by the third electrode. A capacitor has a first electrode coupled to the first electrode of the transistor, and a switch is coupled between a second electrode of the capacitor and a scan line. The first power supply voltage is applied to the first electrode of the capacitor, and a data voltage is applied to the second electrode of the capacitor through the switch. The first electrode of the capacitor is substantially electrically isolated from the first power supply voltage, and a second power supply voltage is applied to the second electrode of the capacitor.
In still yet another exemplary embodiment of the present invention, a method for driving a display panel including a matrix of pixel circuits is provided. Each said pixel circuit includes a first transistor including a first electrode, a second electrode for receiving a first power supply voltage, and a third electrode for outputting a current corresponding to a voltage between the first electrode and the second electrode. A light emitting element coupled to the third electrode emits light corresponding to the current outputted by the third electrode. A capacitor has a first electrode coupled to the first electrode of the first transistor. A second transistor has a first electrode coupled to a second electrode of the capacitor, a second electrode, and a third electrode, and is diode-connected. A switch is coupled between the second electrode of the second transistor and a scan line. The first power supply voltage is applied to the first electrode of the capacitor, and a data voltage is applied to the second electrode of the second transistor through the switch. A second power supply voltage is applied to the second electrode of the capacitor.
In still yet another exemplary embodiment of the present invention, a method for driving a display panel including a matrix of pixel circuits is provided. Each said pixel circuit includes a transistor including a first electrode, a second electrode for receiving a first power supply voltage, and a third electrode for outputting a current corresponding to a voltage between the first electrode and the second electrode. A light emitting element coupled to the third electrode emits light corresponding to the current outputted by the third electrode. A capacitor has a first electrode coupled to the first electrode of the transistor. A switch is coupled between a second electrode of the capacitor and a scan line. The transistor is diode-connected, and a data voltage is applied to the second electrode of the capacitor. A second power supply voltage is applied to the second electrode of the capacitor.
The accompanying drawings, together with the specification, illustrate exemplary embodiments of the present invention, and, together with the description, serve to explain the principles of the present invention:
In the following detailed description, only certain exemplary embodiments of the present invention are shown and described, by way of illustration. As those skilled in the art would recognize, the described exemplary embodiments may be modified in various different ways, all without departing from the spirit or the scope of the invention. Accordingly, the drawings and description are to be regarded as illustrative in nature, and not restrictive.
As shown, the organic EL display includes an organic EL display panel 100, a scan driver 200, and a data driver 300.
The organic EL display panel 100 includes a plurality of data lines D1 through Dm, each extending in a column direction, a plurality of scan lines S1 through Sn, each extending in a row direction, and a plurality of pixel circuits 10. The data lines D1 through Dm transmit data voltages that correspond to video signals to the pixel circuits 10, and the scan lines S1 through Sn transmit select signals for selecting the pixel circuits 10. Each pixel circuit 10 is formed at a pixel region defined by two adjacent data lines D1 through Dm, and two adjacent scan lines S1 through Sn.
The scan driver 200 sequentially applies select signals to the scan lines S1 through Sn, and the data driver 300 applies the data voltage that corresponds to video signals to the data lines D1 through Dm.
The scan driver 200 and/or the data driver 300 may be coupled to the display panel 100, or may be installed, in a chip format, in a TCP (tape carrier package) coupled to the display panel 100. The same can be attached to the display panel 100, and installed, in a chip format, on an FPC (flexible printed circuit) or a film coupled to the display panel 100, which is referred to as a CoF (chip on flexible board, or chip on film) method. In other embodiments, the scan driver 200 and/or the data driver 300 may be installed on a glass substrate of the display panel. Further, the same can be substituted for the driving circuit formed in the same layers as the scan lines, the data lines, and TFTs on the glass substrate, or directly installed on the glass substrate.
Referring to
As shown, the pixel circuit according to the first exemplary embodiment of the present invention includes an organic EL element (OLED), transistors M1 and M2, and a voltage compensator 11. In the described embodiment, the transistors M1 and M2 are P-type transistors having a P-type channel.
The transistor M1 is a driving transistor for controlling the current that flows to the OLED, and it has a source coupled to the power supply voltage VDD, and a drain coupled to an anode of the OLED. A cathode of the OLED is coupled to a reference voltage VSS and emits light that corresponds to the current applied from the transistor M1. The reference voltage VSS is a voltage lower than the power supply voltage VDD. By way of example, the ground voltage can be used as the reference voltage VSS.
The transistor M2 transmits a data voltage applied to the data line Dm to the voltage compensator 11 in response to a select signal from the scan line Sn.
The voltage compensator 11 is coupled between a gate of the transistor M1 and a drain of the transistor M2, receives the data voltage transmitted by the transistor M2 and applies a compensated data voltage based on the data voltage and the power supply voltage VDD to the gate of the transistor M1.
As shown, the voltage compensator 11 includes transistors M3 and M4, and a capacitor Cst1. It can be seen in
A first electrode A of the capacitor Cst1 is coupled to the gate of the transistor M1, and a second electrode B thereof is coupled to the drain of the transistor M2.
The transistor M3 is coupled between the power supply voltage VDD and the first electrode A of the capacitor Cst1, and applies the power supply voltage VDD to the first electrode A of the capacitor Cst1 in response to the select signal from the scan line Sn.
The transistor M4 is coupled between a compensation voltage Vsus and the second electrode B of the capacitor Cst1, and applies the compensation voltage Vsus to the second electrode B of the capacitor Cst1 in response to the select signal of the scan line Sn.
The select signal from the scan line Sn is applied to the gates of the transistors M3 and M4 in
Operation of the pixel circuit according to the first exemplary embodiment will be described with reference to
When the select signal from the scan line Sn becomes low level, the transistor M2 is turned on and the data voltage is applied to the second electrode B of the capacitor Cst1. Further, the transistor M3 is turned on and the power supply voltage VDD is applied to the first electrode A of the capacitor Cst1. Here, no current flows to the OLED since the power supply voltage VDD is applied to the gate and the source of the transistor M1. With the low level select signal from the present scan line Sn, the transistor M4 is turned off, thereby substantially electrically isolating the compensation voltage Vsus from the second electrode B of the capacitor Cst1.
When the select signal from the scan line Sn becomes high level, the transistor M4 is turned on and the compensation voltage Vsus is applied to the second electrode B of the capacitor Cst1.
Therefore, the voltage applied to the second electrode B of the capacitor Cst1 is changed to the compensation voltage Vsus from the data voltage. In this instance, the charges charged in the capacitor Cst1 is substantially constantly maintained since no current path is formed in the pixel circuit. That is, the voltage VAB between the electrodes of the capacitor Cst1 is to be maintained substantially constantly, and the voltage at the first electrode A of the capacitor Cst is varied by a voltage variation ΔVB of the second electrode B thereof. A voltage VA of the first electrode A of the capacitor Cst1 is given in Equation 2.
VA=VDD+ΔVB Equation 2
where ΔVB is a voltage variation of the second electrode B of the capacitor Cst1 and is given in Equation 3.
ΔVB=Vsus−VDATA Equation 3
In this instance, the current flows to the OLED through the transistor M1, and the current is given as Equation 4.
where VGS1 is a voltage between the gate and the source of the transistor M1, and VTH1 is a threshold voltage of the transistor M1.
As can be seen from Equation 4, the current flowing to the OLED is substantially not influenced by the power supply voltage VDD. Also, substantially no voltage drop is generated since the compensation voltage Vsus forms no current path, differing from the power supply voltage VDD. Hence, the substantially the same compensation voltage Vsus is applied to all the pixel circuits, and the current that corresponds to the data voltage flows to the OLED.
Also, since the transistor M1 has a P-type channel, the voltage VGS between the gate and the source of the transistor M1 is to be less than the threshold voltage VTH1 in order to turn on the transistor M1. Therefore, the voltage obtained by subtracting the data voltage VDATA from the compensation voltage Vsus is to be less than the threshold voltage of the transistor M1.
While the select signal from the scan line Sn is applied to the gates of both the transistors M3 and M4 in
Referring to
In the pixel circuit of
The drain of the transistor M12 is coupled to a source of the diode-connected compensation transistor M15. The transistor M16 is coupled between a drain of the diode-connected compensation transistor M15 and the pre-charge voltage Vpre. A previous scan line Sn-1 is coupled to a gate of the transistor M16.
An operation of the pixel circuit according to the second exemplary embodiment of the present invention will be described with reference to
When a select signal from the previous scan line Sn-1 becomes low level during the pre-charge period t1, the transistor M16 is turned on, and the pre-charge voltage Vpre is transmitted to the drain of the transistor M15. In this instance, it is desirable for the pre-charge voltage Vpre to be a little less than the voltage applied to the gate of the transistor M15, that is, the lowest data voltage applied through the data line Dm, so that the pre-charge voltage Vpre may reach the maximum gray level. Accordingly, when the data voltage is applied through the data line Dm, the data voltage becomes greater than the voltage applied to the gate of the transistor M15, and the transistor M15 is coupled forward.
Next, the select signal from the present scan line Sn becomes low level and the transistor M12 is turned on during the data charging period t2, and hence, the data voltage is applied to the source of the transistor M15 through the transistor M12. In this instance, since the transistor M15 is diode-connected, a voltage that corresponds to a difference between the data voltage and a threshold voltage VTH15 of the transistor M15 is applied to the second electrode B2 of the capacitor Cst2. Further, the transistor M13 is turned on and the power supply voltage VDD is applied to the first electrode A2 of the capacitor Cst2.
No current flows to the OLED since the voltage applied to the source and the gate of the transistor M11 corresponds to the power supply voltage VDD during the data charging period t2.
With the low level select signal from the present scan line Sn, the transistor M14 is turned off, thereby substantially electrically isolating the compensation voltage Vsus from the second electrode B2 of the capacitor Cst2. The select signal from the present scan line Sn becomes high level and the transistor M14 is turned on during the light emitting period t3. The compensation voltage Vsus is applied to the second electrode B2 of the capacitor Cst2 through the transistor M14, and the voltage of the second electrode B2 of the capacitor Cst2 is changed to the compensation voltage Vsus. In this instance, since the voltage VAB2 between the electrodes of the capacitor Cst2 is to be substantially constantly maintained, the voltage of the first electrode A2 of the capacitor Cst2 is varied by the voltage variation of the second electrode B2. The voltage VA2 is given in Equation 5 below.
VA2=VDD+ΔVB2=VDD+(Vsus−(VDATA−VTH15))=VDD+Vsus−VDATA+VTH15 Equation 5
where ΔVB2 is a voltage variation of the second electrode B2 of the capacitor Cst2.
In this instance, the driving transistor M11 is turned on, and the current flows to the OLED. The current flowing to the OLED is given as Equation 6.
When the threshold voltage of the transistor M11 substantially corresponds to that of the transistor M15, the current flowing to the OLED is given as Equation 7.
Therefore, the current that corresponds to the data voltage applied to the data line Dm flows to the OLED irrespective of the power supply voltage VDD and the threshold voltage VTH11 of the transistor M11.
Also, since the compensation voltage Vsus forms no current path, a substantially uniform compensation voltage Vsus is applied to all the pixel circuits, thereby enabling more fine gray representation.
As shown in
Further, while the select signal from the scan line Sn is applied to the gates of both the transistors M13 and M14 in
In the pixel circuit of
An operation of the pixel circuit according to the third exemplary embodiment will now be described with reference to
VA3=VDD+VTH21 Equation 8
With the low level select signal from the scan line Sn, the transistor M24 is turned off, thereby substantially electrically isolating the compensation voltage Vsus from the second electrode B3 of the capacitor Cst3. Further, the transistor M25 is turned off, thereby substantially electrically isolating the drain of the transistor M21 from the OLED.
When the select signal from the scan line Sn becomes high level, the transistor M24 is turned on to apply the compensation voltage Vsus to the second electrode B3 of the capacitor Cst3. In this instance, since no current path is formed in the pixel circuit, the voltage of both electrodes of the capacitor Cst3 is to be substantially constantly maintained. Therefore, the voltage applied to the first electrode A3 of the capacitor Cst3 is varied by a voltage variation of the second electrode B3. Hence, the voltage at the first electrode A3 is given in Equation 9.
VA3=VDD+VTH21+ΔVB3 Equation 9
where ΔVB3 is a voltage variation of the second electrode B3 of the capacitor Cst3 and is obtained by subtracting the data voltage from the compensation voltage Vsus.
Further, the transistor M25 is turned on, the current of the transistor M21 is transmitted to the OLED, and the OLED emits light in response to the applied current. By way of example, the current IOLED flowing to the OLED is given as Equation 10.
Therefore, the current flowing to the OLED is substantially not influenced by a deviation between the power supply voltage VDD and the threshold voltage VTH21 of the driving transistor M21.
While the select signal from the scan line Sn is applied to the gates of the transistors M23, M24 and M25 in
In the pixel circuit of
An operation of the pixel circuit according to the fourth exemplary embodiment will now be described in reference to
When the select signal from the previous scan line Sn-1 becomes low level, the transistors M33 and M34 are turned on, the power supply voltage VDD is applied to the first electrode A4 of the capacitor Cst4, and the compensation voltage Vsus is applied to the second electrode B4 thereof.
Next, the select signal from the present scan line Sn becomes low level, and the transistor M32 is turned on. Therefore, the voltage of the second electrode B4 of the capacitor Cst4 is changed to the data voltage, and the voltage of the first electrode A4 of the capacitor Cst4 is changed by a voltage variation of the second electrode B4 of the capacitor Cst4. The voltage of the first electrode A4 of the capacitor Cst4 is given as Equation 11.
VA4=VDD+ΔVB4=VDD+VDATA−Vsus Equation 11
Therefore, the power supply voltage VDD and the voltage of the first electrode A4 of the capacitor Cst4 are applied to both electrodes of the capacitor C2, and the capacitor C2 is charged.
In this instance, the voltage charged in the capacitor C2 is given as Equation 12, and the corresponding current flows to the OLED.
VC2=VDD−(VDD+VDATAVsus)=VDATA−Vsus Equation 12
The current flowing to the OLED is given as Equation 13.
As can be seen from Equation 13, the current flowing to the OLED is substantially not influenced by the power supply voltage VDD.
As shown, a plurality of pixel circuits is coupled to a line for supplying the power supply voltage VDD. A voltage drop is generated in the display panel 100 because of a parasitic resistance component that exists in the line for supplying the power supply voltage VDD. According to the first exemplary embodiment of the present invention, the current flowing to the OLED is substantially not influenced by the voltage drop provided on the above-noted line.
A curve (a) shows a current curve of the conventional pixel circuit, and a curve (b) illustrates a current curve of the pixel circuit according to the first exemplary embodiment of the present invention.
As shown in
While the present invention has been described in connection with certain exemplary embodiments, it is to be understood that the present invention is not limited to the disclosed embodiments, but, on the contrary, is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims.
For example, the transistors M1 and M5 of
Also, the transistors M12, M13, M14, and M16 of
A light emitting display suitable for application as a large screen and high brightness display is provided by controlling the current that flows to the OLED to be substantially not influenced by the power supply voltage.
Further, the current flowing to the OLED is more finely controlled by compensating for a deviation of the power supply voltage and/or a deviation of the threshold voltage of the driving transistor.
In addition, the aperture ratio of the light emitting display is enhanced by compensating for a deviation of the power supply voltage and/or a deviation of the threshold voltage of the driving transistor with lesser number of scan lines.
Number | Date | Country | Kind |
---|---|---|---|
2003-0085067 | Nov 2003 | KR | national |
This application is a divisional of U.S. patent application Ser. No. 10/919,693, filed Aug. 16, 2004, which claims priority to and the benefit of Korean Patent Application No. 2003-0085067, filed Nov. 27, 2003, the entire content of both of which is incorporated herein by reference.
Number | Name | Date | Kind |
---|---|---|---|
5952789 | Stewart et al. | Sep 1999 | A |
6229506 | Dawson et al. | May 2001 | B1 |
6373454 | Knapp et al. | Apr 2002 | B1 |
6384804 | Dodabalapur et al. | May 2002 | B1 |
6433488 | Bu | Aug 2002 | B1 |
6577302 | Hunter et al. | Jun 2003 | B2 |
6847171 | Tam | Jan 2005 | B2 |
6858992 | Park et al. | Feb 2005 | B2 |
6970149 | Chung et al. | Nov 2005 | B2 |
7061451 | Kimura | Jun 2006 | B2 |
20020021293 | Tam | Feb 2002 | A1 |
20020089357 | Pae et al. | Jul 2002 | A1 |
20030011584 | Azami et al. | Jan 2003 | A1 |
20030016190 | Kondo | Jan 2003 | A1 |
20030020705 | Kondo et al. | Jan 2003 | A1 |
20030067424 | Akimoto et al. | Apr 2003 | A1 |
20030090446 | Tagawa et al. | May 2003 | A1 |
20030107536 | Ishizuka et al. | Jun 2003 | A1 |
20030112208 | Okabe et al. | Jun 2003 | A1 |
20030117352 | Kimura | Jun 2003 | A1 |
20030179164 | Shin et al. | Sep 2003 | A1 |
20030231152 | Shin | Dec 2003 | A1 |
20040026723 | Miyazawa | Feb 2004 | A1 |
20040041750 | Abe | Mar 2004 | A1 |
20040046164 | Kobayashi et al. | Mar 2004 | A1 |
20040051685 | Chung et al. | Mar 2004 | A1 |
20040070557 | Asano et al. | Apr 2004 | A1 |
20040090434 | Miyazawa | May 2004 | A1 |
20040095168 | Miyazawa | May 2004 | A1 |
20040095298 | Miyazawa | May 2004 | A1 |
20040095338 | Miyazawa | May 2004 | A1 |
20040174354 | Ono et al. | Sep 2004 | A1 |
20040222954 | Lueder | Nov 2004 | A1 |
Number | Date | Country |
---|---|---|
1361510 | Jul 2002 | CN |
10220 191 | Jul 2002 | EP |
10220 191 | Sep 2003 | EP |
1 632 930 | Mar 2006 | EP |
2002-215096 | Jul 2002 | JP |
2003-122301 | Apr 2003 | JP |
2003-173165 | Jun 2003 | JP |
2003-186438 | Jul 2003 | JP |
2003-195809 | Jul 2003 | JP |
2003-223138 | Aug 2003 | JP |
2004-133240 | Apr 2004 | JP |
2004-286816 | Oct 2004 | JP |
2005-157308 | Jun 2005 | JP |
10-0370286 | Jul 2002 | KR |
Entry |
---|
Korean Patent Abstract, Publication No. 100370286, Published Jul. 7, 2002, in the name of O. Gyeong Kwon. |
Patent Abstract of Japan, Publication No. 2003173165, Published Jun. 20, 2003, in the name of Aoki Yoshiaki. |
European Search Report of EP 04 090 383.3, dated Nov. 30, 2005, corresponding to U.S. Appl. No. 10/963,389. |
European Search Report of EP 04 090 384.1, dated Dec. 14, 2005, corresponding to U.S. Appl. No. 10/919,693. |
Choi, S., et al., An Improved Voltage Programmed Pixel Structure for Large Size and High Resolution AM-OLED Displays, SID 04 Digest, 2004, pp. 260-263, XP-001222795. |
Japanese Office action dated Jun. 16, 2009, for corresponding Japanese application 2004-051968, noting listed reference in this IDS, as well as JP 2003-173165 previously filed in an IDS dated Feb. 27, 2006 and JP 2005-157308 published subsequent to the filing of U.S. Appl. No. 10/919,693. |
Patent Abstracts of Japan, Publication No. 2003-186438, dated Jul. 4, 2003, in the name of Yoshiaki Mikami et al. |
Patent Abstracts of Japan, Publication No. 2003-122301, dated Apr. 25, 2003, in the name of Hajime Akimoto et al. |
Patent Abstracts of Japan, Publication No. 2003-195809, dated Jul. 9, 2003, in the name of Tomoyuki Maeda. |
Patent Abstracts of Japan, Publication No. 2003-223138, dated Aug. 8, 2003, in the name of Hajime Kimura. |
Patent Abstracts of Japan, Publication No. 2004-133240, dated Apr. 30, 2004, in the name of Shin Asano et al. |
Patent Abstracts of Japan, Publication No. 2004-286816, dated Oct. 14, 2004, in the name of Yoshiaki Aoki. |
Number | Date | Country | |
---|---|---|---|
20110210990 A1 | Sep 2011 | US |
Number | Date | Country | |
---|---|---|---|
Parent | 10919693 | Aug 2004 | US |
Child | 13103000 | US |