Patent Application
20070046620
1. Technical Field
The present invention relates to light transmission devices for light transmitting an image signal, generated at an image signal generating component to an output device, based on a control signal for controlling the image signal, and in particular to a light transmission device for connecting equipment or control boards by means of light transmission.
2. Related Art
Conventionally, when transmitting a graphic signal generated in a graphic signal (image signal) generating device to an output device such as a display device, the graphic signal is parallel to serial converted and transmitted in the form of an electric signal using an electric cable in the form of five channels in total, that is, three channels which are RED (hereinafter referred to as “R”), GREEN (hereinafter referred to as “G”) and BLUE (hereinafter referred to as “B”), one channel which is for a horizontal synchronization signal, a vertical synchronization signal, a data enable (valid) signal, and one channel for a frame clock signal.
The data is 6 bits/color, and the bit signal of each channel is converted to 7 bits/color by the graphic signal generating device 100. Hsync represents the horizontal synchronization signal and Vsync represents the vertical synchronization signal.
DE (Data Enable) is a data enable signal, and enabled data means the data synchronized during the assert period.
Parallel to serial conversion is performed in the graphic signal transmitting component 102, and serial to parallel conversion is performed in the graphic signal receiving component 104. Normally, copper cable 108 is used between the graphic signal transmitting component 102 and the graphic signal receiving component 104 for the transmission between substrates. Although it depends on the transmitting distance, in many cases, two copper cables (electric wires) are required for one channel in order to undertake transmission by the difference signal, and the cables are generally twisted.
Further, strengthening of the ground earth is undertaken in order to adjust the characteristic impedance and to suppress radiation noise. This is one of the reasons the structure of the cable itself becomes complicated in transmissions using copper cable.
The clock adopts a method (source synchronous method) of transmitting the clock to which the data is serialized as a frame clock parallel to the data (in which the graphic signal is serialized). Normally, transmission is often performed at a frequency that synchronizes the parallel data. This is because the frequency at the time of serialization is too fast to transmit at.
According to an aspect of the present invention, a light transmission device transmits an image signal on light to an output device, based on a control signal for controlling the image signal. The light transmission device includes: a transmitting interface component that converts the image signal to a light signal and transmits the light signal; a receiving interface component that converts the light signal transmitted from the transmitting interface component to an image signal and transmits the image signal to the output device; and a light transmitting medium that connects the transmitting interface component and the receiving interface component. In the light transmission device, the transmitting interface component includes a combining component, and the combining component classifies the image signal for each of plural bit data channels according to a predetermined condition, inserts the control signal into the remaining bits of the bit data channels and then performs modulation.
Exemplary embodiments of the present invention will be described in detail based on the following figures, wherein:
A bus bridge 16 is arranged in the main device 12. The bus bridge 16 is controlled by a master CPU 18 and performs signal transmission and reception with the outside via a PCI BUS 20.
An image data managing section 22 for managing the image data (graphic signal) is arranged in the main device 12. The image data managing section 22 includes a PCI/IF 24 that is in connection with the PCI BUS 20.
The PCI/IF 24 retrieves the image data with the control of the master CPU 18 and stores it in the VGA&VRAM 26. The data stored in the VGA&VRAM 26 is the graphic signal.
The VGA&VRAM 26 is configured including a graphic signal generating device 28 (refer to
The transmitting interface section 30 is connected to the receiving interface section 32 of the user interface 14 by way of the optical fiber 34 acting as the light transmitting medium.
In the receiving interface section 32, the image is displayed on the LCD 36 serving as the output device (display device) based on the light signal transmitted from the transmitting interface section 30.
The light transmission device 10 (refer to
The LCD 36 is display controlled by the CPU 42 and is synchronized with a touch panel 44 and a ten key 46. By performing touch operation or ten key operation while looking at the screen displayed on the LCD 36, the signal corresponding to the relevant operation is sent from the CPU 42 to the UART device 48 on the main device 12 side (the transmission and reception signal are conventional electric signals (LVDS)). The operation signal is then analyzed in the master CPU 18 and the execution is instructed.
The light transmission device 10 includes, as the transmission side of the overall schematic configuration, the graphic signal generating device 28 and the transmitting interface section 30. It further includes the receiving interface section 32 and the display device (LCD) 36, for the reception side.
The three channels of graphic signal and one channel of control signal are generated in the graphic signal generating device 28.
The graphic signal (6 bits/color) and the control signal (3 bits) are sent from the graphic signal generating device 28 to the transmitting interface section 30.
In a bit combining part 50 of the transmitting interface section 30, the 3 bits of control signal is allocated to each channel of the graphic signal, and 1 dummy bit is combined with the relevant graphic signal. For instance, RED is 6 bits+Hsync 1 bit+dummy bit=8 bits. The 8 bits of data is sent to the 8B10B coding part 52.
The 8B10B modulating (coding) part 52 is a well known modulation coding component that performs modulation coding to maintain the DC balance of the bit data (refer to
The data modulation coded to 10 bits is converted to serial data by the parallel to serial (P/S) converting part 54, and is then sent to the optical connector transmitting part 56, so that the serial data is electrical-light converted.
The serial data is generated in serial conversion at a clock speed made 10 times that of the clock synchronized with the parallel data in the PLL (Phase Locked Loop) 58.
The optical connector transmitting part 56 includes an LED serving as a light source and is connected with one end of the optical fiber 34 serving as the light transmitting medium for transmitting the emitted light of the LED to the receiving interface section 32.
The modulation coding will now be briefly explained.
Transmission coding that includes a direct current component is not suitable for properly reproducing a signal so as to cover cases when the attenuation amount of the signal in the transmission line changes greatly.
This is because the threshold value for determining “1” or “0” needs to be changed according to the attenuation amount of the received signal, and the number of changes required for timing reproduction (clock reproduction) on the reception side changes greatly, and the timing design becomes more difficult.
That is, if the data pattern in which the graphic signal is serialized is transmitted as it is, it may not be properly reproduced on the reception side since the direct current component changes.
Thus, conversion to a code (code in which the proportion for generation of 1 and 0 is the same) having direct current (DC) balance which does not depend on the data and the pattern is thus required.
The 8B10B coding technique generally used in essential communication is widely used for such technique. The 8B10B modulation coding is applied in this exemplary embodiment.
The light signal electric-light converted in the optical connector transmitting part 56 is transmitted to the optical connector receiving part 60 of the receiving interface section 32 via the optical fiber 34.
In the optical connector receiving part 60, the light signal is converted to an electric signal (light-electric conversion). The serial to parallel (S/P) converting part 62 is connected in the optical connector receiving part 60, and the electric signal is converted to parallel data in the serial to parallel (S/P) converting part 62.
The serial to parallel (S/P) converting part 62 is connected to the 8B10B demodulating (decoding) part 64, and the 10 bit signals are decoded to 8 bit signals. A bit allocating part 66 is arranged at the final stage of the receiving interface section 32, wherein the combined bit data (8 bits×three channels of parallel data (24 bits)) is allocated to the graphic signal (6 bits×3 colors) and the control signal (3 bits).
Each allocated data (graphic signal and control signal) is sent to the display device (LCD) 36.
The operation of the exemplary embodiment will now be explained.
Three channels of graphic signal and one channel of control signal are generated in the graphic signal generating device 28. The graphic signal is 6 bits/color and the control signal is 3 bits.
The above bit data is sent to the bit combining part 50 of the transmitting interface section 30.
In the bit combining part 50, the three bits of control signal are allocated to each channel of the graphic signal, and further, 1 dummy bit is combined with the graphic signal. As a result, the bit data of each color becomes 8 bits.
The 8 bits of data is modulated to 10 bits of data in the 8B10B coding part 52, and as a result, the DC balance during transmission is maintained.
The data modulation coded to 10 bits is converted to serial data by the parallel to serial (P/S) converting part 54, and sent to the optical connector transmitting part 56, where the serial data is electric-light converted. Here, the serial data is generated at a clock speed made 10 times that of the clock synchronized with the parallel data in the PLL (Phase Locked Loop) 58.
In the optical connector transmitting part 56, the 10 bits of serial data (three colors) and the clock signal are electric-light converted and transmitted to the optical connector receiving part 60 of the receiving interface section 32 by the optical fiber 34 as a light signal.
In the optical connector receiving part 60, the light signal is converted to an electric signal (light-electric conversion), and then converted to parallel data in the serial to parallel (S/P) converting part 62.
The 10 bits of signal that is parallel converted is decoded to 8 bits of signal in the 8B10B demodulation (decoding) part 64, and allocated to the graphic signal (6 bits×3 colors) and the control signal (3 bits) in the bit allocating part 66.
Each allocated data (graphic signal and control signal) is sent to the display device 36.
In the exemplary embodiment explained above, the configuration in which the graphic signal is transmitted through light transmission using the optical fiber 34 is provided, and further, the remaining bits from the bit data expressing the color signal are utilized, the bit data corresponding to the control signal is combined, thereby reducing the transmission line and at the same time the DC balance is maintained by the 8B10B coding and decoding. Thus, good transmission quality at high speed is obtained and the radiation noise is reduced while suppressing the cost with a simple configuration.
An image that accurately represents the graphic signal generated in the graphic signal generating device 28 can be displayed on the display device 36.
(Applicability of Display Device 36)
The display device 36 can be used, for instance, with SVGA (Super Video Graphics Array), one of the standard modes normally used for the display screen of a personal computer and the like.
The SVGA systems include modes of 800×600 dots, 1024×768 dots, and 1280×1024 dots resolution.
The SVGA system is widely used in machine operation screens such as control panels used in copying machines, printers and the like. The buttons and pictures for machine operation are displayed on the screen display, but no practical problem arises with the resolution of 800×600 dots. If a finer display is desired, the resolution is further fine to increase the displayable colors.
Since in this case the circuit configuration becomes complicated, such as increasing the memory capacity, increasing data speed and the like, it becomes a question of determining the balance between the requirement specification and the manufacturing cost. With regards to the transmission speed of the graphic signal when the resolution is 800×600 dots, the graphic signal is generated in synchronized at about 40 MHz and transmitted with the refresh rate of the screen at 75 Hz. That is, the graphic signal is about 40 Mbps.
(Usability of LEDs)
The transmission speed of the serial signal output from the parallel to serial (P/S) converting part 54 at the transmitting interface section 30 in
A light source suitable to this transmission speed is necessary in the optical connector transmission part 56. Light sources generally used for light transmission include semiconductor lasers, an surface light emitting lasers and the like, but application is for high transmission speed bands of greater than a few Gbps. Thus, the manufacturing cost becomes expensive and the circuit configuration becomes complicated.
In the current technology, the performance of light emitting diodes (LEDs) has increased to about 500 Mbps, and the manufacturing cost is suppressed low when compared to semiconductor lasers since it is similar to the related art and the existing manufacturing facilities can be substantially used.
In other words, LEDs are suitable for transmitting at 400 Mbps. Since LEDs have a large angle of spread of the light source, the selection of POF (Plastic Optical Fiber) having a large core diameter is suitable for the transmitting medium. POF has a low manufacturing cost and is easy to handle.
(First Modification)
This differs from the above exemplary embodiment (refer to
(Second Modification)
The data inputs 6 bits/color and 3 bits of control signal to the transmitting interface section. Any 1 bit of the control signal and the dummy bit (1 bit) are combined with the 6 bits/color to become 8 bits in total. For instance, RED (6 bits)+Hsync (1 bit)+dummy bit (1 bit)=8 bits.
Similarly, GREEN (6 bits)+Vsync (1 bit)+dummy bit (1 bit) and BLUE (6 bits)+DE (1 bit)+dummy bit (1 bit).
Transmission coding that includes a direct current component is not suitable for properly reproducing a signal to cover cases when the attenuation amount of the signal in the transmission line changes greatly, as mentioned above. That is, the direct current component becomes high when the data is continuous at a fixed bit.
The 1 bit of the control signal inserted into the remaining bits changes with a constant period during operation. Hsync is a horizontal synchronous signal and thus changes once for every 800 pixels in a screen of 800×600 dots. Vsync is a vertical synchronous signal and thus changes once for every one screen (800×600=480000 pixels). DE (Data Enable) is a data enabling signal and thus changes once for every 800 pixels.
Therefore, the signal can be properly received with a circuit that can have DC balance on the reception side even if one signal changes occurs for a maximum length of 480000 pixels. As a result, the 8B10B modulating part 52 and the 8B10B demodulating part 64 shown in
In the above exemplary embodiment and first and second modifications thereof, a transmission line is provided for each color of RED, GREEN, and BLUE, but clearly can be applied to a different color space, such as, when transmitting in the color signal of YMCK and the like or L*a*b* and the like.
The present invention is not limited to the above-described exemplary embodiments, and obviously suitable modifications can be applied within a scope which does not depart from the spirit of the present invention.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2005-247840 | Aug 2005 | JP | national |
This application claims priority under 35USC 119 from Japanese Patent Application No. 2005-247840, the disclosure of which is incorporated by reference herein.
