The present invention relates generally to lighting control, and more particularly to a lighting control system suitable for a surgical lighting device.
Many drawbacks have been identified in existing lighting control systems that can result in less than desired performance of a lighting device. These drawbacks include, but are not limited to, voltage variations among LED lighting modules that result in non-uniform light output. These voltage variations may result from the lack of uniformity in the manufacture of the LEDs used in a lighting device. Another drawback of existing lighting control systems is the inability of the lighting circuitry to compensate for the effects of temperature changes on the LED forward voltages, such as changes required in the drive voltage caused by an increase in temperature. In this regard, existing lighting control systems do not compensate for inherent forward voltage changes as seen by an output driver over the entire operating temperature range of the lighting device. The foregoing drawbacks are particularly disadvantageous where the lighting device is a surgical lighthead that requires constant light output or lux readings.
The present invention addresses these and other drawbacks to provide an improved lighting control system for a lighting device.
In accordance with the present invention, there is provided a lighting control system for a lighting device, the system comprising: a primary controller; a plurality of drive controllers electrically connected with the primary controller; a plurality of drive outputs electrically connected with a drive controller, each drive controller controlling at least one drive output; a plurality of LED modules, each LED module electrically connected with a drive output and having a plurality of LEDs.
An advantage of the present invention is the provision of a lighting control system that compensates for the effects of temperature changes on the forward voltages of LEDs within a lighting device.
Another advantage of the present invention is the provision of a lighting control system that compensates for voltage variations among individual LED lighting modules to provide substantially uniform light output.
These and other advantages will become apparent from the following description taken together with the accompanying drawings and the appended claims.
The invention may take physical form in certain parts and arrangement of parts, an embodiment of which will be described in detail in the specification and illustrated in the accompanying drawings which form a part hereof, and wherein:
Referring now to the drawings wherein the showings are for the purposes of illustrating an embodiment of the invention only and not for the purposes of limiting same,
In the illustrated embodiment, primary controller 20 is a microcontroller. For example, primary controller 20 may take the form of an ARM-based processor with a variety of on-chip peripherals, including, but not limited to, an internal FLASH memory for program storage, a RAM memory for data storage, UARTs, timer/counters, a bus interface, a serial interface, an SPI interface, a programmable watchdog timer, programmable I/O lines, an A/D converter and PWM outputs. Primary controller 20 sends commands to drive controllers 32 and reads status information from each drive controller 32.
It should be understood that primary controller 20 may also communicate with other electronic devices not illustrated in
Primary controller 20 communicates with drive controllers 32 via a bus 22. In the illustrated embodiment, bus 22 is a serial bus (e.g., I2C). Primary controller also provides a constant clock signal to drive controllers 32 via a synch line 24, as will be explained in further detail below.
In the illustrated embodiment, drive controller 32 is a microcontroller. For example, each drive controller 32 may take the form of an ARM microcontroller with a variety of on-chip peripherals, including, but not limited to, an internal FLASH memory for program storage, a RAM memory for data storage, timer/counters, a serial interface, an A/D converter, a programmable watchdog timer, and programmable I/O lines. In the illustrated embodiment, each drive controller 32 has a unique identification number that allows primary controller 20 to individually address each drive controller 32.
Referring now to
Voltage regulator 44 provides an accurate fixed output voltage (e.g., 5V) when enabled. The output voltage (Vout) of voltage regulator 44 is electrically connected with power FET 48. FET 48 is used to handle the current required by LED modules 50, 80. Sense resistor (RS) 47 provides current sensing. Setpoint POT 46 is used to adjust the output voltage of voltage regulator 44 until the sensed current associated with RS 47 is within a target current range.
Comparator 42 monitors the output voltage of a drive output 34. In this respect, comparator 42 receives a reference voltage (VREF) as a first input and receives a sensed voltage (VS) as a second input via line 49. Comparator 42 compares VREF to VS to determine whether the sensed current (Is) associated with VS exceeds a threshold current (e.g., approximately 1.26 A). If the threshold current has been exceeded, then comparator 42 outputs a signal to disable voltage regulator 44, thereby turning off VOUT of voltage regulator 44. Drive controller 32 may also disable voltage regulator 44 under certain conditions (e.g., detection of an open or short circuit fault).
Referring now to
Remote temperature sensor circuit 70 includes a temperature sensor 72 (e.g., TMP35 low voltage temperature sensor from Analog Devices) to provide primary controller 20 with temperature data for monitoring the temperature in the vicinity of printed circuit board PCB2. Temperature sensor 72 provides a voltage output that is linearly proportional to the sensed temperature. Temperature sensor circuit 70 is electrically connected to primary controller 20 via connector J3 and line 26. Primary controller 20 receives the output of temperature sensor circuit 70. Primary controller 20 may read a limited number of temperature sensor inputs from printed circuit boards PCB2. In the illustrated embodiment, only two temperature sensor circuits 70 on LED modules 50 are selected or connected to primary controller 20.
Referring now to
Trim circuit 90 compensates for differences in forward voltage values between LEDs due to non-uniformity in the manufacture of LEDs. In this respect, trim circuit 90 balances the voltage drop differences across the series-connected LEDs 52, 82 to insure that the appropriate voltage is applied across the series-connected LEDs 52, 82 to set the desired forward current value and make all LED modules 50, 80 appear identical (i.e., uniform lighting). Trim circuit 90 includes an adjustable FET Q1 controlled by an amplifier (comparator) 96 (e.g., AD8220 JFET input instrumentation amplifier from Analog Devices) that provides a means whereby the paired LED modules 50, 80 can be calibrated (i.e., “trimmed”) to a fixed voltage drop across the module pair as described below. A digital potentiometer (POT) 92 (e.g., MAX 5417 a digital potentiometer from Maxim Integrated Products) is used to fix the gate voltage to FET Q1. A micro-power voltage regulator 94 (e.g., LM4040 voltage reference from Maxim Integrated Products) is used to power amplifier 96 and digital POT 92. Voltage regulator 94 provides 5V for digital POT 92, amplifier 96 and bias circuits (not shown). The input to voltage regulator 94 uses a blocking diode D1 and two capacitors (not shown). The combination of diode D1 and the two capacitors provides a small capacitive storage between pulses to maintain constant voltage under the minimum duty cycle at the normal operating frequency (e.g., 25% at 300 Hz). Voltage regulator 94 is always powered once voltage is applied to LEDs 52, 82.
Operation of lighting control system 10 will now be described in detail. Primary controller 20 is programmed to provide overall control of lighting control system 10. In this respect, primary controller 20 communicates with drive controllers 32, as well as other system components, such as a user interface, and a video camera.
In the illustrated embodiment, primary controller 20 supplies a 30 KHz drive clock signal, via synch line 24, to each drive controller 32. The drive clock signal is used to maintain synchronization among drive controllers 32 and provide each drive controller 32 with a fixed time base used to drive respective LED modules 50, 80. In this regard, the drive clock signal directly drives two internal timers within each drive controller 32. The first internal timer of each drive controller 32 is associated with a first drive output 34 (drive output A) and the second internal timer of each drive controller 32 is associated with a second drive output 34 (drive output B). The internal timers allow the two drive outputs 34 (i.e., drive output A and drive output B) to provide drive output signals that are out of phase with each other, thereby preventing large fluctuations in current consumption when the lighting device is activated. In accordance with a preferred embodiment of the present invention the phase is different for each drive output 34 of all drive controllers 32. Thus, drive output A of drive controller 1, drive output B of drive controller 1, drive output A of drive controller 2 and drive output B of drive controller 2 all provide drive output signals that are out of phase with each other.
The drive output signals associated with drive outputs 34 preferably have a fixed frequency of 300 Hz, which is a multiple of 50 Hz (the scan rate of PAL video cameras) and 60 Hz (the scan rate of NTSC video cameras). When using an optional video camera with the lighting device associated with the present invention, the camera will detect a noticeable flicker in the light if the output frequency of LEDs 52, 82 is not a multiple of the camera scan rate.
Primary controller 20 sends multiple commands to each drive controller 32 in order to “activate” LED modules 50, 80 (i.e., turn on LEDs 52, 82). The commands include a command indicative of a “target duty cycle,” a command indicative of the “phase offset” for each drive output 34, and a command indicative of activation of LED modules 50, 80, referred to as a “start” command. The target duty cycle is indicated by units of the primary controller's drive clock periods (i.e., the number of drive clock periods to turn ON). The drive clock periods are fixed-duration clock pulses counted by the internal timers of each drive controller 32 to determine how long to turn ON respective drive outputs 34 during each period of the drive output signal. As indicated above, the drive output signals preferably have a fixed frequency of 300 Hz, and thus have a period of 3.33 msec. A phase offset is generated in units of the primary controller's drive clock periods. The start command indicates to drive controllers 32 that the associated LED modules 50, 80 are about to be activated (i.e., turn on LED lights). Drive controllers 32 use the start command to initialize their respective internal timers and prepare for commencement of the drive clock signal generated by primary controller 20. Primary controller 20 may also send a “stop” command to drive controllers 32 in order to inform drive controllers 32 to turn off associated drive outputs 34 and stop their respective internal timers.
The drive clock signal of primary controller 20 drives the two internal timers within each drive controller 32, thereby allowing drive controllers 32 to control associated LED modules 50, 80 at the target duty cycle, via drive outputs 34. The values for various target duty cycles provided by primary controller 20 are established to correspond to a plurality of predetermined, user selectable LED intensity levels. By way of example, and not limitation, the illustrated embodiment may include the following nine fixed intensity levels:
The target duty cycle is generated from the number of fixed clock pulses counted (e.g. 40% duty cycle requires a count of 40 clock pulses) within the period of the 300 Hz drive output signal. The predefined, fixed duty cycle values associated with each intensity level may be stored in a lookup table in the memory of primary controller 20.
The maintenance intensity level provides a low duty cycle in order to obtain low light intensity to facilitate inspection for failed LED modules 50, 80 with reduced eye discomfort. The calibration intensity level provides a maximum duty cycle that allows convenient adjustment of power supplies until the lowest drive current output is at the target drive current, thereby delivering sufficient drive output current to all of the LED modules 50, 80.
As indicated above, the drive output signal of drive outputs 34 have a fixed frequency. Preferably, the fixed frequency is 300 Hz (Tperiod=3.33 msec). Therefore, for a selected intensity level, the drive output signal of each drive output 34 will be turned ON for a predefined, fixed number of clock cycles of the primary controller's drive clock and turned OFF for a predefined, fixed number of clock cycles of the drive clock of primary controller 20.
Operation of LED module 50 (module A) will now be described in detail with reference to
Temperature compensation circuit 60 of LED module 50 (i.e., LED module A) includes a FET Q2 that is biased such that when LED modules 50, 80 are cold, FET Q2 is fully on. This results in the forward resistance of FET Q2 being very low so there is a relatively small amount of voltage dropped across FET Q2 when cold. As LED modules 50, 80 begin to heat up, thermistor 62 acts to reduce the gate voltage on FET Q2 and increases its forward resistance. This action effectively absorbs the reduction of forward voltage as LEDs 52, 82 heats up. As the LEDs 52, 82, begins to heat up, thermistor 62 in the FET Q2 bias network acts to reduce the gate voltage on the FET Q2 and increases its forward resistance. This action effectively absorbs the reduction of forward voltage as LEDs 52, 82 heat up. As the resistance of thermistor 62 gets increasingly lower, the gate voltage to the FET Q2 gets low enough so that the resistance of FET Q2 is much higher than that of the pair of parallel low value power resistors R1, R2. At this point, virtually all of the current flowing through the temperature compensation circuit 60 passes through parallel resistors, R1, R2, effectively switching out FET Q2. Switching out FET Q2 and switching in fixed resistors, R1, R2, allows FET Q2 to be smaller and less expensive since FET Q2 does not need to be rated to handle the total current at higher temperatures. Temperature compensation circuit 60 is a stand alone circuit that has no feedback to drive controller 32 or primary controller 20.
As indicated above, temperature sensor circuit 70 provides data to primary controller 20 for display only and is indicative of the operating temperature in the vicinity of LED module 50.
Operation of LED module 80 (module B) will now be described in detail with reference to
Each drive output 34 drives two pairs of LED modules 50, 80 electrically connected in parallel. If the two parallel pairs of LED modules 50, 80 do not have substantially similar forward voltage drops, the currents through the two parallel pairs of LED modules 50, 80 will not be equal, and thus the light output of the two parallel pairs of LED modules 50, 80 will vary accordingly.
Amplifier 96 of trim circuit 90 generates the gate voltage of FET Q1 based on the difference between the positive input from the FET drain and the negative input that is set using digital POT 92. When digital POT 92 is being set to an appropriate resistance value, FET Q1 acts as a fixed resistor in series with LEDs 52, 82. Adjusting the forward resistance of FET Q1 effectively nullifies forward voltage variations of LED modules 50, 80 caused by the different forward voltages of LEDs 52, 82.
POT 92 is adjusted and programmed as part of the LED module manufacturing process by connecting connector J5 to a programming tool (e.g., a test and calibration instrument) that writes a setpoint value to the POT 92. Adjustment of POT 92 is performed during a manufacturing and test process when the LED modules, 50, 80, are electrically connected together. During the manufacturing process of LED modules 50, 80, approximately 24V is applied by a test and calibration instrument to LED module 50 via connector J1. POT 92 is then adjusted such that the drive current through LEDs 52, 82 is a predetermined drive current target value. Trim circuit 90 is a stand alone circuit and has no feedback to drive controller 32 or primary controller 20.
It should be noted that LED modules 50, 80 may be overdriven to account for optical losses during assembly of the lighting device. In this regard, the LED drive current control target is set to a predetermined, fixed offset above the nominal LED forward drive current. Accordingly, manufacturing personnel will be able to increase the intensity of LEDs 52, 82 by adjusting the drive current to a value within the allowable LED manufacturer range, thereby achieving a desired lux reading from the lighting device.
A calibration function is provided by primary controller 20 to allow an additional adjustment to be made to “tune” the drive current closer to the target drive current. Power supplies with adjustable 24VDC output to be supplied to lightheads that include LED modules 50, 80 may have the outputs adjusted up or down to increase or reduce the drive current readings.
Drive controller 32 is programmed to sample the LED drive current, and determine whether the LED drive current is within the target drive current value plus/minus a predefined tolerance to provide fault messages to the display. If the LED drive current is outside the allowable tolerance, an audible or visual alarm indicator may be used to indicate to the user that power supplies need to be adjusted, or LED modules 50, 80 (or associated harnesses) need replacement.
Primary controller 20 is programmed to monitor the LED drive current of drive outputs 34 to determine if one or both of the associated pair of LED modules 50, 80 have failed “opened” (i.e., open circuit) in order to supply a fault message to the display. If one LED module 50, 80 of the LED module pair has failed open, the drive current will be approximately 50% of a target drive current setting. If both LED module pairs have failed, the drive current reading will be approximately 0 mA. The failed conditions are detected by primary controller 20 and indicator alarms are generated at user interfaces.
A portion of each drive output 34 determines whether an LED module 50, 80 has failed due to a short circuit. In this respect, drive output 34 detects the presence of a short circuit and generates an over-current indication to the associated drive controller 32. This drive controller 32 then turns off the drive output 34 associated with the LED module 50, 80 having a short circuit, and prevents the drive output 34 from being turned on until the short circuit fault condition has been cleared. A fault message may be also displayed to a user.
Other modifications and alterations will occur to others upon their reading and understanding of the specification. It should be understood that it is contemplated that the present invention may have many alternative configurations. For example, in one configuration, 28 LED modules are grouped into 14 LED module pairs. Accordingly, four drive controllers are connected with the primary controller. In another configuration, 56 LED modules are grouped into 28 LED module pairs. Accordingly, seven drive controllers are connected with the primary controller. Furthermore, it is contemplated that multiple color LEDs may be substituted for the single color LEDs of the illustrated embodiment. It is intended that all such modifications and alterations be included insofar as they come within the scope of the invention as claimed or the equivalents thereof.
This application is a divisional of U.S. application Ser. No. 11/875,083, filed Oct. 19, 2007, and is hereby fully incorporated herein by reference.
Number | Date | Country | |
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Parent | 11875083 | Oct 2007 | US |
Child | 12716316 | US |