This disclosure relates generally to computer memory, and more particularly to a linked list for lock-free memory allocation in a computer memory.
A computer system may execute a relatively large number of operations concurrently. These operations may require allocation of ranges of addresses in the computer memory for exclusive use during execution. To perform concurrent memory allocation, the computer system allocates and deallocates ranges of addresses in the computer memory to various operations during execution. An allocated range in the computer memory may be locked to a particular operation by the computer system during execution of the operation. However, for high-availability computer systems, such locking may not be a viable option, as errors may occur in the computer system due to the failure or stoppage of an operation that is a lock holder.
The addresses in the computer memory that are available for allocation by the computer system may be divided into fixed, equally-sized address ranges, which may be allocated among operations in a lock-free and highly-available manner. However, such fixed-sized address ranges do not allow flexibility in allocation of memory space to operations, and also may not be suited for handling of operations that require relatively large address ranges for execution.
Embodiments relate to a method for a linked list for memory allocation. An aspect includes maintaining, by a memory allocation module in a computer processor, a linked list of address ranges in a computer memory that are available for allocation. Another aspect includes receiving, by the memory allocation module, a request for allocation of a first address range from a first operation, the request comprising a size of the first address range. Another aspect includes traversing the linked list to determine an available address range having a size that is greater than or equal to the size of the first address range. Another aspect includes determining whether there is interference in the linked list from a second operation. Another aspect includes, based on determining that there is no interference in the linked list from the second operation, removing determined address range from the linked list. Another aspect includes, based on determining that there is interference in the linked list from the second operation, restarting the traversing of the linked list.
Additional features are realized through the techniques of the present exemplary embodiment. Other embodiments are described in detail herein and are considered a part of what is claimed. For a better understanding of the features of the exemplary embodiment, refer to the description and to the drawings.
Referring now to the drawings wherein like elements are numbered alike in the several Figures:
Embodiments of a linked list for lock-free memory allocation are provided, with exemplary embodiments being discussed below in detail. The ranges of addresses in the computer memory that are available for allocation may be managed as a sorted linked list by a memory allocator of the computer system. Each node in the linked list represents a contiguous range of available, or free, memory. The memory allocator manages the linked list without locking any portion of the computer memory, allowing concurrent operations to proceed unimpeded. The computer system that implements the linked list for memory allocation is highly available, and stoppage or failure of an operation does not block other operations from proceeding with execution. Use of locking is avoided by detection of interference between operations to which address ranges are allocated and deallocated using the linked list, in order to maintain an accurate list of available address ranges in the linked list. If such interference is detected, traversal of the linked list is restarted in order to maintain a consistent view of the linked list. The interference may be detected by comparing a value that is stored in the linked list to an expected value. If the stored and expected values do not match, interference is indicated.
The memory allocator may process requests for memory allocation from various operations by interacting with the nodes in the linked list in a consistent manner, so as to maintain an accurate depiction by the linked list of the ranges of addresses that are available for allocation in the computer memory. The available ranges are represented as a sorted linked list of address ranges, with each node in the linked list representing a continuous range having a range start and a range end. Each node also includes a pointer to a next node in the linked list. A free range that has been deallocated, and that is now free for allocation to another operation, may be added to the linked list to an existing node that represents an address range that is contiguous to the free range, or as a new node that is inserted in the linked list at a position that is determined by the addresses of the free range. Ranges of addresses may be allocated following a first fit policy, i.e. a continuous range having a lowest address in the linked list that is of a sufficient size to accommodate a memory allocation request may be allocated to that operation that issued the memory allocation request.
Operations that have been allocated a memory range may complete, fail, or be stopped at any time. Therefore, in order to maintain an accurate reflection of the state of the allocations in the memory, cleanup is performed on the linked list in conjunction with the address range allocation and deallocation. Whether there is interference between operations is determined in conjunction with the cleanup, and if interference is detected, traversal of the linked list is restarted in order to maintain a consistent view of the linked list. Nodes are removed from the list by a series of steps to maintain consistency among concurrent operations. First, it is determined if a node's range start and range end values are equal, indicating an empty range. Then the next pointer of the node is marked as ready for deletion. Lastly, the node is removed by changing the next pointer of its preceding node to point to the node after the removed node. If an operation empties the range of a node, or marks a node for removal, and is then stopped before the node is removed, a subsequent operation may remove the empty or marked node. Adjacent nodes in the linked list that define contiguous ranges may also be consolidated, or merged, into a single node. A memory management method, such as reference counting, hazard pointers, read-copy-update, may also be applied to the nodes that make up the linked list in some embodiments.
An embodiment of a linked list 200 that may be implemented in memory allocator 101 is shown in
Flow then proceeds to block 604, in which it is determined whether the range start 202A-N of the node referenced by the current pointer 209 (i.e., CUR.RANGE_START) is greater than the range start address of the free range that was received in block 601. If it is determined in block 604 that the CUR.RANGE_START is less than the received range start address, flow proceeds from block 604 to block 605, in which it is determined whether NEXT is equal to null 207. If it is determined in block 605 that the NEXT is not equal to null 207, flow returns from block 605 to block 603, and traversal of the linked list 200 continues by setting previous pointer 208 (PREV) to current pointer 209; the current pointer 209 is set equal to CUR.NEXT; and then the next pointer 210 (NEXT) is set equal to CUR.NEXT. Cleanup is also performed on CUR as described in
If it was determined in block 604 that CUR.RANGE_START is greater than the received range start address, flow proceeds from block 604 to block 606, in which it is determined whether the range defined by CUR is contiguous with the free range, i.e., whether the range end address of the free range directly precedes CUR.RANGE_START in the memory 102. If it is determined in block 606 that CUR.RANGE_START is contiguous with the free range, flow proceeds from block 606 to block 607, in which it is determined whether there is interference in the linked list 200 by another operation. Interference may be determined to exist if CUR.START is not equal to an expected range start value for CUR in block 607 in some embodiments. If it is determined in block 607 that there is no interference, flow proceeds from block 607 to block 608, in which CUR.RANGE_START set equal to the received range start address. However, if it is determined in block 607 that there is interference, flow proceeds from block 607 to block 602, and traversal of the linked list 200 restarts.
If it was determined in block 606 that CUR.RANGE_START is not contiguous with the free range, flow proceeds from block 606 to block 609, in which it is determined whether there is interference in the linked list 200 by another operation. Interference may be determined to exist if PREV.NEXT is not equal to CUR in block 609 in some embodiments. If it is determined in block 609 that there is no interference, flow proceeds from block 609 to block 610, in which a new node corresponding to the free range is added to the linked list 200 after PREV and before CUR. PREV.NEXT is set equal to the new node, and the next field of the new node is set equal to CUR. However, if it is determined in block 609 that there is interference, flow proceeds from block 609 to block 602, and traversal of the linked list 200 restarts.
Flow then proceeds to block 704, in which it is determined whether the size of the address range defined by CUR (i.e., CUR.RANGE-END minus CUR.RANGE_START) is greater than the requested range size that was received in block 701. If it is determined in block 704 that CUR.RANGE-END minus CUR.RANGE_START is less than the requested range size, CUR cannot accommodate the memory allocation request, and flow proceeds to from block 704 to block 705, in which it is determined whether NEXT is equal to null 207. If it is determined in block 705 that NEXT is not equal to null 207, flow returns from block 705 to block 703, and traversal of the linked list 200 continues by setting previous pointer 208 (PREV) to current pointer 209; the current pointer 209 is set equal to CUR.NEXT; and then the next pointer 210 (NEXT) is set equal to CUR.NEXT. Cleanup is also performed on CUR as described in
If it was determined in block 704 that CUR.RANGE-END minus CUR.RANGE_START is greater than or equal to the requested range size, flow proceeds to from block 704 to block 706, in which the memory allocation request is satisfied from the range indicated by CUR, and CUR.RANGE_START is returned to indicate the start address of the allocated range. Next, in block 707, it is determined whether there is interference in the linked list 200 by another operation. Interference may be determined to exist if CUR.START is not equal to an expected range start value for CUR in block 707 in some embodiments. If it is determined in block 707 that there is no interference, flow proceeds from block 707 to block 708, in which the requested range size is added to CUR.RANGE_START to reflect the allocation of the requested range size. Then, flow proceeds to block 709, in which cleanup of CUR is performed as described in
If it was determined in block 801 that the current node is unmarked, flow proceeds from block 801 to block 805, in which it is determined whether CUR is an empty node based on CUR.RANGE START being equal to CUR.RANGE_END. If CUR.RANGE START is equal to CUR.RANGE_END, the current node is determined to be empty, and flow proceeds to from block 805 to block 806, in which it is determined whether there is interference in the linked list 200 by another operation. Interference may be determined to exist if CUR.NEXT is not equal to NEXT in block 806 in some embodiments. If it is determined in block 806 that there is no interference, flow proceeds from block 806 to block 807, in which CUR is marked for removal. The mark may be placed in CUR.NEXT. Flow then proceeds from block 807 to block 802, which proceeds as described above. However, if it is determined in block 806 that there is interference, flow proceeds from block 806 to block 808, and the calling process, i.e., method 600 of
If, in block 805, it was determined that CUR.RANGE START is not equal to CUR.RANGE_END, flow proceeds from block 805 to block 809, in which it is determined whether the address range of the CUR and the address range of the NEXT are contiguous. The address range of the CUR and the address range of the NEXT are contiguous if CUR.RANGE_END directly precedes NEXT.RANGE_START in memory 102. If CUR and NEXT are determined to have contiguous ranges in block 809, flow proceeds to from block 809 to block 810, in which it is determined whether there is interference in the linked list 200 by another operation. Interference may be determined to exist if CUR.START is not equal to an expected range start value for CUR in block 810 in some embodiments. If it is determined in block 810 that there is no interference, flow proceeds from block 810 to block 811, in which CUR and NEXT are consolidated into a single node. The consolidation may be performed by setting NEXT.RANGE_START equal to CUR.RANGE_START and then setting PREV.NEXT to reference NEXT, removing CUR from the linked list 200. However, if it is determined in block 810 that there is interference, flow proceeds from block 810 to block 812, and the calling process, i.e., method 600 of
In some embodiments, the methods of
The computer 900 includes, but is not limited to, PCs, workstations, laptops, PDAs, palm devices, servers, storages, and the like. Generally, in terms of hardware architecture, the computer 900 may include one or more processors 910, memory 920, and one or more I/O devices 970 that are communicatively coupled via a local interface (not shown). The local interface can be, for example but not limited to, one or more buses or other wired or wireless connections, as is known in the art. The local interface may have additional elements, such as controllers, buffers (caches), drivers, repeaters, and receivers, to enable communications. Further, the local interface may include address, control, and/or data connections to enable appropriate communications among the aforementioned components.
The processor 910 is a hardware device for executing software that can be stored in the memory 920. The processor 910 can be virtually any custom made or commercially available processor, a central processing unit (CPU), a digital signal processor (DSP), or an auxiliary processor among several processors associated with the computer 900, and the processor 910 may be a semiconductor based microprocessor (in the form of a microchip) or a macroprocessor.
The memory 920 can include any one or combination of volatile memory elements (e.g., random access memory (RAM), such as dynamic random access memory (DRAM), static random access memory (SRAM), etc.) and nonvolatile memory elements (e.g., ROM, erasable programmable read only memory (EPROM), electronically erasable programmable read only memory (EEPROM), programmable read only memory (PROM), tape, compact disc read only memory (CD-ROM), disk, diskette, cartridge, cassette or the like, etc.). Moreover, the memory 920 may incorporate electronic, magnetic, optical, and/or other types of storage media. Note that the memory 920 can have a distributed architecture, where various components are situated remote from one another, but can be accessed by the processor 910.
The software in the memory 920 may include one or more separate programs, each of which comprises an ordered listing of executable instructions for implementing logical functions. The software in the memory 920 includes a suitable operating system (O/S) 950, compiler 940, source code 930, and one or more applications 960 in accordance with exemplary embodiments. As illustrated, the application 960 comprises numerous functional components for implementing the features and operations of the exemplary embodiments. The application 960 of the computer 900 may represent various applications, computational units, logic, functional units, processes, operations, virtual entities, and/or modules in accordance with exemplary embodiments, but the application 960 is not meant to be a limitation.
The operating system 950 controls the execution of other computer programs, and provides scheduling, input-output control, file and data management, memory management, and communication control and related services. It is contemplated by the inventors that the application 960 for implementing exemplary embodiments may be applicable on all commercially available operating systems.
Application 960 may be a source program, executable program (object code), script, or any other entity comprising a set of instructions to be performed. When a source program, then the program is usually translated via a compiler (such as the compiler 940), assembler, interpreter, or the like, which may or may not be included within the memory 920, so as to operate properly in connection with the O/S 950. Furthermore, the application 960 can be written as an object oriented programming language, which has classes of data and methods, or a procedure programming language, which has routines, subroutines, and/or functions, for example but not limited to, C, C++, C#, Pascal, BASIC, API calls, HTML, XHTML, XML, ASP scripts, FORTRAN, COBOL, Perl, Java, ADA, .NET, and the like.
The I/O devices 970 may include input devices such as, for example but not limited to, a mouse, keyboard, scanner, microphone, camera, etc. Furthermore, the I/O devices 970 may also include output devices, for example but not limited to a printer, display, etc. Finally, the I/O devices 970 may further include devices that communicate both inputs and outputs, for instance but not limited to, a NIC or modulator/demodulator (for accessing remote devices, other files, devices, systems, or a network), a radio frequency (RF) or other transceiver, a telephonic interface, a bridge, a router, etc. The I/O devices 970 also include components for communicating over various networks, such as the Internet or intranet.
If the computer 900 is a PC, workstation, intelligent device or the like, the software in the memory 920 may further include a basic input output system (BIOS) (omitted for simplicity). The BIOS is a set of essential software routines that initialize and test hardware at startup, start the O/S 950, and support the transfer of data among the hardware devices. The BIOS is stored in some type of read-only-memory, such as ROM, PROM, EPROM, EEPROM or the like, so that the BIOS can be executed when the computer 900 is activated.
When the computer 900 is in operation, the processor 910 is configured to execute software stored within the memory 920, to communicate data to and from the memory 920, and to generally control operations of the computer 900 pursuant to the software. The application 960 and the O/S 950 are read, in whole or in part, by the processor 910, perhaps buffered within the processor 910, and then executed.
When the application 960 is implemented in software it should be noted that the application 960 can be stored on virtually any computer readable storage medium for use by or in connection with any computer related system or method. In the context of this document, a computer readable storage medium may be an electronic, magnetic, optical, or other physical device or means that can contain or store a computer program for use by or in connection with a computer related system or method.
The application 960 can be embodied in any computer-readable storage medium for use by or in connection with an instruction execution system, apparatus, or device, such as a computer-based system, processor-containing system, or other system that can fetch the instructions from the instruction execution system, apparatus, or device and execute the instructions. In the context of this document, a “computer-readable storage medium” can be any means that can store the program for use by or in connection with the instruction execution system, apparatus, or device. The computer readable storage medium can be, for example but not limited to, an electronic, magnetic, optical, electromagnetic, or semiconductor system, apparatus, or a device.
More specific examples (a nonexhaustive list) of the computer-readable storage medium may include the following: an electrical connection (electronic) having one or more wires, a portable computer diskette (magnetic or optical), a random access memory (RAM) (electronic), a read-only memory (ROM) (electronic), an erasable programmable read-only memory (EPROM, EEPROM, or Flash memory) (electronic), an optical fiber (optical), and a portable compact disc memory (CDROM, CD R/W) (optical). Note that the computer-readable storage medium could even be paper or another suitable medium, upon which the program is printed or punched, as the program can be electronically captured, via for instance optical scanning of the paper or other medium, then compiled, interpreted or otherwise processed in a suitable manner if necessary, and then stored in a computer memory.
In exemplary embodiments, where the application 960 is implemented in hardware, the application 960 can be implemented with any one or a combination of the following technologies, which are well known in the art: a discrete logic circuit(s) having logic gates for implementing logic functions upon data signals, an application specific integrated circuit (ASIC) having appropriate combinational logic gates, a programmable gate array(s) (PGA), a field programmable gate array (FPGA), etc.
The technical effects and benefits of exemplary embodiments include flexible allocation of address ranges in a highly-available computer system.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the singular forms “a”, “an”, and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms “comprises” and/or “comprising,” when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
The corresponding structures, materials, acts, and equivalents of all means or step plus function elements in the claims below are intended to include any structure, material, or act for performing the function in combination with other claimed elements as specifically claimed. The description of the present invention has been presented for purposes of illustration and description, but is not intended to be exhaustive or limited to the invention in the form disclosed. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the invention. The embodiment was chosen and described in order to best explain the principles of the invention and the practical application, and to enable others of ordinary skill in the art to understand the invention for various embodiments with various modifications as are suited to the particular use contemplated.
This application is a continuation of U.S. application Ser. No. 13/899,637 filed on May 22, 2013, which is herein incorporated by reference in its entirety.
Number | Date | Country | |
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Parent | 13899637 | May 2013 | US |
Child | 13932641 | US |