Patent Application
20160012791
The present application claims the benefit of TAIWAN Patent Application Serial Number 103123707, filed on Jul. 9 2014, which are herein incorporated by reference.
1. Technical Field
The present invention relates to a display driving method, and particularly to a liquid crystal display driving method where a gate driving manner is altered to reduce an alternating time of a source to save power consumption and maintain image quality.
2. Related Art
For recent years, with wide prevalence and vigorous development of liquid crystal displays (LCDs), they have replaced traditional cathode ray tubes (CRTs) as main displays. Since LCDs and the CRTs have different structures, they have different drive manners. For LCDs, they display based on their liquid crystal molecular structures and optical characteristics. The liquid crystal molecular requires to be driven by an AC signal, preventing the electric and chemical characteristics of their liquid crystal molecular from being affected, resulting in some irreversible issues such as a vague frame and a shortened lifetime.
At present, the liquid crystal molecular may be altered its orientations by using an output signal of a driver IC, which sequentially forms an overall display frame. The driver IC mainly comprises a gate driving portion and a source driving portion. The gate driving is used to activate or inactivate a switch associated with the liquid crystal, so that each row of the LCD may be controlled for its switch action. When the LCD is sequentially scanned row by row, its gates may be activated and thus an image data is inputted from its sources. Namely, when a gate is activated, an overall row of switch will be opened, while an image data is inputted into the source associated therewith to display the image.
Besides the structural difference, the LCD also has a higher processing speed and a larger bandwidth as compared to the CRT. Generally, since the traditional CRT has the limit of the processing speed and the bandwidth, interlaced image data is used to display the images. However, the LCD uses instead serial image data to display the images. If the interlaced image data is directly used to be displayed on the LCD, it may not have a normal display work. Hence, in the LCD, an additional conversion circuit has to be provided to convert the interlaced image data into the serial image data to display images normally. However, this conversion circuit may involve an increased power consumption of the LCD.
In addition, consider the liquid crystal's characteristics, the output of the source has to be inversed in its polarity. The different polarities inversion manners correspond to different drive manners, and include “one-dot inversion”, “two-dot inversion” and “column inversion” manners. Among them, the “one-dot inversion” manner is the most commonly used one, and by which each row in the LCD has an opposite polarity to that of its adjacent rows. For the “two-dot inversion” manner, two rows are grouped as one set and have the same polarity while each set adjacent to each other has the opposite polarity. In the case of the column inversion manner, each row in a frame has the same polarity, while adjacent frames have the different polarities.
In other words, these three drive manners differs in their time points and numbers of polarity reversion. The larger the inversion number is, the better the frame quality is and the larger the power consumption is.
Take the column inversion as an example, since the sources in each row have the same polarity while the sources in two adjacent rows have the opposite polarities In this case, if the voltages of the different polarities have an error, a flicker phenomenon is possible to be caused, which may result in an undesirable effect on the frame quality.
In terms of this issue, some particular liquid crystal panels, such as “Zig-Zag panel”, have been proposed. In this scheme, the electric connection manner in the liquid crystal is improved to change the driven liquid crystal laterally continuously. Hence, the liquid crystal in this panel has the same polarity distribution with that of the one-dot manner and thus has a good frame quality. In addition, its source has the same inversion number with that of the column inversion manner, lending to a lower power consumption.
In other words, this scheme does not change the drive manner for driving the IC but only the liquid crystal panel. However, alternation of the liquid crystal panel may largely increase the production cost, and may not be applied onto the conventional liquid crystal panel. Therefore, when the conventional liquid crystal panel is used, the issue that the decreased power consumption and the frame quality maintenance may not be secured simultaneously are still presented.
In view of the above, it may be known that there has long been the issue of that the decreased power consumption and the frame quality maintenance may not be secured simultaneously. Therefore, there is quite a need to provide a technical means to overcome this problem.
The present invention discloses a liquid crystal display driving method.
According to the present invention, the liquid crystal display driving method comprises steps of receiving sequentially a plurality of signal frames, each being a serial image data; converting the serial image data into an interlaced image data; generating an odd driving signal and an even driving signal according to the interlaced image data; activating one of a plurality of gates having an odd number sequentially according to the odd driving signal when the plurality of signal frames have the odd number and activating one of a plurality of gates having an even number sequentially according to the even driving signal when the plurality of signal frames have the even number, wherein when the plurality of signal frames are switched from having the odd number to the even number, a plurality of sources are each driven to have an inversed polarity, respectively; and displaying continuously the plurality of signal frames to display an image, respectively, according to a state of the plurality of gates having the odd number and the even number and the plurality of sources continuously.
According to the present invention, the liquid crystal display driving method comprising steps of receiving sequentially a plurality of signal frames, each being a serial image data; converting the serial image data into an interlaced image data; generating an odd driving signal and an even driving signal according to the interlaced image data; activating one of a plurality of gates having an odd number sequentially according to the odd driving signal at a first half period of each of the plurality of signal frames, and activating one of a plurality of gates having an even number sequentially according to the even driving signal at a second half period of each of the plurality of signal frames, wherein when the first half period is switched to the second half period, a plurality of sources are each driven to have an inversed polarity, respectively; and displaying continuously the plurality of signal frames to display an image, respectively, according to a state of the plurality of gates having the odd number and having the even number and the plurality of sources continuously.
According to the present invention, the liquid crystal display driving method comprises steps of receiving sequentially a plurality of signal frames, each being an interlaced image data; generating an odd driving signal and an even driving signal according to the interlaced image data; activating one of a plurality of gates having an odd number sequentially according to the odd driving signal at the plurality of signal frames having the odd number, and activating one of a plurality of gates having an even number sequentially according to the even driving signal at the plurality of signal frames having the even number, wherein when the plurality of signal frames are switched from having the odd number to the even number, a plurality of sources are each driven to have an inversed polarity, respectively; and displaying continuously the plurality of signal frames to display an image, respectively, according to a state of the plurality of gates having the odd number and having the even number and the plurality of sources continuously.
According to the present invention, the liquid crystal display driving method comprises steps of receiving sequentially a plurality of signal frames, each being an interlaced image data; generating an odd driving signal and an even driving signal according to the interlaced image data; activating one of a plurality of gates having an odd number sequentially according to the odd driving signal at a first half period of each of the plurality of signal frames, and activating one of a plurality of gates having an even number sequentially according to the even driving signal at a second half period of each of the plurality of signal frames, wherein when the first half period is switched to the second half period, a plurality of sources are each driven to have an inversed polarity, respectively; and displaying continuously the plurality of signal frames to display an image, respectively, according to a state of the plurality of gates having the odd number and having the even number and the plurality of sources.
According to the present invention, the liquid crystal display driving method comprises steps of receiving sequentially a plurality of signal frames each comprising a plurality of odd row image data and a plurality of even row image data; activating one of a plurality of gates having an odd number sequentially and transmitting the plurality of odd row image data to a plurality of sources at the plurality of signal frames having the odd number, and activating one of a plurality of gates having an even number sequentially and transmitting the plurality of even row image data to the plurality of sources at the plurality of signal frames having the even number, wherein when the plurality of signal frames are switched from having the odd number to the even number, a plurality of sources are each driven to have an inversed polarity, respectively; and displaying continuously the plurality of signal frames to display an image, respectively, according to a state of the plurality of gates having the odd number and having the even number and the plurality of sources.
The present invention has the difference as compared to the prior art that the interlaced image data is received or generated to generate the odd driving signal and the even driving signal, the odd number of gates and the even number of gates are driven according to the odd driving signal and the even driving signal at different signal frame periods, and the sources are driven to inverse in their polarities when the driven gates are switched from the ones having the odd number to the even number, so that an interlacing number of the sources may be reduced.
By busing of this technical means, the efficacy of simultaneous promoted power saving and frame quality may be achieved.
The present invention will be better understood from the following detailed descriptions of the preferred embodiments according to the present invention, taken in conjunction with the accompanying drawings, in which:
The present invention will be apparent from the following detailed description, which proceeds with reference to the accompanying drawings, wherein the same references relate to the same elements.
Prior to the description of the liquid crystal display driving method of the present invention, the environment the present invention is applied onto and the nouns privately defined in the present invention are explained first. The present invention is applied onto LCD drive ICs, and drives gates in an interlaced manner, enables sources to inverse in their polarities when the driven gates are switched from the ones having the odd number to the even number, and thus effectively reduces an alternating number of the sources, whereby achieving the effect of simultaneous power consumption reduction and good frame quality. As for the odd driving signal and the even driving signal, they are the ones driving the odd number of gates and the even number of gates, respectively.
In the following, the liquid crystal display driving method according to the present invention will be described in more details. Referring to
Thereafter, referring to
By using the above steps, the odd driving signal may be issued at the signal frames having the odd number. At this time, the sources having the odd number only update their data when the gates having the odd number are driven and the update maintains a period until a next signal frame, i.e. a signal frame having the odd number. At the signal frame having the even number, the even driving signal is issued. At this time, the sources having the even number only update their data when the gates having the even number are driven and the update maintains a period until a next signal frame, i.e. a signal frame having the even number. It is to be noted that since only the signal frames having the odd number update the liquid crystal and the signal frames having the even number does not update the liquid crystal, the update frequency of the odd row is only 30 Hz. If the same liquid crystal frequency is desired, a frame frequency has to be promoted to 120 Hz, so that the liquid crystal update frequency may reach 60 Hz. This belongs to a scope of the prior art, and thus omitted herein for clarity. In addition, although the gates having the odd and even number are activated at the signal frames having the odd and even number, respectively, in the first embodiment, the gates having the odd number may also be instead activated at the signal frames having the even number, and the gates having the even number are activated at the signal frames having the odd number.
In addition, in real implementation, the serial image data in the step 220 is subject to a masking process to form an interlaced image data. For example, the even row data is subject to the masking process first, and only the odd row data is transmitted. Next, the odd row data is subject to the masking process first, and only the even row data is transmitted.
Thereafter, the interlaced image data may be transmitted sequentially to each of the sources. The interlaced image data may generate the odd driving signal at the signal frames having the odd number and the even driving signal at the signal frames having the even number. In real implementation, in the step 240, one of the gates having the odd number may be sequentially activated downwards or upwards according to the odd driving signal, and one of the gates having the even number may be sequentially activated downwards or upwards according to the even driving signal.
Referring to
By using the above steps, at the first half period of the signal frame, the gate issues a control signal, i.e. the odd driving signal. Further, the source associated with the source updates its data and maintains its polarity. At the second half period of the same signal frame, the gate issues a control signal, i.e. the even driving signal. Further, the source associated with the source updates its data and changes its polarity to be opposite to that at the first half period of the signal frames. Since only one time of polarity change at the second half period of the signal frame, the alternating number of the source is effectively reduced, achieving a power saving result. Further, since the two adjacent rows of liquid crystal have different polarities, the frame quality may be maintained owing to the different polarities of liquid crystal. Although the gate having the odd number in the second embodiment is activated at the first half period of each of the signal frames, and the gate having the even number is activated at the second half period of each of the signal frames, the gate having the odd number may be instead activated at the second half period of each of the signal frames and the gate having the even number is instead activated at the first half period of each of the signal frames correspondingly.
In real implementation, the step 320 stores the serial image data in a memory, such as a graphic memory, and rearranges the odd and even rows of serial image data into an interlaced image data. For example, the odd number row of the serial image data is first extracted in the step 320 and rearranged as the first half portion of the interlaced image data. Next, the even number rows of the serial image data are extracted and rearranged as the second half portion of the interlaced image data. In this manner, the first and second half portions of the interlaced image data may be composed of the complete interlaced image data. Thereafter, the interlaced image data in the memory may be sequentially transmitted to each of the sources. The interlaced image data generates the odd driving signal at the transmitted first half period and the even driving signal at the transmitted second half period. In real implementation, in the step 340, the odd driving signal activate one of plurality of gates having the odd number downward or upward sequentially, and the even driving signal activate one of the plurality of gates having the even number downward or upward sequentially.
Referring to
The third embodiment has the main difference as compared to the first embodiment that the interlaced image data is directly received without any conversion required. In the third embodiment, the frame rate of the signal frames may be the same as that of the first embodiment of 120 Hz. The interlaced image data is also transmitted by the sources. And, at the signal frames having the odd number, the odd driving signal is generated, and the even driving signal is generated at the signal frames having the even number.
In real implementation, in the step 420, the odd number or even number rows of serial image data are first subject to a masking process to form the interlaced image data. For example, the even number row is first subject to the masking process and only the odd number row of data is transmitted. Thereafter, the odd number row of data is subject to the masking process, and only the even row of data is transmitted.
In this manner, at the signal frames having the odd number may the odd number row of image data display, and at the signal frames having the even number may the even number row of image data display. And, the adjacent odd signal frames and the even signal frames present an overall display frame. In addition, the step 430 may activate one of the plurality of odd number gates upwards or downwards according to the odd driving signal, and one of the plurality of even number gates upwards or downwards according to the even driving signal. It is to be particularly pointed out that although the gates having the odd and even number are activated at the signal frames having the odd and even number, respectively, in the third embodiment, the gates having the odd number may also be instead activated at the signal frames having the even number, and the gates having the even number are activated at the signal frames having the odd number.
Referring to
By using the above steps, at the first half period of each of the plurality of signal frames, the gate issues a control signal, i.e. the odd driving signal, to drive the gate having the odd number, and the source associated with the gate update the data and maintain its polarity, and at the second half period of each of the plurality of signal frames, the gate issues a control signal, i.e. the even driving signal, to drive the gate having the even number, and the source associated with the gate update the data and change its polarity to be opposite to that at the first half period of the signal frames. Since only one time of polarity change at the second half period of the signal frame, the alternating number of the source is effectively reduced, achieving a power saving result. Further, since the two adjacent rows of liquid crystal have different polarities, the frame quality may be maintained owing to the different polarities of liquid crystal. In other words, the fourth embodiment has the main difference as compared to the second embodiment that the interlaced image data is directly received without any conversion required. In this fourth embodiment, the interlaced image data is also transmitted by the sources, and the odd driving signal is generated at the first half period of each of the plurality of signal frames and the even driving signal is generated at the second half period of each of the plurality of signal frames, in the course of transmission of the interlaced image data. In real implementation, in the step 530, the odd driving signal activate one of plurality of gates having the odd number downward or upward sequentially, and the even driving signal activate one of the plurality of gates having the even number downward or upward sequentially. Although the gate having the odd number in the fourth embodiment is activated at the first half period of each of the signal frames, and the gate having the even number is activated at the second half period of each of the signal frames, the gate having the odd number may be instead activated at the second half period of each of the signal frames and the gate having the even number is instead activated at the first half period of each of the signal frames correspondingly.
Referring to
In the fifth embodiment, each of the plurality of signal frames only displays half of the image data. For example, the odd number row of image data or the even number row of image data is displayed. To avoid from a reduction of the image quality owing to the half data display, the frame rates of the signal frames may be set as 120 Hz in the course of displaying the signal frame in the step 630, so that two consecutive signal frames may be composed to from a complete static image, and consecutive static images are used to present a dynamic image, such as video. In addition, in real implementation, in the step 630, the odd driving signal activate one of plurality of gates having the odd number downward or upward sequentially, and the even driving signal activate one of the plurality of gates having the even number downward or upward sequentially.
As stated above, the present invention may generate the odd driving signal and the even driving signal by receiving or generating the interlaced image data, and drive the gates having the odd number and the even number at different signal frames according to the odd driving signal and the even number, and inverses the polarity of the sources when the driven gates is switched from ones having the odd number to the even number. In this manner, the alternating number of the sources may be reduced, and the adjacent liquid crystals have different polarities, whereby achieving a power saving result and a good frame quality simultaneously.
In the following,
In addition, the serial image data may be stored in a memory 721 in a drive IC 720 previously. Thereafter, the odd number rows and the even number rows of data are rearranged to from the interlaced image data. As such, the drive IC 720 may transmit the converted interlaced image data to the liquid crystal panel 101 to be displayed. It is to be particularly pointed out that assume the baseband circuit 710 transmits the interlaced image data, the drive IC 720 may directly transmit the interlaced image data to the liquid crystal panel 101 without any conversion required. In other words.
No matter the baseband circuit 710 transmits the serial image data or the interlaced image data, the drive IC 720 may output the interlaced image data to the liquid crystal panel 101 and activate the gate and source to display the image. The serial image data may be arranged in a manner line what the serial image data 810 in
In the first and third embodiments, the odd number row data or the even number row data of the serial image data 810 may be directly shaded to form the interlaced image data and then transmitted to the sources. In the second and fourth embodiments, after the serial image data 810 is converted, the serial image data 810 becomes the interlaced image data 820 such as the arrangement schematically shown in
As shown in
I
ac
=C
LOAD*(1)*[5V−(−5V)]*(frame-rate)*(channel-count),
wherein “CLOAD” is a capacitive load of a panel data line, “frame-rate” is a frame rate, “channel-count” is a total count of the panel data line, “1” is obtained from Gn/Gn, Gn is a gate number, also a total panel scan line count. Since an output S1 has the same polarity at the same signal frames, its power consumption is largely reduced as compared to the conventional “one-dot inversion” or “two-dot inversion”. Even its frame rate increases to 120 Hz, the frame rate is only slightly larger than that of “column inversion”. The main reason is that the 120 Hz frame rate corresponds to two time data transmitted, and thus transmission of picture data consumes more power. In real implementation, the frame rate may be adjusted as desired, such as maintained as 60 Hz, adjusted to 70 Hz, or other frequencies suitable to the liquid crystal molecular. In addition, since the polarity of the sources corresponds to the arrangement of the “one-dot inversion” drive manner for frame displaying, the frame quality is superior.
In the second and fourth embodiments, since the gates having the odd number and the even number are driven at the first and second half periods of the same signal frame, respectively, the actual waveform is like what
I
ac
=C
LOAD*(2)*[5V−(−5V)]*(frame-rate)*(channel-count),
wherein “CLOAD” is the capacitive load of the panel data line, “frame-rate” is the frame rate, “channel-count” is the total count of the panel data line, is obtained from 2Gn/Gn, Gn is a gate number, also the total panel scan line count. It may be clearly seen in
In view of the above, it may be known that the method of the present invention has the difference as compared to the prior art that the interlaced image data is received or generated to generate the odd driving signal and the even driving signal, the odd number of gates and the even number of gates are driven according to the odd driving signal and the even driving signal at different signal frame periods, and the sources are driven to inverse in their polarities when the driven gates are switched from the ones having the odd number to the even number.
By busing of this technical means, the issue encountered in the prior art may be solved, and whereby achieving the efficacy of simultaneous promoted power saving and frame quality.
Although the invention has been described with reference to specific embodiments, this description is not meant to be construed in a limiting sense. Various modifications of the disclosed embodiments, as well as alternative embodiments, will be apparent to persons skilled in the art. It is, therefore, contemplated that the appended claims will cover all modifications that fall within the true scope of the invention.
| Number | Date | Country | Kind |
|---|---|---|---|
| 103123707 | Jul 2014 | TW | national |
