1. Technical Field
The present disclosure relates a display technology, and particularly to, a liquid crystal display device and a display device.
2. Description of Related Art
A floating line is usually positioned at a peripheral non-transparent area of a display device. The floating line is connected to signal lines via electrostatic discharge components. Accordingly, when high voltage electrostatic discharges occur on the signal lines, the high voltage electrostatic discharges are discharged to a periphery of an interior of the display device via the electrostatic discharge components and the floating line.
However, because the floating line is positioned at the peripheral non-transparent area of the display device, a size of the peripheral non-transparent area is increased, resulting in an adverse development to a narrow frame of the display device.
Therefore, what is needed is a liquid crystal display device and a display device that can overcome the described limitations.
The disclosure is illustrated by way of example and not by way of limitation in the figures of the accompanying drawings in which like references indicate similar elements. It should be noted that references to “an” or “one” embodiment in this disclosure are not necessarily to the same embodiment, and such references mean “at least one.”
Reference will now be made to the drawings to describe embodiments of the present disclosure.
The CF substrate 11 comprises a substrate 110 and a common electrode 112. The substrate 110 comprises a first side 110a facing the display media layer 13 and a second side 110b opposing the first side 110a. The common electrode 112 is located on the first side 110a of the substrate 110.
The TFT substrate 12 comprises a substrate 120, a plurality of gate lines 121, a plurality of data lines 122, a plurality of TFTs 123, a plurality of pixel electrodes 124, a plurality of storage capacitors 125, and at least one electrostatic discharge component 126, a common electrode line 127, a plurality of storage capacitor lines 128, a feedback line 129, and silver paste 130. The substrate 120 comprises a first side 120a facing the display media layer 13 and a second side 120b opposing the first side 120a. The gate lines 121, the data lines 122, the TFTs 123, the pixel electrodes 124, the storage capacitors 125, the at least one electrostatic discharge component 126, the common electrode line 127, the storage capacitor lines 128, the feedback line 129, and the silver paste 130 are located on the first side 120a of the substrate 12. Each TFT 123 comprises a gate electrode G, a source electrode S, and a drain electrode D. Each gate line 121 comprises a first end M and a second end N. Each data line 122 comprises a first end X and a second end Y.
The substrate 120 defines a display area 12a and a border area 12b surrounding the display area 12a. The display area 12a transmits light, and is configured to display images. The border area 12b does not transmit light, and is configured for the arrangement of wires and electronic components.
The gate lines 121 extends from a side of the border area 12b to another side of the border area 12b via the display area 12a. The data lines 122 extends from the border area 12b to the display area 12a, and intersects the gates lines 121. The TFTs 123, the pixel electrodes 124, and the storage capacitors 125 are located at the display area 12a. The TFTs 123 are respectively located at intersections cooperatively defined by the gate lines 121 and the data lines 122. The gate electrode G of each TFT 123 is connected to a gate line 121. The source electrode S of each TFT 123 is connected to a data line 122. The drain electrode D of each TFT 123 is connected to a pixel electrode 124.
Each storage capacitor 125 comprises a storage capacitor electrode 125a and an insulating layer (not labeled) located between the pixel electrode 124 and the storage capacitor electrode 125a. The storage capacitor lines 128 are substantially parallel with the gate lines 121, and are connected to the storage capacitor electrodes 125a. The pixel electrodes 124, the display media layer 13, and the common electrode 112 forms a plurality of display capacitors CLC. The display capacitors CLC are located at the display area 12a.
The common electrode line 127, the at least one electrostatic discharge component 126, the feedback line 129, and the silver paste 130 are located at the border area 12b. In one embodiment, the number of the at least one electrostatic discharge component 126 is identical with the number of the gate lines 121. However, in other embodiments, the number of the at least one electrostatic discharge component 126 can also differ from the number of the gate lines 121. The common electrode line 127 is located at the border area 12b and surrounds the display area 12a.
Each storage capacitor line 128 is connected to a side of the common electrode line 127 adjacent to the first ends M of the gate lines 121 and extends along a direction substantially parallel to the gate lines 121. The second end N of each gate line 121 is connected to the common line 127 via the electrostatic discharge component 126. The feedback line 129 is substantially parallel with the data line 122 and is connected to the common electrode line 127. The silver paste 130 is located on the common electrode line 127, and connects the common electrode line 127 to the common electrode 112.
Referring to
When high voltage electrostatic discharges occur on one or more gate lines 121, the high voltage electrostatic discharges are transmitted to the common electrode line 127 via the one or more gate lines 121 and the one or more electrostatic discharge components 126 connected to the one or more gate lines 121, so as to protect the display device 100.
Since the high voltage electrostatic discharges are discharged via the electrostatic discharge components 126 and the common electrode line 127 are connected to the electrostatic discharge components 126, it is unnecessary to lay an extra floating line on the border area 12b to discharge the high voltage electrostatic discharges. Accordingly, the border area 12 is relatively narrow.
In addition, since the common voltage transmitted by the common electrode line 127 is applied to the common electrode 112, the images displayed by the display device 100 are not affected by the high voltage electrostatic discharges.
When the high voltage electrostatic discharges occur on one or more gate lines 221, the high voltage electrostatic discharges are transmitted to the feedback line 229 via the one or more gate lines 221 and the one or more electrostatic discharge components 226 connected to the one or more gate lines 221, so as to protect the display device 200.
Because the feedback line 229 is an inherent line of the display device 200, there is no need to lay an extra floating line on the border area (not labeled) to discharge the high voltage electrostatic discharges. Accordingly, the border area of the display device 200 is relatively narrow.
In alternative embodiments, besides the gate lines 100, 200, other signal lines, such as data lines 122, 222, can also be respectively connected to the common electrode lines 127, 227 via the electrostatic discharge components 126, 226, or directly connected to the feedback lines 129, 229.
The display devices 100, 200, can also be an in-plane switching (IPS) type liquid crystal display device, fringe field switching type liquid crystal display device, or other appropriate display devices.
It is believed that the present embodiments and their advantages will be understood from the foregoing description, and it will be apparent that various changes may be made thereto without departing from the spirit and scope of the present disclosure or sacrificing all of its material advantages.
Number | Date | Country | Kind |
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2013103718847 | Aug 2013 | CN | national |