Patent Grant
9953593
This application claims the priority of Chinese Patent Application No. 201510611730.X, entitled “Liquid crystal display and control signal debugging method thereof”, filed on Sep. 23, 2015, the disclosure of which is incorporated herein by reference in its entirety.
The present invention relates to a liquid crystal display technology field, and more particularly to a liquid crystal display and a control signal debugging method thereof.
As most of the liquid crystal display according to prior art utilizes signal transmission of Point to Point, the sequence controller (TCON) codes the control signal, such as the data source row latch signal (TP) and the signal (POL) controlling polarity reversal of the pixel voltage, and embeds the same in the differential signal to be transmitted from the first circuit board, such as C-board to the source driving circuit (source IC) through the second circuit board, such as X-board. The Source IC receives and decodes the differential signal and performs the subsequent signal process on demand. If it is going to measure the TP and POL signals after being decoded, the Source IC decodes and restores the control signal to be outputted to the second circuit board in a way of transistor-transistor logic voltage level for being employed to test the waveform and the sequence of the control signal.
However, after the control signal outputted by TCON has been through the subsequent code and decode processes, they cannot be directly measured on the first circuit board with the test apparatus. Thus, without the Source IC, the waveform and the sequence of the signal cannot be determined to be correct as modulating the initial control signal of TCON. Besides, as the image of the liquid crystal display appears to be abnormal, it is impossible to measure the waveform and the sequence of the control signal outputted by TCON in real time to determine whether they are correct, either. Certainly, there is no way to ensure whether the control signal outputted by TCON satisfies the requirement of the product or not.
An objective of the present invention is to provide a liquid crystal display and a control signal debugging method thereof, which can measure the waveform and the sequence of the control signal outputted by the sequence controller in real time to determine whether they are correct to ensure that the control signal outputted by the sequence controller satisfies the requirement of the product.
In one aspect, the present invention provides a liquid crystal display, and the liquid crystal display comprises a first circuit board and a second circuit board and a source driving circuit which are electrically coupled to the first circuit board, wherein the first circuit board comprises a sequence controller, and the sequence controller provides a control signal and codes the control signal, and transmits the coded control signal from the first circuit board to the source driving circuit through the second circuit board, and the sequence controller directly outputs the uncoded control signal through the first circuit board to ensure a phase delay relationship between the uncoded control signal and a control signal outputted by the source driving circuit.
The source driving circuit receives the control signal and decodes the same, and outputs the decoded control signal through the second circuit board; after the uncoded control signal through the first circuit board and the decoded control signal through the second circuit board are compared to determine the phase delay relationship of the two, the control signal received by the source driving circuit is restored in real time according to the phase delay relationship, or the control signal subsequently outputted by the sequence controller is adjusted according to the phase delay relationship.
The control signal comprises a data source row latch signal and a signal controlling polarity reversal of a pixel voltage.
The first circuit board is a X board of the liquid crystal display.
The second circuit board is a C board of the liquid crystal display.
The first circuit board comprises a first test point, and the second circuit board comprises a second test point, and the first test point and the second test point are coupled to an external test apparatus to measure a waveform and a sequence of the control signal in real time.
In another aspect, the present invention provides a control signal debugging method applied in a liquid crystal display, and the liquid crystal display comprises a first circuit board and a second circuit board and a source driving circuit which are electrically coupled to the first circuit board, and the first circuit board comprises a sequence controller, and the control signal debugging method comprises:
the sequence controller provides a control signal and codes the control signal; and
the sequence controller transmits the coded control signal from the first circuit board to the source driving circuit through the second circuit board, and meanwhile, the sequence controller directly outputs the uncoded control signal through the first circuit board to ensure a phase delay relationship between the uncoded control signal and a decoded control signal outputted by the second circuit board.
The control signal debugging method further comprises steps of:
the source driving circuit receives the control signal and decodes the same, and outputs the decoded control signal through the second circuit board; and
after the uncoded control signal through the first circuit board and the decoded control signal through the second circuit board are compared to determine the phase delay relationship of the two, the control signal received by the source driving circuit is restored in real time according to the phase delay relationship, or the control signal subsequently outputted by the sequence controller is adjusted according to the phase delay relationship.
The control signal comprises a data source row latch signal and a signal controlling polarity reversal of a pixel voltage.
The first circuit board is a X board of the liquid crystal display, and the second circuit board is a C board of the liquid crystal display.
The first circuit board comprises a first test point, and the second circuit board comprises a second test point, and the first test point and the second test point are coupled to an external test apparatus to measure a waveform and a sequence of the control signal in real time.
In comparison with prior art, the liquid crystal display and the control signal debugging method thereof according to the present invention can be directly coupled to the external test apparatus through the first circuit board to measure the waveform and the sequence of the control signal outputted by the sequence controller in real time and determine whether they are correct. Besides, the liquid crystal display and the control signal debugging method thereof according to the embodiment of the present invention also can ensure a phase delay relationship between the uncoded control signal outputted by the first circuit board and the decoded control signal outputted by the second circuit board to adjust the control signal outputted by the sequence controller according to the phase delay relationship.
In order to more clearly illustrate the embodiments of the present invention or prior art, the following figures will be described in the embodiments are briefly introduced. It is obvious that the drawings are merely some embodiments of the present invention, those of ordinary skill in this field can obtain other figures according to these figures without paying the premise.
Embodiments of the present invention are described in detail with the technical matters, structural features, achieved objects, and effects with reference to the accompanying drawings as follows. It is clear that the described embodiments are part of embodiments of the present invention, but not all embodiments. Based on the embodiments of the present invention, all other embodiments to those of ordinary skill in the premise of no creative efforts obtained, should be considered within the scope of protection of the present invention.
Besides, the following descriptions for the respective embodiments are specific embodiments capable of being implemented for illustrations of the present invention with referring to appended figures. For example, the terms of up, down, front, rear, left, right, interior, exterior, side, etcetera are merely directions of referring to appended figures. Therefore, the wordings of directions are employed for explaining and understanding the present invention but not limitations thereto.
In the description of the invention, which needs explanation is that the term “installation”, “connected”, “connection” should be broadly understood unless those are clearly defined and limited, otherwise, For example, those can be a fixed connection, a detachable connection, or an integral connection; those can be a mechanical connection, or an electrical connection; those can be a direct connection, or an indirect connection with an intermediary, which may be an internal connection of two elements. To those of ordinary skill in the art, the specific meaning of the above terminology in the present invention can be understood in the specific circumstances.
Besides, in the description of the present invention, unless with being indicated otherwise, “plurality” means two or more. In the present specification, the term “process” encompasses an independent process, as well as a process that cannot be clearly distinguished from another process but yet achieves the expected effect of the process of interest. Moreover, in the present specification, any numerical range expressed herein using “to” refers to a range including the numerical values before and after “to” as the minimum and maximum values, respectively. In figures, the same reference numbers will be used to refer to the same or like parts.
Please refer to
The first circuit board 10 comprises a sequence controller 11 and a first test point 13. The sequence controller 11 and the first test point 13 are electrically coupled to the second circuit board 30. The sequence controller 11 provides a control signal and codes the control signal, and transmits the coded control signal from the first circuit board 10 to the source driving circuit 50 through the second circuit board 30. Meanwhile, the sequence controller 11 also outputs the uncoded control signal to the first test point 13.
In this preferred embodiment, the control signal comprises a data source row latch signal (TP) and a signal (POL) controlling polarity reversal of a pixel voltage. Correspondingly, the amount of the first test points 13 is two, which respectively are employed to output the uncoded data source row latch signal and polarity reversal signal. In this preferred embodiment, the control signal is outputted to the first test point 13 in a way of transistor-transistor logic voltage level, and the test apparatus can be coupled to the first test point 13 to measure the waveform and the sequence of the control signal in real time.
The second circuit board 30 comprises a second test point 31. In this preferred embodiment, the amount of the second test points 31 is two.
The source driving circuit 50 receives the control signal from the second circuit board 30 and decodes the same, and outputs the decoded control signal to the second test point 31, and outputs the same through the second test point 31. After the uncoded control signal through the first circuit board 10 and the decoded control signal through the second circuit board 30 are compared to determine the phase delay relationship of the two, the control signal received by the source driving circuit 50 can be restored in real time according to the phase delay relationship, or the control signal subsequently outputted by the sequence controller 11 can be adjusted according to the phase delay relationship.
Please refer to
(a) the sequence controller 11 provides a control signal and codes the control signal; in this preferred embodiment, the control signal comprises a data source row latch signal (TP) and a signal (POL) controlling polarity reversal of a pixel voltage;
(b) the sequence controller 11 transmits the coded control signal from the first circuit board 10 to the source driving circuit 50 through the second circuit board 30, and meanwhile, the sequence controller 11 also directly outputs the uncoded control signal through the first circuit board 10; specifically, it is outputted through the first test point 13 of the first circuit board 10, and thus, the test apparatus can be coupled to the first test point 13 to measure the waveform and the sequence of the control signal in real time.
Correspondingly, the amount of the first test points 13 is two, which respectively are employed to output the uncoded data source row latch signal and polarity reversal signal. In this preferred embodiment, the control signal is outputted to the first test point 13 in a way of transistor-transistor logic voltage level, and the test apparatus can be coupled to the first test point 13 to measure the waveform and the sequence of the control signal in real time;
(c) the source driving circuit 50 receives the control signal and decodes the same, and outputs the decoded control signal through the second circuit board 30; specifically, the source driving circuit 50 decodes the control signal received from the second circuit board 30, and outputs the decoded control signal to the second test point 31, and outputs through the second test point 31;
(d) after the uncoded control signal outputted by the first circuit board 10 and the decoded control signal outputted by the second circuit board 30 are compared, the phase delay relationship of the two can be determined; specifically, after the uncoded control signal through the first circuit board 10 and the decoded control signal through the second circuit board 30 are compared to determine the phase delay relationship of the two, the control signal received by the source driving circuit 50 can be restored in real time according to the phase delay relationship, or the control signal subsequently outputted by the sequence controller 11 can be adjusted according to the phase delay relationship.
In conclusion, the liquid crystal display and the control signal debugging method thereof according to the present invention can be directly coupled to the external test apparatus through the first test point 13 of the first circuit board 10 to measure the waveform and the sequence of the control signal outputted by the sequence controller 11 in real time and determine whether they are correct. Besides, the liquid crystal display and the control signal debugging method thereof according to the embodiment of the present invention also can ensure a phase delay relationship between the uncoded control signal outputted by the first circuit board 10 and the decoded control signal outputted by the second circuit board 30 to adjust the control signal outputted by the sequence controller 11 according to the phase delay relationship.
In the description of the present specification, the reference terms, “one embodiment”, “some embodiments”, “an illustrative embodiment”, “an example”, “a specific example”, or “some examples” mean that such description combined with the specific features of the described embodiments or examples, structure, material, or characteristic is included in the utility model of at least one embodiment or example. In the present specification, the terms of the above schematic representation do not certainly refer to the same embodiment or example. Meanwhile, the particular features, structures, materials, or characteristics which are described may be combined in a suitable manner in any one or more embodiments or examples.
Above are embodiments of the present invention, which does not limit the scope of the present invention. Any modifications, equivalent replacements or improvements within the spirit and principles of the embodiment described above should be covered by the protected scope of the invention.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2015 1 0611730 | Sep 2015 | CN | national |
| Filing Document | Filing Date | Country | Kind |
|---|---|---|---|
| PCT/CN2015/091995 | 10/15/2015 | WO | 00 |
| Publishing Document | Publishing Date | Country | Kind |
|---|---|---|---|
| WO2017/049681 | 3/30/2017 | WO | A |
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|---|---|---|---|
| 20070195078 | Nagatsuka | Aug 2007 | A1 |
| 20150379949 | Wang | Dec 2015 | A1 |
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| Number | Date | Country | |
|---|---|---|---|
| 20170084236 A1 | Mar 2017 | US |
