Patent Application
20110019140
This application claims priority from and the benefit of Korean Patent Application No. 10-2009-0067049 filed on Jul. 22, 2009, which is hereby incorporated by reference for all purposes as if fully set forth herein.
(a) Field of the Invention
The present invention relates to a display panel for a liquid crystal display, a liquid crystal display, and a manufacturing method thereof.
(b) Description of the Related Art
Generally, a liquid crystal display includes a pair of display panels provided with field generating electrodes and polarizers, and a liquid crystal layer interposed between the two is display panels. The field generating electrodes generate an electric field to the liquid crystal layer, and the arrangement of the liquid crystal molecules is changed according to the change of the intensity of the electric field. For example, the arrangement of the liquid crystal molecules of the liquid crystal layer is changed while applying the electric field such that the polarization of the light passing through the liquid crystal layer is changed. The polarizers appropriately block or transmit the polarized light to form bright and dark regions, thereby displaying images.
Color filters of three primary colors such as red, green, and blue are formed on one display panel of a liquid crystal display, and the manufacturing cost can be decreased when forming the color filters by using inkjet printing rather than photolithography process.
To form the color filters by using Inkjet printing, inks of desired amounts of three primary colors such as red, green, and blue are jetted through a plurality of nozzles of an Inkjet head, and the jetted inks are filled in regions enclosed by a light blocking member on a substrate.
When using the Inkjet printing system to form the color filters, repellant power of the ink against the surface of the light blocking member surface is generated such that the color filter is largely formed in the central portion of the region enclosed by the light blocking member as opposed to the edge of the region, and thereby the color filter may have a dome shape. Color filters with the dome shape may generate color hue at the edge of pixel areas.
Accordingly, the present invention has been made in an effort to provide an liquid crystal display, a panel therefor, and a manufacturing method thereof having advantages of preventing color hue phenomenon at the pixel edge.
A thin film transistor with color filter array panel for a liquid crystal display is according to an exemplary embodiment of the present invention includes a substrate and a partition formed on the substrate defining a plurality of openings. A plurality of color filters are formed in the openings. A spacer is formed on the partition and the color filters and the spacer are formed through Inkjet printing.
The partition is a light blocking member. Both circumferences of upper portion and lower portion are larger than that of center portion. The partition may be formed on the first insulating substrate and the color filter may be formed on the first insulating substrate.
A display panel is made of two insulating substrate. A first insulating is facing
to the second insulating substrate, a liquid crystal layer interposed therebetween. A spacer between the first and the second substrate is formed with the partition in the same process step.
In the display panel, an upper passivation layer is formed on the color filter. A pixel electrode is formed on the upper passivation then. However, the upper passivation layer is formed to the thickness higher than the highest position of the color filter to planarize the surface. On the other hand, a lower passivation layer is formed on the thin film transistor, the gate line and data line.
The present invention will be described more fully hereinafter with reference to the accompanying drawings, in which exemplary embodiments of the invention are shown.
As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention.
In the drawings, the thickness of layers, films, panels, regions, etc., are exaggerated for clarity. Like reference numerals designate like elements throughout the specification. It will be understood that when an element such as a layer, film, region, or substrate is referred to as being “on” another element, it can be directly on the other element or intervening elements may also be present. In contrast, when an element is referred to as being “directly on” another element, there are no intervening elements present.
A thin film transistor with color filter array panel for a liquid crystal display and a liquid crystal display including the same according to an exemplary embodiment of the present invention will be described with reference to
Referring to
Each pixel PX includes a pair of subpixels PXa and PXb. Each subpixel PXa/PXb includes a switching element Qa/Qb, a liquid crystal capacitor Clca/Clcb, and a storage capacitor Csta/Cstb.
Each switching element Qa/Qb is a three-terminal element such as a thin film transistor provided on the lower panel 100, having a control terminal connected to the gate line GL, an input terminal connected to the data line DLa/DLb, and an output terminal connected to is the liquid crystal capacitor Clca/Clcb and the storage capacitor Csta/Cstb.
The liquid crystal capacitor Clca/Clcb uses a subpixel electrode and a common electrode 270 as two terminals. The liquid crystal layer 3 between electrodes 191a/191b and 270 functions as a dielectric material.
The storage capacitor Csta/Cstb serving as an assistant to the liquid crystal capacitor Clca/Clcb is formed as a storage electrode line SL provided on the lower display panel 100 and a subpixel electrode 191a/191b overlap with an insulator interposed therebetween, and a predetermined voltage such as the common voltage Vcom is applied thereto.
It has been determined that a predetermined difference is generated between voltages charged to two liquid crystal capacitors Clca and Clcb. For example, the data voltage applied to the liquid crystal capacitor Clca is less or more than the data voltage applied to the liquid crystal capacitor Clcb. Therefore, when the voltages of the first and second liquid crystal capacitors Clca and Clcb are appropriately adjusted, it is possible to make an image viewed from the side be as similar as possible to an image viewed from the front, and as a result it is possible to improve the side visibility.
Next, a liquid crystal display according to an exemplary embodiment of the present invention will be described in detail with reference to
Referring to
Firstly, the lower panel 100 will be described.
A plurality of gate lines 121 and a plurality of storage electrode lines 131 and 135 are formed on an insulating substrate 110. The gate lines 121 transmit gate signals and substantially extend in the transverse direction. Each gate line 121 includes a plurality of first and second gate electrodes 124a and 124b protruding upward. The storage electrode lines 131 include a stem extending substantially parallel to the gate lines 121, and a plurality of storage electrodes 135 extended from the stem. However, the shapes and arrangement of the storage electrode lines 131 and 135 may be modified in various forms.
A gate insulating layer 140 is formed on the gate lines 121 and the storage electrode lines 131 and 135, and a plurality of semiconductors 154a and 154b preferably made of amorphous or crystallized silicon are formed on the gate insulating layer 140.
A pair of a plurality of ohmic contacts 161a, 161b, 163a, 163b, 165a, and 165b are formed on the first semiconductors 154a and 154b, and the ohmic contacts 161a, 161b, 163a, 163b, 165a, and 165b may be formed of a material such as n+hydrogenated amorphous silicon in which an n-type impurity is doped with a high concentration, or of silicide.
A plurality of a pair of data lines 171a and 171b and a plurality of first and second drain electrodes 175a and 175b are formed on the ohmic contacts 161a, 161b, 163a, 163b, 165a, and 165b, and on the gate insulating layer 140. The data lines 171a and 171b transmit data signals, extend substantially in the longitudinal direction, and cross the gate lines 121 and the is stem of the storage electrode lines 131. Each data line 171a/171b includes a plurality of first/second source electrodes 173a/173b extending toward the first/second gate electrodes 124a/124b and curved with a “U” shape, and the first/second source electrodes 173a/173b are opposite to the first/second drain electrodes 175a/175b with respect to the first/second gate electrodes 124a/124b.
Each of the first and second drain electrodes 175a and 175b starts from one end enclosed by the first source electrode 173a, and extends upward, and the other end of the first and second drain electrodes 175a and 175b may have a wide area for connection with another layer. However, the shapes and arrangement of the first and second drain electrodes 175a and 175b and the data lines 171a and 171b may be modified in various forms.
A first/second gate electrode 124a/124b, a first/second source electrode 173a/173b, and a first/second drain electrode 175a/175b respectively form a first/second thin film transistor (TFT) Qa/Qb along with a first/second semiconductor 154a/154b, and a channel of the first/second thin film transistor Qa/Qb is formed on the first/second semiconductor 154a/154b between the first/second source electrode 173a/173b and the first/second drain electrode 175a/175b.
The ohmic contacts 163b and 165b are interposed only between the underlying semiconductor islands 154a and 154b, and the overlying data lines 171a and 171b and drain electrodes 175a and 175b, and reduce contact resistance between them. The semiconductors 154a and 154b have a portion that is exposed without being covered by the data lines 171a and 171b and the drain electrodes 175a and 175b, and a portion between the source electrodes 173a and 173b and the drain electrodes 175a and 175b.
The ohmic contacts 161a, 161b, 163a, 163b, 165a, and 165b, and the data lines is 171a, 171b, 173a, and 173b and the drain electrodes 175a and 175b have the same plane shape, and have substantially the same plane shape as the semiconductors 154a and 154b except for the exposed portion between the drain electrodes 175a and 175b, and the source electrodes 173a and 173b.
A lower passivation layer 180p preferably made of silicon nitride or silicon oxide is formed on the data lines 171a and 171b, the drain electrodes 175a and 175b, and the exposed portions of the semiconductors 154a and 154b.
Referring to
A partition 361 is formed on the lower passivation layer 180p. The partition 361 includes a light blocking insulating material that absorbs light and is black, thereby having the function as a light blocking member. As shown in
Referencing
Another exemplary pardon shape is shown in
An upper passivation layer 180q is formed on the partition 361 and the color filter 230. The upper passivation layer 180q may be made of an organic material having photosensitivity. Also, the upper passivation layer 180q preferably has a thickness of more than 1.0 μm to reduce the coupling effect between the pixel electrode 191 and the data lines 171a and 171b and to planerize the substrate.
The upper passivation layer 180q, the color filter 230, and the lower passivation layer 180p have a plurality of contact holes 185a and 185b exposing the first and second drain electrodes 175a and 175b. The contact holes 185a and 185b are simultaneously formed in the upper passivation layer 180q, the color filter 230, and the lower passivation layer 180p such that the boundaries forming the contact holes 185a and 185b in the upper passivation layer 180q, the color filter 230, and the lower passivation layer 180p have substantially the same plane shape.
In an exemplary embodiment of the present invention, as shown in
A plurality of pixel electrodes 191 are formed on the upper passivation layer 180q. As shown in
Next, the basic electrode 199 will be described in detail with reference to
The first minute branch 194a obliquely extends from the transverse stem 193 or the longitudinal stem 192 in the upper-left direction, and the second minute branch 194b obliquely extends from the transverse stem 193 or the longitudinal stem 192 in the upper-right direction. Also, the third minute branch 194c obliquely extends from the transverse stem 193 or the longitudinal stem 192 in the lower-left direction, and the fourth minute branch 194d obliquely extends from the transverse stem 193 or the longitudinal stem 192 in the lower-right direction. The first to fourth minute branches 194a-194d form an angle of about 45 degrees or 135 degrees with the gate lines 121 or the transverse stem 193. Also, the minute branches 194a-194d of two neighboring sub-regions Da-Dd may be crossed. Although not shown, the width of the minute branches 194a-194d may become wider close to the transverse stem 193 or the longitudinal stem 192.
Again referring to
Each first/second subpixel electrode 191a/191b is physically and electrically connected to the first/second drain electrode 175a/175b through the contact hole 185a/185b, and receive data voltages from the first/second drain electrode 175a/175b.
A manufacturing method of a thin film transistor with color filter array panel for the above-described liquid crystal display will now be described with reference to
Next, a photosensitive film (not shown) is coated on the data conductive layer, and is exposed and developed by using a slit mask to form a photoresist pattern having different thickness depending on position. Next, the data conductive layer, the doped amorphous silicon layer, and the non-doped amorphous silicon layer are firstly etched by using the photoresist pattern as a mask to form semiconductors 154a and 154b, and the data conductive layer is secondly etched to form data lines 171a and 171b including source electrodes 173a and 173b and drain electrodes 175a and 175b. Next, the exposed amorphous silicon layer is etched by using the source electrodes 173a and 173b and the drain electrode 175a and 175b as an etch mask to form ohmic contact layers 161a, 161b, 163a, 163b, 165a, and 165b as shown in
As shown in
Next, a color filter 230 is formed in a pixel defined by the partition 361 as shown in
As shown in
Pixel electrode including 191a and 191b is formed on the upper passivation layer 180q as shown in
| Number | Date | Country | Kind |
|---|---|---|---|
| 10-2009-0067049 | Jul 2009 | KR | national |
