Claims
- 1. A liquid crystal display device comprising:
a gate electrode, a gate pad and gate links on a substrate, the gate links having gate dummy patterns; a gate insulating film on the gate electrode and the gate link; a semiconductor layer on the gate insulating film; a source electrode, a drain electrode, a data pad and data links on the semiconductor layer; a protective film on the source and drain electrodes and the data link; and a pixel electrode on the protective film.
- 2. The device of claim 1, wherein the gate links and the gate dummy patterns include a same height.
- 3. The device of claim 1, wherein each of the gate links includes the gate electrode, the gate insulation film, the semiconductor layer, and the protective film.
- 4. The device of claim 1, further comprising a sealant on the gate links and the data links.
- 5. The device of claim 1, further comprising data dummy patterns between the data links.
- 6. The device of claim 5, wherein the data links and the data dummy patterns include a same height.
- 7. The device of claim 5, wherein each of the data links includes the source and drain electrodes, the gate insulation film, the semiconductor layer, and the protective film.
- 8. The device of claim 1, wherein the semiconductor layer includes a doped semiconductor layer.
- 9. A method of fabricating a liquid crystal display device, comprising:
forming a gate electrode, a gate pad and gate links on a substrate, the gate links having gate dummy patterns; forming a gate insulating film on the gate electrode and the gate link; forming a semiconductor layer on the gate insulating film; forming a source electrode, a drain electrode, a data pad and data links on the semiconductor layer; forming a protective film on the source and drain electrodes and the data link; and forming a pixel electrode on the protective film.
- 10. The method of claim 9, wherein the gate links and the gate dummy patterns include a same height.
- 11. The method of claim 9, wherein each of the gate links includes the gate electrode, the gate insulation film, the semiconductor layer, and the protective film.
- 12. The method of claim 9, further comprising the step of forming a sealant on the gate links and the data links.
- 13. The method of claim 9, further comprising the step of forming data dummy patterns between the data links.
- 14. The method of claim 13, wherein the data links and the data dummy patterns include a same height.
- 15. The method of claim 13, wherein each of the data links includes the source and drain electrodes, the gate insulation film, the semiconductor layer, and the protective film.
- 16. The method of claim 9, wherein the semiconductor layer includes a doped semiconductor layer.
- 17. A method of fabricating a liquid crystal display device, comprising:
forming a gate electrode, a gate pad and gate links on a substrate, the gate links having gate dummy patterns; forming a gate insulating film a semiconductor layer on the gate electrode and the gate link; forming a source electrode, a drain electrode, a data pad and data links on the semiconductor layer; forming a protective film on the source and drain electrodes and the data link; and patterning the gate insulating film, the semiconductor layer, and the protective film; and forming a pixel electrode on the protective film.
- 18. The method of claim 17, wherein the gate links and the gate dummy patterns include a same height.
- 19. The method of claim 17, wherein each of the gate links includes the gate electrode, the gate insulation film, the semiconductor layer, and the protective film.
- 20. The method of claim 17, further comprising the step of forming a sealant on the gate links and the data links.
- 21. The method of claim 17, further comprising the step of forming data dummy patterns between the data links.
- 22. The method of claim 21, wherein the data links and the data dummy patterns include a same height.
- 23. The method of claim 21, wherein each of the data links includes the source and drain electrodes, the gate insulation film, the semiconductor layer, and the protective film.
- 24. The method of claim 17, wherein the semiconductor layer includes a doped semiconductor layer.
Priority Claims (1)
Number |
Date |
Country |
Kind |
P99-68136 |
Dec 1999 |
KR |
|
Parent Case Info
[0001] This application claims the benefit of Korean Patent Application No. 1999-68136, filed on Dec. 31, 1999, which is hereby incorporated by reference for all purposes as if fully set forth herein.