Patent Application
20070268229
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiment(s) of the invention and along with the description serve to explain the principle of the invention.
In the drawings:
Reference will now be made in detail to the preferred embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers will be used throughout the drawings to refer to the same or like parts.
As shown in
The gate lines 100 and data lines 200, which are included in the liquid crystal panel 400, cross each other. In particular, each data line 200 overlaps with the associated pixel region. The liquid crystal panel 400 also includes thin film transistors (TFTs) 410 each formed at the crossings of the gate lines 100 and data lines 200. A plurality of pixel electrodes 350 are formed in the pixels 300, wherein one pixel electrode 350 is formed in each of two horizontally-adjacent pixel regions. The plurality of pixel electrodes 350 are connected to the TFTs 410, respectively. Two pixels 300 are vertically arranged between the adjacent two gate lines 100.
The TFTs 410 are arranged at opposite sides of the gate line 100 in a zigzag pattern along a gate line 100 and the TFTs 410 in pixels arranged to be vertically adjacent to each other are at opposite sides of each gate line 100 and are connected to the gate line 100 such that they simultaneously receive a scan pulse from the gate line 100. Since the two pixels 300 positioned vertically-adjacent with respect to a single gate line are simultaneously driven by the corresponding gate line 100, the number of the gate lines 100 for a given sized display is reduced by one-half. Accordingly, it is possible to secure a time for sufficiently charging a data voltage via the pixel electrodes 350.
Furthermore, it is possible to reduce the time taken to drive all gate lines 100, and thus, to secure a sufficient liquid crystal response time and a sufficient light source turn-on time.
Because the LCD display device according to the first embodiment of the present invention is configured such that the vertically-adjacent pixels 300 simultaneously are driven by one gate line 100, as described above, the TFTs 410 of the vertically-adjacent pixels 300 are connected to different data lines, for example, data lines 200a and 200b, respectively.
If the TFTs 410 of the vertically-adjacent pixels 300 received data from the same data line while receiving a scan pulse from the same gate line 100, the desired image would not be displayed because the same data would be supplied to the vertically-adjacent two pixels 300.
As a portion the data lines 200a and 200b, in particular, the data lines 200b, overlap with the pixel electrodes 350, particular regions of the pixel electrodes 350 where connecting electrodes are arranged, as will be described hereinafter.
Because the data lines 200 overlap with the pixel electrodes 350, parasitic capacitance is generated therebetween. As a result, the LCD device may exhibit a degradation in picture quality because the data supplied through the data lines 200 may leak, and thus be modulated by the parasitic capacitance.
In accordance with the illustrated embodiment of the present invention, each pixel electrode 350 includes sub-pixel electrodes 350a formed in the pixel regions defined by the gate line 100 and data lines 200, and connecting electrodes 350b each formed between the horizontally-adjacent two sub-pixel electrodes 305a to electrically connect the horizontally-adjacent two sub-pixel electrodes 350a. Each connecting electrode 350b has a width smaller than that of the sub-pixel electrode 350a.
The width of each connecting electrode 350b is made smaller than the width of each sub-pixel electrode 350a to minimize a region A where the connecting electrode 350b overlaps with the data line 200, and thus, to reduce parasitic capacitance.
If the width of the connecting electrode 350b is increased, the parasitic capacitance generated between the connecting electrode 350b and the data line 200 increases and the LCD device may exhibit a degradation in picture quality because the data voltage supplied through the data line 200 may leak, and thus, be modulated by the increased parasitic capacitance.
The timing controller 600 generates a data control signal (DCS), a gate control signal GCS, and a light source control signal (LCS), using a horizontal synchronizing signal Hsync, a vertical synchronizing signal Vsync, a main clock MCLK, and a data enable signal DE provided from a source externally to the liquid crystal display device
The timing controller 600 also re-arranges, or aligns, externally-input source data RGB in the order of R, G, and B data compatible with the field sequential driving system, and then sequentially supplies the aligned R, G, B data to the data driver 210 for every respective sub-frame.
The gate driver 110 sequentially shifts the gate control signal GCS from the timing controller 600 in accordance with gate shift clocks, to supply a scan pulse to each gate line for every sub-frame.
The data driver 210 samples the data supplied from the timing controller 600 in accordance with the data control signal (DCS) from the timing controller 600, converts the sampled data to analog data, and supplies the resultant data to the data lines 200.
In particular, the data driver 210 supplies R data to each data line 200 in the first sub-frame, supplies G data to each data line 200 in the second sub-frame, and supplies B data to each data line 200 in the third sub-frame.
The backlight unit 500 includes an R light source 510 for irradiating R light to the liquid crystal panel 400, a G light source 520 for irradiating G light to the liquid crystal panel 400, and a B light source 530 for irradiating B light to the liquid crystal panel 400. The backlight unit 500 also includes a light source driving circuit 540 for driving the R, G, and B light sources 510, 520, and 530.
The R, G, and B light sources 510, 520, and 530 sequentially irradiate R, G, and B lights to the liquid crystal panel 400 during the sub-divided portions of one frame in response to drive signals from the light source driving circuit.
Each of the light sources 510, 520, and 530 may include a fluorescent lamp or a light emitting diode.
The light source driving circuit 540 sequentially drives the R, G, and B light sources 510, 520, and 530 in every sub-frame in response to a light source control signal (LCS) from the timing controller 600.
For example, in response to the light source control signal LCS, the light source driving circuit 540 may drive the R light source 510 in the first sub-frame after R data has been charged in first pixels and the liquid crystal has responded to the charged R data. In the second sub-frame, the light source driving circuit 540 may drive the G light source 520 after G data has been charged in second pixels and the liquid crystal has responded to the charged G data. In the third sub-frame, the light source driving circuit 540 may drive the B light source 530 after B data has been charged in third pixels and the liquid crystal has responded to the charged B data.
Referring to
In the LCD device according to the second embodiment of the present invention, the liquid crystal panel 400 is configured such that one pixel 300 includes four horizontally-adjacent pixel regions, and a plurality of thin film transistors (TFTs) 410 formed at the crossings of odd gate lines 100 and (4n−3)th and (4n−2)th data lines 200 and the crossings of even gate lines 100 and (4n−1)th and (4n)th data lines 200, where n is a natural number. The TFTs 410 are arranged at opposite sides of the gate line 100 in a zigzag arrangement along with the gate line 100. Two pixels 300 are vertically arranged between the adjacent two gate lines 100.
The TFTs 410 of a first pair of pixels 300 vertically adjacent to each other are arranged at opposite sides of one gate line, namely, a first gate line 100a, and the TFTs 410 of a second pair of vertically adjacent pixels 300c and 300d are at opposite sides of another gate line, namely, a second gate line 100b. The respective TFTs of each the first and second pair of pixels are connected to different data lines 200a, 200b, 200c, and 200d, respectively.
This configuration will be described in more detail. The liquid crystal panel 400 of the LCD device according to the second embodiment of the present invention mainly includes a plurality of first (odd) and second (even) gate lines 100a and 100b. The liquid crystal panel 400 also includes a plurality of first (4n−3)th to fourth (4n)th data lines 200a, 200b, 200c, and 200d arranged to cross the first and second gate lines 100a and 100b, and a plurality of pixels 300 in the pixel regions, wherein one pixel 300 is formed in horizontally-adjacent four pixel regions.
That is, the liquid crystal panel 400 includes a plurality of first pixels 300a that receive a data signal from the first data line 200a through the corresponding TFT 410 in accordance with the scan pulse from the first gate line 100a, a plurality of second pixels 300b that receive a data signal from the second data line 200b through the corresponding TFT 410 in accordance with the scan pulse from the first gate line 100a, a plurality of third pixels 300c that receive a data signal from the third data line 200c through the corresponding TFT 410 in accordance with the scan pulse from the second gate line 100b, and a plurality of fourth pixels 300d that receive a data signal from the fourth data line 200d through the corresponding TFT 410 in accordance with the scan pulse from the second gate line 100b.
Although the number of data lines 200 in the LCD device of the second embodiment increases to double that of the LCD device of the first embodiment, the time taken to drive all gate lines 100 is further reduced by half because the two gate lines 100a and 100b are simultaneously driven. Accordingly, it is possible to secure a time for sufficiently charging data into the pixels 300 even for large LCD devices.
In the LCD device according to the second embodiment of the present invention, the vertically-adjacent pixels 300 are connected to the gate line 100 arranged therebetween so that they simultaneously receive the scan pulse from the gate line 100. Also, a scan pulse is simultaneously supplied to two gate lines 100 in this LCD device. Accordingly, it is possible to supply scan pulses to all gate lines 100 within a time corresponding to one fourth of the time taken to drive all gate lines 100 as for the LCD device of the related art.
Because supplying the scan pulses to all of the gate lines 100 may be completed within a shortened period of time, it is possible to lengthen the turn-on time of the TFTs 410 to sufficiently charge data into the pixels without increasing the size of the TFTs 410.
Although embodiments of the present invention have been described illustrating the case in which a scan pulse is simultaneously supplied to two gate lines 100, it may be possible to simultaneously supply a scan pulse to three, four, or more gate lines 100, as long as the number of data lines 200 is appropriately increased.
As apparent from the above description, the present invention may provide the following effects.
By sharing each gate line between the vertically-adjacent pixels arranged at opposite sides of the gate line, a scan pulse is simultaneously supplied to at least two gate lines so that the time taken to input scan pulses to all gate lines may be reduced. Accordingly, even when a field sequential system is used, it is possible to secure a sufficient data charging time without an increase in the size of TFTs.
In accordance with the reduction in the time taken to input scan pulses to all gate lines, it is also possible to secure a sufficient liquid crystal response time and a sufficient light source turn-on time.
It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the invention. Thus, it is intended that the present invention cover the modifications and variations of this invention provided they come within the scope of the appended claims and their equivalents.
| Number | Date | Country | Kind |
|---|---|---|---|
| 10-2006-0045641 | May 2006 | KR | national |
