Patent Application
20120154366
The present invention relates to an active matrix type liquid crystal display device that uses a switching element such as a thin film transistor.
In recent years, an active matrix type liquid crystal display device that has advantages such as thin-profile, light-weight, low drive voltage, and low power consumption has been widely used as a display panel for various electronic devices such as mobile terminal devices including mobile phones, portable gaming devices, and the like or laptop computers.
A primary part of such an active matrix type liquid crystal display device includes a liquid crystal display panel as a display section that is constituted of a plurality of pixels that are arranged in a matrix, and a driver circuit therefor. In the liquid crystal display panel, a plurality of data signal lines (hereinafter referred to as “source bus lines”) and a plurality of scanning signal lines (hereinafter referred to as “gate bus lines”) are disposed so as to cross each other in a lattice pattern. Further, a plurality of auxiliary capacitance lines are disposed so as to extend in parallel with the plurality of gate bus lines. At each of the intersections of the plurality of source bus lines and the plurality of gate bus lines, one corresponding pixel is provided. The liquid crystal display panel also includes a common electrode (or an opposite electrode) that is commonly disposed for the plurality of pixels arranged in a matrix and that faces pixel electrodes provided in the respective pixels through a liquid crystal layer.
These liquid crystal capacitance C1c and auxiliary capacitance Cs form a pixel capacitance that holds a voltage that indicates a value of a pixel to be formed by each pixel. Also, in each pixel, a parasitic capacitance Cgd1is formed between the pixel electrode 53 for the pixel and the gate bus line 51.
Because of the parasitic capacitance Cgd1 formed between the gate bus line 51 and the pixel electrode 53 in each pixel, when a data signal is applied to the source bus line 50, and when a voltage of a scanning signal is lowered from an ON voltage Vgh of the gate bus line 51 to an OFF voltage Vg1 of the gate bus line 51, a level shift ΔVd caused by the parasitic capacitance Cgd1 is generated in a potential (pixel potential) Vd of the pixel electrode 53. This level shift ΔVd is referred to as “field-through voltage,” “lead-in voltage”, or the like. The feed-through voltage ΔVd is represented by the following formula:
ΔVd=(Vgh−Vg1)·Cgd1/(C1c+Cs+Cgd1) (1)
Such a feed-through voltage ΔVd causes flickering, quality degradation, and the like in a displayed image. Generally, in a liquid crystal display panel driven by TFTs, an asymmetric voltage applied to a liquid crystal layer causes flickering, thereby significantly lowering the display quality. It also causes image burn-in when left uncontrolled for a long period of time.
A liquid crystal display device for solving this problem has been proposed. Specifically, a liquid crystal display device that includes groups of wiring lines arranged in a matrix, a plurality of active elements, and a liquid crystal layer and that is configured such that conductive layers maintained at a prescribed potential are selectively disposed around pixel electrodes provided for the respective pixels has been disclosed. The disclosure describes that according to such a configuration, parasitic capacitances between the pixel electrodes and the gate bus lines can be reduced, and therefore, a swing of a voltage applied to the liquid crystal layer becomes smaller, resulting in the improvement of the picture quality (see Patent Document 1, for example).
Patent Document 1: Japanese Patent Application Laid-Open Publication No. H5-273593
However, the liquid crystal display device described in Patent Document 1 above had a problem in that because the conductive layers need to be disposed around the pixel electrode to reduce the parasitic capacitances, the aperture ratio is reduced by the conductive layer regions, and as a result, the performance of the liquid crystal display device is lowered.
Also, because the conductive layers need to be disposed separately, it caused another problem of making the manufacturing process more complex and increasing the cost.
The present invention was made in view of the above-mentioned problems. It is an object of the present invention to provide a liquid crystal display device that can prevent degradation in display quality caused by flickering without reducing the aperture ratio or increasing the cost.
In order to achieve the above-mentioned object, a liquid crystal display device according to the present invention includes: a plurality of data signal lines; a plurality of scanning signal lines that cross the plurality of data signal lines; a plurality of auxiliary capacitance lines that extend in parallel with the scanning signal lines; a plurality of pixels each including a switching element that turns to an ON state when the scanning signal line is in a selected state and that turns to an OFF state when the scanning signal line is in a non-selected state, and a pixel electrode connected to the data signal line through the switching element, the plurality of pixels being arranged in a matrix so as to correspond to respective intersections of the plurality of data signal lines and the plurality of scanning signal lines, a common electrode disposed so as to face the pixel electrodes, and a liquid crystal layer sandwiched by the pixel electrodes and the common electrode. In the liquid crystal display device according to the present invention, the pixel electrode for a first pixel among the plurality of pixels is disposed in a second pixel that is adjacent to the first pixel, and the scanning signal line disposed in the first pixel and the pixel electrode for the first pixel are disposed apart from each other so as not to overlap in a plan view.
According to this configuration, a parasitic capacitance between the pixel electrode for the first pixel pixel and the scanning new word line disposed in the first pixel can be reduced, allowing for a reduction in a feed-through voltage of the pixel electrode for the first pixel. This makes it possible to prevent degradation of display quality caused by flickering.
The present invention differs from the above-mentioned conventional technique in that there is no need to form conductive layers around the pixel electrodes, and it only requires a modification to wiring lines in the pixels. This makes it possible to prevent degradation of display quality caused by flickering without reducing the aperture ratio or increasing the cost.
The liquid crystal display device according to the present invention may also be configured such that a relationship represented by d1>d2 is satisfied, where d1 is a distance between the scanning signal line disposed in the first pixel and the pixel electrode disposed in the second pixel, and d2 is a distance between the scanning signal line disposed in the first pixel and the pixel electrode disposed in the first pixel.
According to this configuration, the parasitic capacitance between the pixel electrode for the first pixel pixel and the scanning new word line disposed in the first pixel can be reliably reduced. This makes it possible to reliably reduce the feed-through voltage of the pixel electrode for the first pixel.
The liquid crystal display device according to the present invention may also be configured such that the auxiliary capacitance lines are disposed between the pixels, respectively.
Another liquid crystal display device according to the present invention includes: a plurality of data signal lines; a plurality of scanning signal lines that cross the plurality of data signal lines; a plurality of auxiliary capacitance lines that extend in parallel with the scanning signal lines; a plurality of pixels each including a switching element that turns to an ON state when the scanning signal line is in a selected state and that turns to an OFF state when the scanning signal line is in a non-selected state, and a pixel electrode connected to the data signal line through the switching element, the plurality of pixels being arranged in a matrix so as to correspond to respective intersections of the plurality of data signal lines and the plurality of scanning signal lines, a common electrode disposed so as to face the pixel electrodes, and a liquid crystal layer sandwiched by the pixel electrodes and the common electrode. In another liquid crystal display device according to the present invention, the scanning signal lines are disposed between the pixels, respectively, and areas where each scanning signal line overlap the respective pixel electrodes of the two pixels adjacent to the scanning signal line differ from each other in a plan view.
According to this configuration, a parasitic capacitance between the pixel electrode of the first pixel pixel and the scanning new word line disposed for the first pixel can be reduced, allowing for the reduction in a feed-through voltage of the pixel electrode for the first pixel. This makes it possible to prevent degradation of display quality caused by flickering.
The present invention differs from the above-mentioned conventional technique in that there is no need to provide conductive layers around the pixel electrodes, and it only requires a modification to wiring lines in the pixels. This makes it possible to prevent degradation of display quality caused by flickering without reducing the aperture ratio or increasing the cost.
Another liquid crystal display device according to the present invention may also be configured such that a relationship represented by S1<S2 is satisfied, where S 1 is an area where the scanning signal line disposed for a first pixel among the plurality of pixels overlaps the pixel electrode disposed in the first pixel, and S2 is an area where the scanning signal line disposed for the first pixel overlaps the pixel electrode disposed in a second pixel adjacent to the first pixel.
According to this configuration, the parasitic capacitance between the pixel electrode for the first pixel pixel and the scanning new word line disposed for the first pixel can be reliably reduced. This makes it possible to reliably reduce the feed-through voltage of the pixel electrode of the first pixel.
According to the present invention, because the feed-through voltage of the pixel electrode can be reduced, degradation of display quality caused by flickering can be prevented. Also, degradation of display quality caused by flickering can be prevented without reducing the aperture ratio or increasing the cost.
Embodiments of the present invention will be explained below in detail with reference to figures. It should be noted that the present invention is not limited to such embodiments.
As shown in
This sealing material 40 is formed so as to enclose the liquid crystal layer 4, and the TFT substrate 2 and the CF substrate 3 are bonded to each other through this sealing material 40. The liquid crystal display device 1 is provided with a plurality of photo spacers (not shown) for controlling a thickness of the liquid crystal layer 4 (that is, a cell gap).
As shown in
In the liquid crystal display device 1, a display region D that displays an image is defined in a region where the TFT substrate 2 and the CF substrate 3 overlap. The display region D is constituted of a plurality of pixels arranged in a matrix. Each pixel is the smallest unit of picture.
As shown in
As shown in
Thin film transistors (TFTs) 5 are provided as switching elements. In each of the TFTs 5, the gate is connected to the gate bus line 11 near an intersection of the two signal lines, the source is connected to the source bus line 14 near the same intersection, and the drain is connected to a pixel electrode 19. The TFT 5 turns to an ON state when the gate bus line 11 is in a selected state, and turns to an OFF state when the gate bus line 11 is in a non-selected state.
The pixel electrodes 19 disposed in the respective plurality of pixels 30 to 32 are connected to the source bus lines 14 through the TFTs 5, respectively. A common electrode (opposite electrode) 24 is arranged so as to face these pixel electrodes 19. A liquid crystal layer 4 as a display medium layer is sandwiched by the pixel electrodes 19 and the common electrode 24, forming liquid crystal capacitances C1c, respectively. A plurality of auxiliary capacitance lines 29 are formed so as to extend in parallel with the plurality of gate bus lines 11, and an auxiliary capacitance Cs is formed in parallel with the liquid crystal capacitance C1c. In this embodiment, as shown in
Although
As shown in
As shown in
As shown in
The above-mentioned reflective region R may not necessarily be defined, and a configuration where only the transmissive region T is defined may also be employed.
As shown in
The transflective liquid crystal display device 1 having the above-mentioned configuration is configured such that, in the reflective region R, light entering from the CF substrate 3 side reflects off the reflective electrode 35, and in the transmissive region T, light from a backlight (not shown) entering from the TFT substrate 2 side passes through.
In the liquid crystal display device 1, display signals (data signals) corresponding to display states of the respective pixels 30 to 32 are provided to the source bus lines 14 by a not-shown data signal line driver mean (source driver). Also, in the liquid crystal display device 1, scanning signals (gate signals) that turn the TFTs 5 on or off are provided to the gate bus lines 11 by a not-shown scanning signal line driver mean (gate driver).
The liquid crystal display device 1 is configured as follows: in the pixels 30 to 32 provided with the respective pixel electrodes 19, when the TFTs 5 are turned to the ON state by the gate signals sent from the gate bus lines 11, the data signals from the source bus lines 14 are sent to the pixel electrodes 19 through the source electrodes 18 and the drain electrodes 20, thereby writing a prescribed electrical charge in the pixel electrodes 19. This creates a difference in potential between the pixel electrodes 19 and the common electrode 24, and as a result, a prescribed voltage is applied to the liquid crystal layer 4. The orientation state of the liquid crystal molecules is changed in accordance with an amount of the applied voltage, and by utilizing such characteristics, the liquid crystal display device 1 adjusts the transmittance of incoming light from the backlight, and therefore displays images.
In this embodiment, as shown in
In a manner similar to above, the pixel electrode 19b for the pixel 32 is disposed in the pixel 31 that is another pixel adjacent to the pixel 32, and the gate bus line 11c disposed in the pixel 32 and the pixel electrode 19b for the pixel 32 that is disposed in the pixel 31 are arranged apart from each other so as not to overlap in a plan view.
In this case, as shown in
That is, in the pixel 31, when the data signal is applied to the source bus line 14, and when the voltage of the scanning signal lowers from the ON voltage Vgh of the gate bus line 11b to the OFF voltage Vg1 of the gate bus line 11b, the parasitic capacitance Cgd2 between the pixel electrode 19b disposed in the pixel 31 and the gate bus line 11b is increased. However, as described above, because the gate bus line 11b disposed in the pixel 31 and the pixel electrode 19a for the pixel 31 are arranged apart from each other so as not to overlap in a plan view, the parasitic capacitance Cgd2 has no effect on the pixel 31, and it allows for the reduction in the parasitic capacitance Cgd1.
The parasitic capacitance Cgd1 is reduced with increase in the parasitic capacitance Cgd2. This is because, as shown in
Generally, an electrostatic capacitance can be represented by εS/d (ε: electrostatic capacitance, S: area where gate bus line and pixel electrode overlap, and d: distance between gate bus line and pixel electrode), and therefore, the parasitic capacitance Cgd1 between the pixel electrode 19a for the pixel 31 and the gate bus line 11b (that is, εS/d1) becomes smaller than the parasitic capacitance Cgd2 between the pixel electrode 19b disposed in the pixel 31 and the gate bus line 11b (that is, εS/d2).
In this case, the feed-through voltage ΔVd of the pixel electrode 19a is represented by the following formula:
ΔVd=(Vgh−Vg1)·Cgd1/(C1c+Cs+Cgd1+Cgd2) (2)
Thus, as described above, even though the parasitic capacitance Cgd2 is increased, the parasitic capacitance Cgd1 is reduced, and therefore, from Formula (2) above, it is possible to reduce the feed-through voltage ΔVd of the pixel electrode 19a for the pixel 31. As a result, it becomes possible to prevent degradation of display quality caused by flickering.
That is, by satisfying the above-mentioned condition d1>d2, the parasitic capacitance Cgd1 can be reduced reliably, which makes it possible to reliably reduce the feed-through voltage ΔVd of the pixel electrode 19a for the pixel 31.
The present invention differs from the above-mentioned conventional technique in that there is no need to provide conductive layers around the pixel electrodes, and it only requires a modification to wiring lines in the pixels. This makes it possible to prevent degradation of display quality caused by flickering without reducing the aperture ratio or increasing the cost.
As shown in
Next, Embodiment 2 of the present invention will be explained. An overall configuration of a liquid crystal display device and an overall configuration of a TFT substrate are similar to those described in Embodiment 1 above, and therefore, the detailed explanations thereof will be omitted. Also, the same reference characters will be given to the same constituting elements as those in Embodiment 1 above, and the explanations thereof will be omitted.
This embodiment differs from Embodiment 1 above in that, as shown in
Specifically, as shown in
As described above, generally, the electrostatic capacitance can be represented by εS/d, and therefore, the parasitic capacitance Cgd1 between the pixel electrode 19b of the pixel 31 and the gate bus line 11b (that is, εS 1/d) becomes smaller than the parasitic capacitance Cgd2 between the pixel electrode 19c of the pixel 32 and the gate bus line 11b (that is, εS2/d).
That is, in a manner similar to Embodiment 1 above, as shown in
That is, in the pixel 31, when the data signal is applied to the source bus line 14, and when the voltage of the scanning signal lowers from the ON voltage Vgh of the gate bus line 11b to the OFF voltage Vg1 of the gate bus line 11b, the parasitic capacitance Cgd2 between the pixel electrode 19c of the pixel 32 that is another pixel and the gate bus line 11b is increased. However, this parasitic capacitance Cgd2 has no effect on the pixel 31, and it allows for the reduction in the parasitic capacitance Cgd1.
Thus, as described above, even though the parasitic capacitance Cgd2 is increased, the parasitic capacitance Cgd1 is reduced, and therefore, from Formula (2) above, it is possible to reduce the feed-through voltage ΔVd of the pixel electrode 19b. As a result, it becomes possible to prevent degradation of display quality caused by flickering.
That is, by satisfying the above-mentioned condition S1<S2, the parasitic capacitance Cgd1 can be reduced reliably, which makes it possible to reliably reduce the feed-through voltage ΔVd of the pixel electrode 19b of the pixel 31.
The present invention differs from the above-mentioned conventional technique in that there is no need to provide conductive layers around the pixel electrodes, and it only requires a modification to wiring lines in the pixels. This makes it possible to prevent degradation of display quality caused by flickering without reducing the aperture ratio or increasing the cost.
As shown in
An application example of the present invention includes an active matrix type liquid crystal display device that uses switching elements such as thin film transistors.
1 liquid crystal display device
2 TFT substrate
3 CF substrate
4 liquid crystal layer
5 TFT (switching element)
11 gate bus line (scanning signal line)
14 source bus line (data signal line)
19 pixel electrode
24 common electrode
29 auxiliary capacitance line
30 to 32 pixels
d1 distance between pixel electrode and gate bus line
d2 distance between pixel electrode and gate bus line
S1 area where gate bus line and pixel electrode overlap
S2 area where gate bus line and pixel electrode overlap
| Number | Date | Country | Kind |
|---|---|---|---|
| 2009-226182 | Sep 2009 | JP | national |
| Filing Document | Filing Date | Country | Kind | 371c Date |
|---|---|---|---|---|
| PCT/JP2010/003081 | 4/30/2010 | WO | 00 | 3/1/2012 |
