Claims
- 1. A liquid crystal display comprising:a first insulating substrate as an array substrate; display pixels formed in such a manner as to be arranged in array like shape on the first insulating substrate; a second insulating substrate as a counter substrate on which common electrodes are formed; a liquid crystal layer interposed between the first insulating substrate and the second insulating substrate, the first insulating substrate and the second insulating substrate being bonded to each other; a first metal film formed on the first insulating substrate for a gate electrode pattern; a first insulating film formed after the first metal film; a second metal film formed after the first insulating film for a source/drain electrode pattern; a second insulating film formed after the second metal film; a transparent conductive thin film formed after the second insulating film for a pixel electrode pattern; and a transfer electrode formed of a same transparent conductive thin film for the pixel electrode pattern, said transfer electrode transfers a common electrical potential to a common electrode on the second insulating substrate through a conductive material interposed therebetween, wherein the transfer electrode is connected to a pattern of said first metal film supplied with the common electrical potential through a contact hole or through a direct contact in a periphery portion of the transfer electrode, and a center portion of the transfer electrode is formed directly on the first insulating substrate and the center portion of the transfer electrode is in contact with the conductive material, and wherein a distance between said center portion of said transfer electrode and said common electrodes is larger than a distance between said periphery portion of said transfer electrode and said common electrodes.
- 2. A liquid crystal display comprising:a first insulating substrate as an array substrate; a second insulating substrate as an opposite substrate having a common electrode; a liquid crystal layer interposed between the first and second insulating substrates; a first metal film formed on the first insulating substrate as a gate electrode pattern; a first insulating film covering the first metal film; a thin film transistor formed of said gate electrode pattern, said first insulating film, a semiconductor pattern layered on the first insulating film, an n-type semiconductor pattern layered on the semiconductor pattern, and a second metal film as a source/drain electrode pattern layered on the n-type semiconductor pattern; a second insulating film layered on the source/drain electrode pattern; a conductive thin film formed on the second insulating film; a pixel electrode pattern formed of the conductive thin film connected to said source/drain electrode pattern by forming a contact hole through said second insulating film; and a transfer electrode pattern separately formed of the same conductive thin film for the pixel electrode pattern supplying a common electrical potential to the common electrode on the second insulating substrate through a conductive material, wherein a pattern having a common electric potential formed of said first metal film and the transfer electrode are connected to each other on the periphery of the transfer electrode through a contact hole or through a direct contact, and a center portion of the transfer electrode is formed by directly forming the conductive thin film on the first insulating substrate, and wherein a distance between said center portion of said transfer electrode and said common electrodes is larger than a distance between said periphery portion of said transfer electrode and said electrodes.
Priority Claims (2)
Number |
Date |
Country |
Kind |
11-167872 |
Jun 1999 |
JP |
|
11-266956 |
Sep 1999 |
JP |
|
CROSS-REFERENCE TO RELATED APPLICATION
This application is a Divisional of U.S. patent application Ser. No. 09/592,587, filed Jun. 12, 2000 now U.S. Pat No. 6,690,442, and claims priority to Japanese Patent Applications No. 11-167872, filed Jun. 15, 1999, and No. 11-266956, filed Sep. 21, 1999. The contents of these applications are incorporated herein by reference in their entirety.
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