Patent Application
20250237915
The present disclosure relates to a liquid crystal display panel and a manufacturing method thereof, a display substrate, and a display device.
With the development of display technology, a user has higher and higher requirements for the display effect of a liquid crystal display panel.
In the related art, by increasing a refresh rate of the liquid crystal display panel, the definition and stability of the display image can be improved to reduce the adverse effect on the user's eyes.
According to an aspect of the embodiment of the present disclosure, provided is a liquid crystal display panel. The liquid crystal display panel comprises: a first base substrate comprising a display area and a peripheral area surrounding the display area; a common electrode line located at the peripheral area and configured to provide a common voltage; a common electrode connected to the common electrode line; and a metal line connected to the common electrode line and connected in parallel with the common electrode, wherein a sheet resistance of the metal line is less than a sheet resistance of the common electrode.
In some embodiments, the metal line is at least partially located at the display area.
In some embodiments, the liquid crystal display panel comprises a signal line, the signal line being one of a data line and a gate line; and the metal line comprises a first portion located at the display area, and the signal line comprises a second portion located at the display area, wherein an orthographic projection of the first portion on the first base substrate is located within an orthographic projection of the second portion on the first base substrate.
In some embodiments, the metal line further comprises a third portion located at the display area and connected to the first portion, and one area of a plurality of areas where orthographic projections of one data line and one gate line in the liquid crystal display panel on the first base substrate overlap is located within an orthographic projection of the third portion on the first base substrate.
In some embodiments, the liquid crystal display panel comprises a first group of metal lines and a second group of metal lines crossed with the first group of metal lines, and the first group of metal lines and the second group of metal lines each comprise a plurality of metal lines respectively.
In some embodiments, an orthographic projection of a first portion of each of the first group of metal lines located at the display area on the first base substrate is located within an orthographic projection of a second portion of a corresponding data line in the liquid crystal display panel located at the display area on the first base substrate; and an orthographic projection of a first portion of each of the second group of metal lines located at the display area on the first base substrate is located within an orthographic projection of a second portion of a corresponding gate line in the liquid crystal display panel located at the display area on the first base substrate.
In some embodiments, the plurality of metal lines in the first group of metal lines is in one-to-one correspondence with a plurality of data lines in the liquid crystal display panel; and the plurality of metal lines in the second group of metal lines is in one-to-one correspondence with a plurality of gate lines in the liquid crystal display panel.
In some embodiments, the metal line is in contact with the common electrode line.
In some embodiments, a surface of the metal line close to the common electrode is in contact with a surface of the common electrode close to the metal line.
In some embodiments, one of the metal line and the common electrode is located between the first base substrate and the other of the metal line and the common electrode.
In some embodiments, the sheet resistance of the metal line is greater than 0 and less than or equal to 0.075 Ω/□.
In some embodiments, a ratio of the sheet resistance of the common electrode to the sheet resistance of the metal line is greater than or equal to 500.
In some embodiments, an elastic constant of liquid crystal in the liquid crystal display panel at 50° C. is greater than or equal to 13.5.
In some embodiments, an elastic constant of liquid crystal in the liquid crystal display panel at 25° C. is greater than or equal to 17.
In some embodiments, the elastic constant is an average value of a splay elastic constant, a bend elastic constant and a twist elastic constant of the liquid crystal.
In some embodiments, the liquid crystal display panel further comprises: a pixel electrode, wherein a viscosity of a material of the pixel electrode is greater than 3 mPa·s and less than or equal to 5 mPa·s.
According to another aspect of the embodiments of the present disclosure, provided is a display substrate for a liquid crystal display panel, wherein the display substrate is one of an array substrate and a color film substrate. The display substrate comprises: a first base substrate comprising a display area and a peripheral area surrounding the display area; a common electrode line located at the peripheral area and configured to provide a common voltage; a common electrode connected to the common electrode line; and a metal line connected to the common electrode line and connected in parallel with the common electrode, wherein a sheet resistance of the metal line is less than a sheet resistance of the common electrode.
In some embodiments, the display substrate is the array substrate comprising a signal line, the signal line being one of a data line and a gate line; and the metal line comprises a first portion located at the display area, and the signal line comprises a second portion located at the display area, wherein an orthographic projection of the first portion on the first base substrate is located within an orthographic projection of the second portion on the first base substrate.
In some embodiments, the display substrate comprises a first group of metal lines and a second group of metal lines crossed with the first group of metal lines, and the first group of metal lines and the second group of metal lines each comprise a plurality of metal lines respectively.
In some embodiments, the display substrate is the array substrate, wherein: an orthographic projection of each of the first group of metal lines located at the display area on the first base substrate is located within an orthographic projection of a corresponding data line in the liquid crystal display panel located at the display area on the first base substrate; and an orthographic projection of each of the second group of metal lines located at the display area on the first base substrate is located within an orthographic projection of a corresponding gate line in the liquid crystal display panel located at the display area on the first base substrate.
In some embodiments, an orthographic projection of a first portion of each of the first group of metal lines located at the display area on the first base substrate is located within an orthographic projection of a second portion of a corresponding data line in the liquid crystal display panel located at the display area on the first base substrate; and an orthographic projection of a first portion of each of the second group of metal lines located at the display area on the first base substrate is located within an orthographic projection of a second portion of a corresponding gate line in the liquid crystal display panel located at the display area on the first base substrate.
In some embodiments, the display substrate is the array substrate, and a viscosity of a material of a pixel electrode in the array substrate is greater than 3 mPa·s and less than or equal to 5 mPa·s.
According to still another aspect of the embodiments of the present disclosure, provided is a display device. The display device comprises: the liquid crystal display panel according to any of the above embodiments; or the display substrate for a liquid crystal display panel any of the above embodiments.
According to yet still another aspect of the embodiments of the present disclosure, provided is a manufacturing method of a liquid crystal display panel. The manufacturing method comprises: providing a first base substrate, wherein the first base substrate comprises a display area and a peripheral area surrounding the display area; forming a common electrode line located at the peripheral area, wherein the common electrode line is configured to provide a common voltage; and forming a common electrode and a metal line which are connected to the common electrode line respectively, wherein the metal line is connected in parallel with the common electrode, and a sheet resistance of the metal line is less than a sheet resistance of the common electrode.
In some embodiments, the manufacturing method further comprises: forming a first insulating layer in contact with the common electrode on one side of the common electrode away from the first base substrate, wherein a pressure applied during a process of forming the first insulating layer is greater than or equal to 1.2 torr and less than 1.5 torr; and forming a pixel electrode in contact with the first insulating layer on one side of the first insulating layer away from the first base substrate.
In some embodiments, the manufacturing method further comprises forming a pixel electrode, wherein a viscosity of a material of the pixel electrode is greater than 3 mPa·s and less than or equal to 5 mPa·s.
In some embodiments, forming the pixel electrode comprises forming a pixel electrode material layer; and etching the pixel electrode material layer with an etching solution to form the pixel electrode, wherein a service life of the etching solution is greater than 0 and less than or equal to 5000 mins.
In some embodiments, a duration of the etching is greater than or equal to 160 seconds and less than or equal to 180 seconds.
In some embodiments, the manufacturing method further comprises forming a pixel driving circuit comprising a driving transistor, wherein forming the driving transistor comprises: forming a gate of the driving transistor; forming an electrode material layer; aligning a mask plate by using each alignment mark of the mask plate; and patterning, after the aligning, the electrode material layer by using the mask plate to form a source and a drain of the driving transistor.
According to a further aspect of the embodiments of the present disclosure, provided is a liquid crystal display panel. The liquid crystal display panel comprises: a first base substrate comprising a display area and a peripheral area surrounding the display area; a common electrode line located at the peripheral area and configured to provide a common voltage; and a common electrode connected to the common electrode line, wherein the liquid crystal display panel satisfies at least one of a first condition, a second condition or a third condition. The first condition comprises: the liquid crystal display panel comprises a metal line, wherein the metal line is connected to the common electrode wire and connected in parallel with the common electrode, and a sheet resistance of the metal line is less than a sheet resistance of the common electrode; the second condition comprises: an elastic constant of liquid crystal in the liquid crystal display panel at 50° C. is greater than or equal to 13.5; and the third condition comprises: a viscosity of a material of a pixel electrode in the liquid crystal display panel is greater than 3 mPa·s and less than or equal to 5 mPa·s.
The accompanying drawings which constitute a part of this specification, describe the embodiments of the present disclosure, and together with this specification, serve to explain the principles of the present disclosure.
The present disclosure may be more explicitly understood from the following detailed description with reference to the accompanying drawings, in which:
It should be appreciated that, the same or similar reference numerals refer to the same or similar components.
Various exemplary embodiments of the present disclosure will now be described in detail with reference to the accompanying drawings. The following description of the exemplary embodiments is merely illustrative and is in no way intended as a limitation to the present disclosure, its application or use. The present disclosure may be implemented in many different forms, which are not limited to the embodiments described herein. These embodiments are provided to make the present disclosure thorough and complete, and fully convey the scope of the present disclosure to those skilled in the art. It should be noticed that: relative arrangement of components and steps, material composition, numerical expressions, and numerical values set forth in these embodiments, unless specifically stated otherwise, should be explained as merely illustrative, and not as a limitation.
The use of the terms “first”, “second” and similar words in the present disclosure do not denote any order, quantity, or importance, but are merely used to distinguish between different parts. A word such as “comprise”, “have” or variants thereof means that the element before the word covers the element(s) listed after the word without excluding the possibility of also covering other elements. The terms “up”, “down”, or the like are used only to represent a relative positional relationship, and the relative positional relationship may be changed correspondingly if the absolute position of the described object changes.
In the present disclosure, when it is described that a specific component is disposed between a first component and a second component, there may be an intervening component between the specific component and the first component or between the specific component and the second component. When it is described that a specific part is connected to other parts, the specific part may be directly connected to the other parts without an intervening part, or not directly connected to the other parts with an intervening part.
Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meanings as the meanings commonly understood by one of ordinary skill in the art to which the present disclosure belongs. It should also be understood that terms as defined in general dictionaries, unless explicitly defined herein, should be interpreted as having meanings that are consistent with their meanings in the context of the relevant art, and not to be interpreted in an idealized or extremely formalized sense.
Techniques, methods, and apparatus known to those of ordinary skill in the relevant art may not be discussed in detail, but where appropriate, these techniques, methods, and apparatuses should be considered as part of this specification.
The lower the refresh rate of the liquid crystal display panel is, the poorer the display effect will be. Specifically, the lower the refresh rate is, the more serious the flicker phenomenon of the display image of the liquid crystal display panel will be, which is likely to cause unpleasant experiences of a user such as visual fatigue or dizziness.
The inventors have noticed that, although the manner in the related art can enhance the display effect of the liquid crystal display panel by increasing the screen refresh rate, this will lead to increased power consumption of the liquid crystal display panel, thereby affecting the service life of the liquid crystal display panel.
In view of the above, the embodiments of the present disclosure provide the following technical solutions, which can incorporate the display effect and power consumption of the liquid crystal display panel, thereby enhancing the display effect of the liquid crystal display panel on the premise of a low power consumption.
As shown in
The inventors have found through analysis that, the common voltage applied to the common electrode might deviate from an expected value, and if the common voltage is more stable or more easily to rebound to the expected value, it will help to alleviate the flicker problem of the liquid crystal display panel. In view showing this, the embodiments of the present disclosure provide the following technical solutions.
As shown in
In some embodiments, the first base substrate 11, the common electrode line 12, the common electrode 13 and the metal line 14 are located in the array substrate of the liquid crystal display panel. In other embodiments, the first base substrate 11, the common electrode line 12, the common electrode 13 and the metal line 14 are located in the color film substrate of the liquid crystal display panel.
First, the first base substrate 11 and the common electrode line 12 will be described in conjunction with
Referring to
Referring to
Next, the common electrode 13 and the metal line 14 will be introduced in conjunction with
Referring to
Referring to
In the above embodiments, the liquid crystal display panel comprises the metal line 14 connected to the common electrode line 12 and connected in parallel with the common electrode 13, and the sheet resistance of the common electrode 13 and the parallel metal line 14 as a whole is less than that of the common electrode 13, thereby reducing the sheet resistance of the wiring of the common voltage. With this structure, on one hand, it is not easy for the common voltage to deviate from an expected value; on the other hand, even if the common voltage deviates from the expected value, it is also easier for the common voltage to rebound to the expected value. In this way, it is helpful to improve the stability and rebound resilience of the common voltage, thereby alleviating the flicker problem of the liquid crystal display panel to enhance the display effect of the liquid crystal display panel.
Some embodiments in which the display effect of the liquid crystal display panel can be further improved will be introduced below.
In some embodiments, the sheet resistance of the metal line 14 is less than or equal to 0.075Ω/□. For example, the sheet resistance of the structure in which the metal line 14 and the common electrode 13 are connected in parallel is 0.0749Ω/□.
In other embodiments, the ratio of the sheet resistance of the common electrode 13 to that of the metal line 14 is greater than or equal to 500. For example, the ratio of the sheet resistance of the common electrode 13 to that of the metal line 14 is greater than or equal to 520; for another example, the ratio of the sheet resistance of the common electrode 13 to that of the metal line 14 is greater than or equal to 530, for example, the ratio is 533, 535, 550, or the like.
With the structure of the above embodiments, it is helpful to further improve the stability and rebound resilience of the common voltage, thereby further alleviating the flicker problem of the liquid crystal display panel to further enhance the display effect of the liquid crystal display panel.
In some embodiments, the metal line 14 is at least partially located at the display area 111. For example, a part of the metal line 14 is located at the display area 111, and the other part is located at the peripheral area 112. In this way, it is helpful to improve the display uniformity of the liquid crystal display panel on the basis of alleviating the flicker problem of the liquid crystal display panel, to further enhance the display effect of the liquid crystal display panel.
In addition, to reduce the influence of the metal line 14 on the pixel aperture ratio of the liquid crystal display panel, the embodiments of the present disclosure also provide the following technical solutions.
The liquid crystal display panel comprises a signal line SL configured to provide a signal to a sub-pixel in the liquid crystal display panel. As some implementations, the signal line SL is one of a data line DL and a gate line GL.
As shown in
In some embodiments, referring to
For example, the edge of the orthographic projection of the first portion P1 of the metal line 14 on the first base substrate 11 completely overlaps with the edge of the orthographic projection of the second portion P2 of the signal line SL on the first base substrate 11; and for another example, the area of the orthogonal projection of the metal line 14 on the first base substrate 11 is less than the area of the orthogonal projection of the second portion P2 of the signal line SL on the first base substrate 11. As examples, the line width (which may be understood as the size of the data line DL in a direction perpendicular to an extension direction of the data line DL) of the data line DL is about 4 microns, and the line width of the first portion P1 of the metal line 14 is less than 4 microns.
In some embodiments, referring to
For example, as shown in
For example, as shown in
In some embodiments, the length of the first portion P1 in an extension direction of the metal line 14 is greater than the length of the third portion P3 in the extension direction of the metal line 14. For example, in one metal line 14, the sum of the lengths of all the first portions P1 in the extension direction of the metal line 14 is greater than the sum of the lengths of all the third portions P3 in the extension direction of the metal line 14. In other words, most part of the orthographic projection of the metal line 14 on the first base substrate 11 is located within the orthographic projection of the signal line SL on the first base substrate 11, and only a small part of the orthographic projection of the metal line 14 on the first base substrate 11 is located beyond the orthographic projection of the signal line SL on the first base substrate 11. In this way, the space occupied by the metal lines 14 in the display area 111 can be reduced as much as possible.
In some embodiments, the orthographic projection of a portion of the metal line 14 located at the peripheral area 112 on the first base substrate 11 is located within the orthographic projection of a portion of the signal line SL located at the peripheral area 112 on the first base substrate 11. In this way, the portion of the metal line 14 located at the peripheral area 112 does not need to occupy the space of the peripheral area 112, thereby further reducing the adverse effect of the metal line 14 on the liquid crystal display panel.
As shown in
As some implementations, each metal line 14 among the first group of metal lines 14A and any metal line 14 among the second group of metal lines 14B are crossed and integrally provided, and each metal line 14 among the second group of metal lines 14B and any metal line 14 among the first group of metal lines 14A are crossed and integrally provided.
As some implementations, the extension direction of the first group of metal lines 14A is perpendicular to that of the first group of metal lines 14B. For example, the extension direction of the first group of metal lines 14A is the same as that of the data line DL;
and the extension direction of the second group of metal lines 14B is the same as that of the gate line GL.
In the above embodiments, the liquid crystal display panel comprises a plurality of groups of metal lines crossed with each other, and each metal line among each group of metal lines is connected to the common electrode line 12 and connected in parallel with the common electrode 13. Such a mesh structure is helpful to further reduce the sheet resistance of the wiring of the common voltage, thereby further alleviating the flicker problem of the liquid crystal display panel to enhance the display effect of the liquid crystal display panel.
As shown in
In this way, the first portion P1 of the metal line 14 among each group of metal lines located at the display area 111 does not need to occupy the space of the display area 111, thereby further reducing the adverse effect of the metal line 14 on the liquid crystal display panel.
In some embodiments, the metal line 14 among each group of metal lines further comprises a third portion P3. For example, the third portion P3 of a metal line 14 among the first group of metal lines 14A may be multiplexed as the third portion P3 of a metal line 14 among the second group of metal lines 14B.
In some embodiments, the plurality of metal lines 14 among the first group of metal lines 14A is in one-to-one correspondence with the plurality of data lines DL in the liquid crystal display panel. In other words, the number of metal lines 14 among the first group of metal lines 14A is the same as the number of data lines DL in the liquid crystal display panel. In this way, the metal lines 14 not needing to occupy other space can be arranged by using the data lines DL in the liquid crystal display panel, thereby effectively reducing the adverse effect of the metal line 14 on the liquid crystal display panel.
In other embodiments, the plurality of metal lines 14 among the second group of metal lines 14B is in one-to-one correspondence with the plurality of gate lines GL in the liquid crystal display panel. In other words, the number of metal lines 14 among the second group of metal lines 14B is the same as the number of gate lines GL in the liquid crystal display panel. In this way, the metal lines 14 not needing to occupy other space can be arranged by using the gate lines GL in the liquid crystal display panel metal lines 14, thereby effectively reducing the adverse effects of the metal line 14 on the liquid crystal display panel.
In still other embodiments, the plurality of metal lines 14 among the first group of metal lines 14A is in one-to-one correspondence with the plurality of data lines DL in the liquid crystal display panel, and the plurality of metal lines 14 among the second group of metal lines 14B is in one-to-one correspondence with the plurality of gate lines GL in the liquid crystal display panel. In this way, the metal lines 14 not needing to occupy other space can be arranged by using the data lines DL and the gate lines GL in the liquid crystal display panel, thereby effectively reducing the adverse effect of the metal line 14 on the liquid crystal display panel.
In some embodiments, the liquid crystal display panel comprises one group of metal lines of the first group of metal lines 14A and the second group of metal lines 14B. For example, the liquid crystal display panel comprises only the first group of metal lines 14A; for another example, the liquid crystal display panel comprises only the second group of metal lines 14B. In other embodiments, the liquid crystal display panel comprises the first group of metal lines 14A and the second group of metal lines 14B.
In the following, some implementations of the material of the metal line 14 will be introduced in conjunction with some embodiments.
In some embodiments, the material of the metal line 14 is the same as that of the signal line SL. For example, the material of the metal line 14 is the same as that of the data line DL; for another example, the material of the metal line 14 is the same as that of the gate line GL; for another example, the materials of some metal lines 14 is the same as that of the data line DL, and the materials of other metal lines 14 is the same as that of the gate line GL.
In some embodiments, the material of the metal line 14 is different from that of the common electrode 13. For example, the material of the common electrode 13 is indium tin oxide (ITO); for example, the material of the metal line 14 is copper or aluminum.
In
A second insulating layer PVX2 and a third insulating layer IL are provided between the common electrode 13 and the data line DL, the second insulating layer PVX2 covers the data line DL, and the third insulating layer IL is located between the second insulating layer PVX2 and the common electrode 13. As some implementations, the second insulating layer PVX2 is an inorganic insulating layer; for example, the material of the second insulating layer PVX1 comprises an inorganic material such as silicon oxide (for example, SiOx). As some implementations, the third insulating layer IL is an organic insulating layer; for example, the material of the third insulating layer IL comprises an organic material such as organic polymers.
A fourth insulating layer GI is provided between the data line DL and the first base substrate 11. For example, the material of the fourth insulating layer GI comprises silicon nitride, silicon oxide or silicon oxynitride.
It should be understood that, other layers, such as a buffer layer, may be provided between the first base substrate 11 and the fourth insulating layer GI.
Next, the connection method and positional relationship between the metal line 14 and the common electrode 13 will be described in conjunction with
First, the connection method between the metal line 14 and the common electrode 13 will be introduced.
In some embodiments, an insulating layer (not shown) is provided between the metal line 14 and the common electrode 13, and an end of the metal line 14 is connected to (for example, in contact with) the common electrode 13, thereby realizing parallel connection between the metal line 14 and the common electrode 1312.
In other embodiments, as shown in
Next, the positional relationship between the metal line 14 and the common electrode 13 will be introduced.
As shown in
As some implementations, referring to
As some implementations, referring to
In some embodiments, the third insulating layer IL is an organic insulating layer, the common electrode 13 is located on a surface of the third insulating layer IL, and the metal line 14 is located on a surface of the common electrode 13. In this way, compared with the metal line 14 located on the surface of the third insulating layer IL, there is a greater bonding force between the metal line 14 and the common electrode 13, so that it is not easy for the position of the metal line 14 to change, thereby effectively avoiding adverse effect from possible movement of the metal line 14.
Alleviating the flicker problem of the liquid crystal display panel by using the metal line 14 to enhance the display effect of the liquid crystal display panel has been introduced above in conjunction with different embodiments.
Next, the technical solutions of alleviating the flicker problem of the liquid crystal display panel according to other embodiments of the present disclosure will be introduced.
The elastic constant of a liquid crystal determines the magnitude of recovery torque after the liquid crystal undergoes deformation from equilibrium state to disturbance. The inventors have noticed that, in a case of a higher temperature (for example, 50° C.), the elastic constant of liquid crystal decreases, which results in reduced rigidity and lowered restorability of liquid crystal.
As shown in
In some embodiments, the elastic constant of the liquid crystal 30 in the liquid crystal display panel at 50° C. is greater than or equal to 13.5, for example, is 15, 18, 20, etc. In this way, the rigidity of liquid crystal is increased, the retention rate of the liquid crystal voltage is increased, and the fluctuation of the transmittance caused by liquid crystal molecular vibration is reduced (that is, the brightness difference is reduced) when switching between positive and negative frames, thereby alleviating the flicker problem of the liquid crystal display panel.
In other embodiments, the elastic constant of the liquid crystal 30 in the liquid crystal display panel at 25° C. is greater than or equal to 17, for example, is 20, 25, 30, etc. In this way, the rigidity of liquid crystal is increased, and the fluctuation of the transmittance caused by liquid crystal molecular vibration is reduced when switching between positive and negative frames, thereby alleviating the flicker problem of the liquid crystal display panel.
In still other embodiments, the elastic constant of the liquid crystal 30 in the liquid crystal display panel at 50° C. is greater than or equal to 13.5, and the elastic constant of the liquid crystal in the liquid crystal display panel at 25° C. is greater than or equal to 17. In this way, the rigidity of liquid crystal is further increased, and the fluctuation of the transmittance caused by liquid crystal molecular vibration is further reduced when switching between positive and negative frames, thereby further alleviating the flicker problem of the liquid crystal display panel.
In some implementations, the above elastic constant is an average value of a splay elastic constant, a bend elastic constant and a twist elastic constant of the liquid crystal 30. In this way, the elastic constant of liquid crystal under different deformations is effectively increased, thereby further effectively alleviating the flicker problem of the liquid crystal display panel.
The embodiments of the disclosure also provide a display substrate for a liquid crystal display panel. Here, the display substrate is one of an array substrate and a color film substrate. For example, the display substrate is an array substrate; for another example, the display substrate is a color film substrate.
Referring to
In some embodiments, referring to
In some embodiments, referring to
In some embodiments, referring to
In some embodiments, the display substrate is an array substrate, and the viscosity of the material of the pixel electrode in the array substrate is greater than 3 mPa·s and less than or equal to 5 mPa·s.
For other embodiments of the display substrate, reference may be made to the above description of the liquid crystal display panel, which will not be described in detail here.
The inventors have also found that, the flicker problem of the liquid crystal display panel can also be alleviated by controlling the precision of parameters of some member(s) during the manufacturing process of the liquid crystal display panel/display substrate. Description will be made below in conjunction with the manufacturing method of a liquid crystal display panel and a display substrate.
As shown in
At step 802, a first base substrate is provided. The first base substrate comprises a display area and a peripheral area surrounding the display area.
At step 804, a common electrode line located at the peripheral area is formed. The common electrode line is configured to provide a common voltage.
At step 806, a common electrode and a metal line which are connected to the common electrode line are formed. The metal line is at least partially located at the display area, and the metal line is connected in parallel with the common electrode. The sheet resistance of the metal line is less than that of the common electrode.
In a case where the liquid crystal display panel formed in the above embodiments comprises a metal line connected to the common electrode line and connected in parallel with the common electrode, the sheet resistance of the common electrode and the metal line connected in parallel as a whole is less than that of the common electrode, thereby reducing the sheet resistance of the wiring of the common voltage. With this structure, on one hand, it is not easy for the common voltage to deviate from an expected value; on the other hand, even if the common voltage deviates from the expected value, it is also easier for the common voltage to rebound to the expected value. In this way, it is helpful to improve the stability and rebound resilience of the common voltage, thereby alleviating the flicker problem of the liquid crystal display panel to enhance the display effect of the liquid crystal display panel.
There are various reasons for flicker. The inventors have noticed that the pixel voltage on the pixel electrode will jump when the sub-pixel is turned on or off and jump voltage (ΔVP) is one of the reasons for flicker.
When ΔVP decreases, flicker can be alleviated. ΔVP may be calculated according to the following formula:
In this formula, Cgs is capacitance between a gate and a source/drain of a driving transistor in a sub-pixel, Cst is storage capacitance between a common electrode and a pixel electrode, Clc is liquid crystal capacitance, VGH is high voltage of the gate of the driving transistor, and VGL is low voltage of the gate of the driving transistor.
It is found through studies that, Cgs and Cst are likely to be affected by the manufacturing process.
Firstly, the fluctuation of the size of an overlapping portion between the gate and the source/drain of the driving transistor in the sub-pixel will affect Cgs.
As shown in table 1 and
Secondly, the fluctuation of the width of the pixel electrode will affect Cst. As shown in Table 2 and
Thirdly, the fluctuation of the thickness of the insulating layer (referring to the first insulating layer PV1 in
Based on the above analysis conclusion, the present disclosure provides the technical solutions of alleviating the flicker problem of the liquid crystal display panel according to further embodiments.
Compared with
At step 808, a first insulating layer in contact with the common electrode is formed on one side of the common electrode away from the first base substrate. The pressure applied during the process of forming the first insulating layer is greater than or equal to 1.2 torr and less than 1.5 torr. For example, the pressure applied during the process of forming the first insulating layer is 1.3 torr, 1.4 torr, etc.
In some embodiments, the first insulating layer is formed by using a chemical vapor deposition (CVD) process. For example, SiH4, NH3, H2, O2 and other gas(es) are used to form the first insulating layer through chemical reaction at a certain temperature and within the above pressure range.
At step 810, a pixel electrode in contact with the first insulating layer is formed on one side of the first insulating layer away from the first base substrate.
In the above embodiments, the pressure applied during the process of forming the first insulating layer is greater than or equal to 1.2 torr and less than 1.5 torr. In this way, the precision of the thickness of the formed first insulating layer is higher, and the thickness fluctuation of the first insulating layer is smaller, which is helpful to reduce ΔVP.
In some embodiments, the manufacturing method of a liquid crystal display panel further comprises forming a pixel electrode. The viscosity of the material of the pixel electrode is greater than 3 mPa·s and less than or equal to 5 mPa·s. For example, the viscosity of the material of the pixel electrode is 3.5 mPa·s, 3.8 mPa·s, 4 mPa·s, 4.5 mPa·s, etc. In this way, the precision of the width of the formed pixel electrode is higher, and the fluctuation of the width of the pixel electrode is smaller, which is helpful to reduce ΔVP.
In some embodiments, the viscosity of the material of the pixel electrode is greater than 3 mPa·s and less than or equal to 4 mPa·s. In this way, the precision of the width of the formed pixel electrode is higher, and the fluctuation of the width of the pixel electrode is smaller, which is helpful to further reduce ΔVP.
In some embodiments, the width of the pixel electrode is greater than or equal to 2.5 microns.
To further reduce ΔVP, in some embodiments, the pixel electrode may be formed by the following method.
First, a pixel electrode material layer is formed. For example, the pixel electrode material layer is an ITO layer.
Then, the pixel electrode material layer is etched by using an etching solution to form the pixel electrode. Here, the service life of the etching solution is greater than 0 and less than or equal to 5000 mins. For example, the service life of the etching solution is 3000 mins, 4500 mins, etc.
In a case where the viscosity of the material of the pixel electrode is greater than 3 mPa·s and less than or equal to 5 mPa·s, and the service life of the etching solution is greater than 0 and less than or equal to 5000 mins, the fluctuation of the width of the pixel electrode is further smaller, which is helpful to further reduce ΔVP.
In some embodiments, the viscosity of the material of the pixel electrode is greater than 3 mPa·s and less than or equal to 5 mPa·s, the service life of the etching solution is greater than 0 and less than or equal to 5000 mins, and the duration of the etching is greater than or equal to 160 seconds and less than or equal to 180 seconds. For example, the duration of the etching is 170 seconds, 175 seconds, etc. In this way, the fluctuation of the width of the pixel electrode is smaller, which is helpful to further reduce ΔVP.
In some embodiments, the viscosity of the material of the pixel electrode is greater than 3 mPa·s and less than or equal to 5 mPa·s, the service life of the etching solution is greater than 0 and less than or equal to 5000 mins, the duration of the etching is greater than or equal to 160 seconds and less than or equal to 180 seconds, and the width of the formed pixel electrode is greater than or equal to 2.5 microns. In this way, the fluctuation of the width of the pixel electrode is smaller, which is helpful to further reduce ΔVP.
In some embodiments, the manufacturing method of a liquid crystal display panel further comprises forming a pixel driving circuit comprising a driving transistor. For example, the drain of the driving transistor is connected to the pixel electrode, and the source of the driving transistor is connected to the common electrode.
To further reduce ΔVP, in some embodiments, the driving transistor may be formed by the following method.
First, a gate of the driving transistor is formed.
Then, an electrode material layer is s formed. In some embodiments, before forming the electrode material layer, a gate insulating layer (for example, referring to the fourth insulating layer GI shown in
Then, a mask plate is aligned with each alignment mark of the mask plate.
For example, the mask plate comprises 6 slots in total, and each slot has 6 alignment marks (also referred to as an alignment point). The mask plate is aligned by using all the alignment marks (36 in total).
Next, after the alignment, the electrode material layer is patterned by using the mask plate to form a source and a drain of the driving transistor.
In this way, it is helpful to reduce the fluctuation of the size of an overlapping area between the gate and the source/drain of the driving transistor, thereby further reducing ΔVP.
In some embodiments, the fluctuation of the thickness of the first insulating layer PVX1 is less than or equal to 10%, the fluctuation of the size of an overlapping portion between the gate and the source/drain of the driving transistor is less than or equal to 1 micron, and the fluctuation of the width of the pixel electrode is less than or equal to 0.6 micron.
The present disclosure also provides a manufacturing method of a display substrate.
In some embodiments, the manufacturing method of a display substrate comprises steps 802 to 806 shown in
In other embodiments, the manufacturing method of a display substrate comprises steps 802 to 810 shown in
For the specific implementation of steps 802 to 810, reference may be made to the above description, which will not be described in detail here.
The embodiments of the disclosure also provide another liquid crystal display panel.
Referring to
The first base substrate 11 comprises a display area 111 and a peripheral area 112 surrounding the display area 111. The common electrode line 12 is located at the peripheral area 112 and configured to provide a common voltage to the common electrode 13. The common electrode 13 is connected to the common electrode line 12.
The first condition comprises: the liquid crystal display panel comprises a metal line 14 (see
The second condition comprises: the elastic constant of the liquid crystal in the liquid crystal display panel at 50° C. is greater than or equal to 13.5. In some embodiments, the second condition further comprises: the elastic constant of the liquid crystal in the liquid crystal display panel at 25° C. is greater than or equal to 17. In this way, the rigidity of liquid crystal is increased, and the fluctuation of the transmittance caused by liquid crystal molecular vibration is reduced when switching between positive and negative frames, thereby further alleviating the flicker problem of the liquid crystal display panel.
The third condition comprises: the viscosity of the material of the pixel electrode in the liquid crystal display panel is greater than 3 mPa·s and less than or equal to 5 mPa·s. In this way, the precision of the width of the pixel electrode during the forming process is higher, and the fluctuation of the width of the pixel electrode is smaller, which is helpful to reduce ΔVP, thereby alleviating the flicker problem of the liquid crystal display panel.
In the above embodiments, the liquid crystal display panel satisfies at least one of the first condition, the second condition or the third condition. In this way, it is helpful to alleviate the flicker problem of the liquid crystal display panel to enhance the display effect of the liquid crystal display panel.
In some embodiments, the liquid crystal display panel satisfies a plurality of conditions (for example, two or three conditions) of the first condition, the second condition and the third condition. In this way, it is helpful to alleviate the flicker problem of the liquid crystal display panel to further enhance the display effect of the liquid crystal display panel.
The technical effects of some embodiments of the present disclosure will be described below in conjunction with some test data.
The first process condition is: the thickness of the first insulating layer PVX1 is 1500 angstroms, the fluctuation of the thickness is ±12%, the fluctuation of the size of an overlapping portion between the gate and the source/drain of the driving transistor is ±1.5 microns, and the fluctuation of the width of the pixel electrode is ±1 micron.
The second process condition is: the thickness of the first insulating layer PVX1 is 1500 angstroms, the fluctuation of the thickness of the first insulating layer PVX1 is ±10%, the fluctuation of the size of an overlapping portion between the gate and the source/drain of the driving transistor is ±1 micron, and the fluctuation of the width of the pixel electrode is ±0.6 micron.
Under the first process condition, the flicker of the test points P1 to P13 in
As can be known from Table 4 and Table 5, under the first process condition, the flicker of each test point can meet an expected value, that is, less than-60 dB in a case where the refresh rate is a fixed refresh rate. However, in a case where the refresh rate changes according to a square wave, the flicker of the test points P6, P7 and P10 cannot meet an expected value.
Under the second process condition, the flicker of the test points P1 to P13 in
As can be known from Table 6 and Table 7, under the second process condition, in a case where the refresh rate is a fixed refresh rate or a dynamic refresh rate, the flicker of each of the test points P1 to P13 can meet an expected value.
It should be understood that, the second process condition can be realized by the method introduced above in the present disclosure.
The third process condition is: the elastic constant of the liquid crystal in the liquid crystal display panel is 13.8 at 25° C. and the elastic constant of the liquid crystal in the liquid crystal display panel is 10.6 at 50° C.
The fourth process condition is: the elastic constant of liquid crystal in the liquid crystal display panel is 17 at 25° C. and the elastic constant of the liquid crystal in the liquid crystal display panel is 13.5 at 50° C.
Under the second process condition and the third process condition, the flicker of the test points P1 to P13 in
As can be seen from Table 8 and Table 9, at 25° C., in a case where the refresh rate is each of 20 Hz, 30 Hz, 40 Hz and 60 Hz, the flicker of each test point of each of the test samples M1, M2 and M3 meets an expected value, that is, less than −60 dB.
At 50° C., in a case where the refresh rate is each of 40 Hz and 60 Hz, the flicker of each test point of each of the test samples M1, M2 and M3 meets an expected value, that is, less than −55 dB. In a case where the refresh rate is 30 Hz, the flicker of the test point P2 of the test sample M2 and maximum value of the flicker of the test sample M2 cannot meet an expected value. In a case where the refresh rate is 20 Hz, the flicker of the test points P2, P7 and P12 of the test sample M2 and the maximum value of the flicker of the test sample M2 cannot meet an expected value, and the flicker of the test point P1 of the test sample M3 and the maximum value of the flicker of the test sample M3 cannot meet an expected value.
Under the second process condition and the fourth process condition, the flicker of the test points P1 to P13 in
As can be seen from Tables 10 and 11, at 25° C., in a case where the refresh rate is each of 20 Hz, 30 Hz, 40 Hz and 60 Hz, the flicker of each test point of each of the test samples M1, M2 and M3 meets an expected value, that is, less than-60 dB.
At 50° C., in a case where the refresh rate is each of 30 Hz, 40 Hz and 60 Hz, the flicker of each test point of each of the test samples M1, M2 and M3 meet an expected value, that is, less than-55 dB. In a case where the refresh rate is 20 Hz, the flicker of the test point P1 of the test sample M1 and the maximum value of the flicker of the test sample M1 cannot meet an expected value. It can be seen that, compared with the third process condition, under the fourth process condition, the flicker of the test sample with the refresh rates of 30 Hz and 20 Hz is alleviated.
The fifth process condition is: the liquid crystal display panel comprises a metal line connected in parallel with the common electrode.
Under the second process condition, the fourth process condition and the fifth process condition, the flicker of the test points P1 to P13 of each of the test samples M1 to M17 is tested at 50° C. with the refresh rate of 20 Hz.
As shown in
The present disclosure provides a plurality of technical solutions of alleviating the flicker problem when the liquid crystal display panel displays at a low frequency, and it should be understood that, different technical solutions can be combined with each other to obtain a technical solution of more effectively alleviating the flicker problem when the liquid crystal display panel displays at a low frequency.
In
As can be seen from
The present disclosure also provides a display device, which may comprise the liquid crystal display panel or the display substrate according to any of the above embodiments. In this way, the flicker problem when the display device displays at a low frequency can be effectively improved. In some embodiments, the display device may be any product or member having a display function, such as a mobile terminal, a television, a display, a notebook computer, a digital photo frame, a navigator, or an electronic paper.
Hereto, various embodiments of the present disclosure have been described in detail. Some details well known in the art are not described to avoid obscuring the concept of the present disclosure. According to the above description, those skilled in the art would fully know how to implement the technical solutions disclosed herein.
Although some specific embodiments of the present disclosure have been described in detail by way of examples, those skilled in the art should understand that the above examples are only for the purpose of illustration and are not intended to limit the scope of the present disclosure. It should be understood by those skilled in the art that modifications to the above embodiments and equivalently substitution of part of the technical features can be made without departing from the scope and spirit of the present disclosure. The scope of the disclosure is defined by the following claims.
This application is the United States national phase of International Patent Application No. PCT/CN2023/085599, filed Mar. 31, 2023, the disclosure of which is hereby incorporated by reference in its entirety.
| Filing Document | Filing Date | Country | Kind |
|---|---|---|---|
| PCT/CN2023/085599 | 3/31/2023 | WO |
