1. Field of the Invention
The present invention relates to an active matrix liquid crystal display panel which is integral with peripheral driver circuits, as well as to various apparatuses using such a panel.
2. Description of the Related Art
An active matrix liquid crystal display panel is known in which an active matrix circuit and peripheral driver circuits for driving it are integrated on a glass substrate or a quartz substrate. In such an active matrix liquid crystal display panel, various measures have been taken to minimize the area of portions unnecessary for display, i.e., the area occupied by the peripheral driver circuits.
On the other hand, in the liquid crystal display panel, a sealing member is provided in a peripheral portion to hold, i.e., confine a liquid crystal between a pair of substrates. As one measure to minimize the area of portions unnecessary for display, it is now required to reduce the area occupied by the sealing member.
The active matrix liquid crystal display panel which is integral with the peripheral driver circuits has a problem that failures likely occur in the peripheral driver circuits. This tendency is more remarkable in a configuration in which part of the sealing member is disposed above the peripheral driver circuits.
This problem occurs in the following manner. The sealing member contains a kind of spacer called a filler to maintain the gap between the substrates. In general, the peripheral driver circuits have a very high degree of integration. In these circumstances, pressure is exerted from the filler on thin-film transistors and a wiring of the peripheral driver circuits which are located right under the filler (the pressure is estimated to be very strong locally), so that a line disconnection, a contact failure, and even a disconnection of a semiconductor layer are likely to occur.
Although spherical substrate gap holding means called spacers are also used in the active matrix area, the occurrence of failures in the active matrix area due to the existence of the spacers is not so serious as in the peripheral driver circuits, because the degree of integration is low in the active matrix area.
An object of the present invention is to minimize the area of portions other than a pixel matrix circuit in an active matrix liquid crystal display panel which is integral with peripheral driver circuits.
Another object of the invention is to prevent destruction of a peripheral driver circuit due to pressure exerted from a sealing member even in the active matrix liquid crystal display panel that attains the above object.
According to a first aspect of the invention, as shown in
According to a second aspect of the invention, as shown in
According to a third aspect of the invention, as shown in
According to a fourth aspect of the invention, as shown in
As shown in
This embodiment is directed to an active matrix liquid crystal display panel which is integral with peripheral driver circuits.
This embodiment is directed to manufacture of a liquid crystal display panel that is constituted of a pixel circuit (active matrix circuit) and peripheral driver circuits for driving it. For example, the peripheral driver circuits are composed of a shift register circuit, a buffer circuit, and a sampling circuit.
First, a base film (not shown) is formed on a glass substrate 101. Alternatively, a quartz substrate may be used. In this embodiment, a 3,000-Å-thick silicon oxide film is formed by plasma CVD as the base film.
A 500-Å-thick amorphous silicon film (not shown) is then formed by low-pressure thermal CVD.
A crystalline silicon film is obtained by crystallizing the amorphous silicon film by illuminating it with laser light. Other means may be used to obtain a crystalline silicon film.
The thus-obtained crystalline silicon film is patterned into a pattern 102, a pattern indicated by numerals 103 to 105, and a pattern indicated by numerals 106 to 108. The pattern 102 will become a semiconductor pattern to constitute a laminated spacer 1000. The pattern indicated by numerals 103 to 105 will become an active layer pattern of a thin-film transistor in a peripheral driver circuit 1001. The pattern indicated by numerals 106 to 108 will become an active layer pattern of a thin-film transistor in a pixel circuit (active matrix circuit) 1002.
The laminated spacer is a laminated protrusion of all the components that are formed intentionally in the TFT substrate. If the laminated spacer is disposed in a peripheral driver circuit, pressure from the spacers for holding the substrate gap is concentrated on the laminated spacer. As a result, pressure exerted on thin-film transistors and a wiring that constitute the peripheral driver circuits can be reduced.
In this embodiment, it is assumed that all the illustrated thin-film transistors are of an n-channel type. In general, the peripheral driver circuits are constituted of n-channel and p-channel thin-film transistors. On the other hand, n-channel or p-channel transistors are used in the pixel circuit.
After the patterning of the semiconductor layer, a gate insulating film 109 is formed, and then an aluminum film (not shown) for forming gate electrodes (and gate lines extending therefrom) is formed on the gate insulating film 109. In this embodiment, a 4,000-Å-thick aluminum film is formed by sputtering by using an aluminum target containing scandium at 0.18 wt %.
The thus-formed aluminum film is patterned into aluminum patterns 110 to 112. The pattern 110 is an aluminum pattern to constitute the laminated spacer. The pattern 111 is a gate electrode of the thin-film transistor in the peripheral driver circuit. The pattern 112 is a gate electrode of the thin-film transistor in the pixel circuit.
Subsequently, 1,000-Å-thick anodic oxide films 113 to 115 are formed by anodization in which the aluminum patterns 110 to 112 are used as the anodes. Thus, the state of
Silicon nitride films may be used instead of anodic oxide films. As a further alternative, oxide films (plasma oxide films) may be formed by plasma processing in an oxidizing atmosphere.
In the state of
After contact holes are formed, a multilayer metal film in which an aluminum film is interposed between titanium films is formed by sputtering.
The three-layer metal film is patterned into a pattern 117, a source electrode 118, a drain electrode 119, a source electrode 120, and a drain electrode 121. The pattern 117 will become part of the laminated spacer. Thus, the state of
Thereafter, a 15,000-Å-thick resin layer 122, specifically a polyimide layer, as a second interlayer insulating film is formed by spin coating. The use of the resin layer 122 is advantageous in that its surface can be made flat.
Subsequently, a 3,000-Å-thick titanium film is formed by sputtering, and then patterned into a pattern 124 and a pattern 125. The pattern 124 is a titanium film pattern to become part of the laminated spacer. The pattern 125 is a black matrix (BM), which has a function of shielding the thin-film transistors in the pixel circuit from light.
Then, a 3,000-Å-thick resin layer 126, specifically a polyimide layer, as a third interlayer insulating film 126 is formed by spin coating.
After contact holes are formed, a 1,000-Å-thick ITO film is formed over the entire surface by sputtering. The ITO film is patterned into a pattern 127 and an ITO pixel electrode 128. The pixel electrode 128 is in contact with the drain electrode 121. An auxiliary capacitance is formed in a region where the pixel electrode 128 and the black matrix 125 coextend. Thus, the state of
The ITO pattern 127 is also left, as a dummy, in the laminated spacer portion. This makes the laminated spacer portion the thickest in the entire substrate structure. That is, the laminated spacer portion is provided as a protrusion which is wider than a given area and in which all the components are laminated.
Subsequently, an opposed glass substrate 201 (or a quartz substrate) is prepared as shown in
Reference numeral 206 denotes a sealing member, and numerals 204 and 205 denote spacers included in the sealing member 206. A liquid crystal 207 is sealed within the liquid crystal cell by the sealing member 206.
In the structure shown in
The coextending portion of the black matrix 125 and the pixel electrode 128 in the pixel circuit is equal in height (i.e., thickness) to the laminated spacer portion. However, since the coextending portion has only a small area and the degree of integration is low in the pixel circuit, the occurrence of wiring disconnections and TFT failures due to pressure exerted from the spacer 208 is negligible.
The structure of
As described above, by providing the laminated spacer in the active matrix liquid crystal display panel which is integral with the peripheral driver circuits, the peripheral driver circuits can be prevented from being damaged by pressure exerted from spacers that are included in the sealing member even if part of the sealing member is disposed above the peripheral driver circuits.
This embodiment is directed to a case where the invention is applied to a configuration in which not only the peripheral driver circuits but also various processing circuits and memory circuits are integrated on the same substrate.
The structure called “system on panel” has been proposed as an advanced version of the liquid crystal display panel which is integral with the peripheral driver circuits. In this new structure, various processing circuits and memory circuits as well as the active matrix circuit and the peripheral driver circuits are integrated on the same substrate. This structure is intended to reduce the size of an information processing terminal by integrating its functions on a single glass substrate.
Also in this structure, it is required to reduce the area of the portions other than the pixel circuit (active matrix circuit). This necessarily requires a structure in which the sealing member is overlapped with various integrated circuits which constitute various processing circuits and memory circuits.
To satisfy this requirement, the laminated spacer as described in the first embodiment may be provided in such integrated circuits, whereby the integrated circuits constituting various processing circuits and memory circuits which are high in the degree of integration can be prevented from being damaged by pressure exerted from spacers in the sealing member.
An active matrix liquid crystal display panel which is integral with peripheral driver circuits according to the invention can be incorporated in various apparatuses.
The use of the invention in an active matrix liquid crystal display panel which is integral with peripheral driver circuits is very advantageous because in such a panel the peripheral driver circuits are required to have a high degree of integration.
This apparatus has a function of electronically storing pictures taken by a CCD camera (or some other proper imaging means) that is incorporated in a camera section 2002. The apparatus also has a function of displaying a picture thus taken on a liquid crystal display panel 2003 that is incorporated in a main body 2001. The apparatus is operated by using operation buttons 2004.
By applying the invention to this apparatus, the non-display area of the liquid crystal display panel 2003 can be minimized, which enables miniaturization of the apparatus.
Switching among various pieces of information needed for navigation is performed by operation buttons 2303. A remote controller (not shown) is commonly used for various operations.
The view finder is generally composed of a liquid crystal display panel 2502 and an eyepiece unit 2503 which displays an image.
The video camera of
In the video camera of
As described above, the area of the portions other than the pixel matrix circuit can be minimized in an active matrix liquid crystal display panel which is integral with peripheral driver circuits.
It becomes possible to prevent destruction of a peripheral driver circuit due to pressure exerted from the sealing member even in the active matrix liquid crystal display panel in which the area of the non-display portions is minimized.
Number | Date | Country | Kind |
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08-185636 | Jun 1996 | JP | national |
This application is a continuation of U.S. application Ser. No. 12/694,616, filed Jan. 27, 2010, now allowed, which is a continuation of U.S. application Ser. No. 11/782,042, filed Jul. 24, 2007, now U.S. Pat. No. 7,667,817, which is a continuation of U.S. application Ser. No. 09/548,524, filed Apr. 13, 2000, now U.S. Pat. No. 7,298,447, which is a continuation of U.S. application Ser. No. 08/877,919, filed Jun. 18, 1997, now U.S. Pat. No. 6,055,034, which claims the benefit of a foreign priority application filed in Japan as Serial No. 08-185636 on Jun. 25, 1996, all of which are incorporated by reference.
Number | Name | Date | Kind |
---|---|---|---|
4640584 | Tsubakimoto et al. | Feb 1987 | A |
4983429 | Takayanagi et al. | Jan 1991 | A |
5148301 | Sawatsubashi et al. | Sep 1992 | A |
5179460 | Hinata et al. | Jan 1993 | A |
5323042 | Matsumoto | Jun 1994 | A |
5396356 | Fukuchi | Mar 1995 | A |
5504601 | Watanabe et al. | Apr 1996 | A |
5513028 | Sono et al. | Apr 1996 | A |
5572046 | Takemura | Nov 1996 | A |
5619358 | Tanaka et al. | Apr 1997 | A |
5621553 | Nishiguchi et al. | Apr 1997 | A |
5650664 | Sakamoto | Jul 1997 | A |
5684555 | Shiba et al. | Nov 1997 | A |
5739549 | Takemura et al. | Apr 1998 | A |
5745202 | Yamauchi et al. | Apr 1998 | A |
5745208 | Grupp et al. | Apr 1998 | A |
5784132 | Hashimoto | Jul 1998 | A |
5798812 | Nishiki et al. | Aug 1998 | A |
5889291 | Koyama et al. | Mar 1999 | A |
5929948 | Ohori et al. | Jul 1999 | A |
5955744 | Gu et al. | Sep 1999 | A |
5995189 | Zhang | Nov 1999 | A |
6055034 | Zhang et al. | Apr 2000 | A |
6115097 | Yamazaki | Sep 2000 | A |
6177974 | Hirakata et al. | Jan 2001 | B1 |
6249333 | Zhang et al. | Jun 2001 | B1 |
7142273 | Zhang et al. | Nov 2006 | B1 |
7298447 | Zhang et al. | Nov 2007 | B1 |
7667817 | Zhang et al. | Feb 2010 | B2 |
7990514 | Zhang et al. | Aug 2011 | B2 |
Number | Date | Country |
---|---|---|
58085478 | May 1983 | JP |
62205320 | Sep 1987 | JP |
63026631 | Feb 1988 | JP |
02-242230 | Sep 1990 | JP |
2242230 | Sep 1990 | JP |
3024634 | Mar 1991 | JP |
5127181 | May 1993 | JP |
6138488 | May 1994 | JP |
06-186579 | Jul 1994 | JP |
6186579 | Jul 1994 | JP |
6186588 | Jul 1994 | JP |
6258661 | Sep 1994 | JP |
6258662 | Sep 1994 | JP |
6308505 | Nov 1994 | JP |
6308510 | Nov 1994 | JP |
8076145 | Mar 1996 | JP |
Number | Date | Country | |
---|---|---|---|
20110278584 A1 | Nov 2011 | US |
Number | Date | Country | |
---|---|---|---|
Parent | 12694616 | Jan 2010 | US |
Child | 13190585 | US | |
Parent | 11782042 | Jul 2007 | US |
Child | 12694616 | US | |
Parent | 09548524 | Apr 2000 | US |
Child | 11782042 | US | |
Parent | 08877919 | Jun 1997 | US |
Child | 09548524 | US |