Patent Grant
11475860
The following disclosure relates to a liquid crystal display device and particularly relates to a liquid crystal display device including a liquid crystal panel with a built-in touch panel.
A touch panel has attracted attention as an input device for performing operations in a computer system or the like in the related art. For example, in a capacitive touch panel, a position of an object to be detected such as a finger of a user (operator) or a touch pen is detected based on a change in electrostatic capacitance. Such a touch panel has been used by being superimposed on a display panel such as a liquid crystal panel in the related art. Such a touch panel provided on the display panel is referred to as an “out-cell type touch panel”.
However, in the out-cell type touch panel, an increase in the weight and the thickness of the entire device including the display panel and the touch panel, and an increase in the power required to drive the touch panel have been problems. Thus, in recent years, development of display devices having a configuration in which the display panel and the touch panel are integrated has advanced. The touch panels having the configuration integrated with the display panel mainly include those referred to as “on-cell type touch panels” and those referred to as “in-cell type touch panels”. In the on-cell type touch panels, a sensor electrode is provided between one of two glass substrates constituting the display panel and a polarizer. In the in-cell type touch panels, the sensor electrode is provided inside the two glass substrates.
As described above, the touch panels include several types, but in recent years, the in-cell type touch panels have become mainstream in the market. In the in-cell type touch panels, rectangular sensor electrodes segmented into a plurality of rows×a plurality of columns are typically used, and touch detection (detection of touch position on the touch panel) is performed by a self capacitance method. Note that the self capacitance method is a method for measuring a position of an object to be detected by detecting that electrostatic capacitance has increased due to contact or approach of the object to be detected with or to the touch panel.
Some in-cell type touch panels employ a configuration in which the sensor electrode described above and a common electrode which is an electrode used for displaying an image are shared. In such a configuration, one electrode is used as the sensor electrode for performing the touch detection, and is also used as the common electrode for image display. By sharing the sensor electrode and the common electrode in this manner, a reduction in thickness and weight of the device are realized.
In recent years, liquid crystal display devices provided with memory circuits in pixel circuits have been developed in order to reduce power consumption. Such a liquid crystal display device is referred to as a “memory liquid crystal display”. In general, in the memory liquid crystal display, one bit of data can be held for each pixel, and in a case where an image of the same content or an image with a small change is displayed for a long period of time, image display using the data held in the memory circuit is performed. In the memory liquid crystal display, once the data is written to the memory circuit, the contents of the data written to the memory circuit are held until the next rewrite. Thus, little power is consumed in periods other than the periods before and after the contents of the image change. Thus, low power consumption can be achieved.
A state of the input switch 910 is controlled by the first scanning signal GLA and the second scanning signal GLB. When the input switch 910 is in an on state, the data signal SL is supplied to the memory circuit 920. Note that the data signal SL is binary data. The memory circuit 920 stores the binary data based on the data signal SL. The voltage selection circuit 930 selects either the black voltage VA or the white voltage VB in accordance with a value of the binary data stored in the memory circuit 920. The voltage selected by the voltage selection circuit 930 is then applied to the pixel electrode 941, which is reflected in a display state of the pixel.
Note that, in connection with the present case, JP 2015-96935 A and JP 2017-83530 A disclose technologies related to a memory liquid crystal display provided with a touch panel.
However, the memory liquid crystal display provided with the in-cell type touch panel is not realized for the reasons below. Note that in the following, a common electrode voltage is denoted by a reference sign VCOM, and a pixel electrode voltage is denoted by a reference sign Vp. In the following, focusing on a normally-white type, it is assumed that a liquid crystal application voltage is 0 V when the white display is performed, and the liquid crystal application voltage is 5 V or −5 V when the black display is performed.
As described above, in the case where the in-cell type touch panel is provided in the known memory liquid crystal display, a display defect (inversion of black and white) occurs due to the pulse signal for touch detection being supplied to the common electrode 942.
Thus, the following disclosure is directed to realizing the memory liquid crystal display provided with the in-cell type touch panel.
(1) A liquid crystal display device according to some embodiments of the disclosure is a liquid crystal display device including a liquid crystal panel with a built-in touch panel, the liquid crystal display device including a plurality of pixel circuits each including a liquid crystal capacitance constituted by a pixel electrode and a common electrode, a memory circuit configured to store binary data, and a voltage selection circuit configured to supply either a first voltage or a second voltage to the pixel electrode in accordance with a value of the binary data stored in the memory circuit; a common electrode drive circuit configured to drive the common electrode; and a state control circuit configured to switch a state of the pixel electrode between a floating state and a non-floating state, wherein the touch panel uses the common electrode as an electrode for touch detection, the common electrode drive circuit supplies a pulse signal for touch detection to the common electrode in a touch detection period for detecting a touched position on the touch panel, and the state control circuit switches the state of the pixel electrode from the non-floating state to the floating state before a start of the touch detection period, and switches the state of the pixel electrode from the floating state to the non-floating state after an end of the touch detection period.
According to such a configuration, even when the pulse signal for touch detection is supplied to the common electrode in the touch detection period in the memory liquid crystal display, the pixel electrode voltage also changes in accordance with the change in the common electrode voltage. Thus, the liquid crystal application voltage is maintained at the desired voltage throughout the touch detection period. Thus, the display defect (inversion of black and white) due to the pulse signal for touch detection being supplied to the common electrode does not occur. As described above, the memory liquid crystal display provided with the in-cell type touch panel is realized.
(2) The liquid crystal display device according to some embodiments of the disclosure includes the above-described configuration (1), wherein the state control circuit is a switch circuit provided between the voltage selection circuit and the pixel electrode, and the switch circuit electrically disconnects the voltage selection circuit and the pixel electrode from each other before the start of the touch detection period, and electrically connects the voltage selection circuit and the pixel electrode to each other after the end of the touch detection period.
(3) The liquid crystal display device according to some embodiments of the disclosure includes, in addition to the above-described configuration (2), a plurality of scanning signal lines configured to supply a scanning signal to each of the plurality of pixel circuits; a scanning signal line drive circuit configured to apply the scanning signal to each of the plurality of scanning signal lines; a plurality of data signal lines configured to supply a data signal to each of the plurality of pixel circuits; a data signal line drive circuit configured to apply the data signal to each of the plurality of data signal lines; a plurality of first voltage supply wiring lines configured to supply the first voltage to each of the plurality of pixel circuits; a plurality of second voltage supply wiring lines configured to supply the second voltage to each of the plurality of pixel circuits; a display voltage generation circuit configured to generate the first voltage and the second voltage; a scanning signal supply control switch circuit provided in a region outside a display region where the plurality of pixel circuits are formed, the scanning signal supply control switch circuit being configured to control an electrical connection state between the scanning signal line drive circuit and the plurality of scanning signal lines in the display region; a data signal supply control switch circuit provided in the region outside the display region, the data signal supply control switch circuit being configured to control an electrical connection state between the data signal line drive circuit and the plurality of data signal lines in the display region; and a display voltage supply control switch circuit provided in the region outside the display region, the display voltage supply control switch circuit being configured to control an electrical connection state between the display voltage generation circuit and the plurality of first voltage supply wiring lines in the display region and an electrical connection state between the display voltage generation circuit and the plurality of second voltage supply wiring lines in the display region, wherein the scanning signal supply control switch circuit electrically disconnects the scanning signal line drive circuit and the plurality of scanning signal lines in the display region from each other before the start of the touch detection period, and electrically connects the scanning signal line drive circuit and the plurality of scanning signal lines in the display region to each other after the end of the touch detection period, the data signal supply control switch circuit electrically disconnects the data signal line drive circuit and the plurality of data signal lines in the display region from each other before the start of the touch detection period, and electrically connects the data signal line drive circuit and the plurality of data signal lines in the display region to each other after the end of the touch detection period, and the display voltage supply control switch circuit electrically disconnects the display voltage generation circuit and the plurality of first voltage supply wiring lines in the display region from each other and electrically disconnects the display voltage generation circuit and the plurality of second voltage supply wiring lines in the display region from each other before the start of the touch detection period, and electrically connects the display voltage generation circuit and the plurality of first voltage supply wiring lines in the display region to each other and electrically connects the display voltage generation circuit and the plurality of second voltage supply wiring lines in the display region to each other after the end of the touch detection period.
(4) The liquid crystal display device according to some embodiments of the disclosure includes the above-described configuration (1), wherein the voltage selection circuit includes a first voltage supply control switch circuit configured to control an electrical connection state between a first voltage supply wiring line configured to supply the first voltage and the pixel electrode, and a second voltage supply control switch circuit configured to control an electrical connection state between a second voltage supply wiring line configured to supply the second voltage and the pixel electrode, the first voltage supply control switch circuit electrically connects the first voltage supply wiring line and the pixel electrode to each other when a first voltage supply control signal provided from the memory circuit is at an on level, and electrically disconnects the first voltage supply wiring line and the pixel electrode from each other when the first voltage supply control signal is at an off level, the second voltage supply control switch circuit electrically connects the second voltage supply wiring line and the pixel electrode to each other when a second voltage supply control signal provided from the memory circuit is at the on level, and electrically disconnects the second voltage supply wiring line and the pixel electrode from each other when the second voltage supply control signal is at the off level, and the state control circuit is a switching circuit provided in the memory circuit and configured to switch a level of the first voltage supply control signal between the on level and the off level and switch a level of the second voltage supply control signal between the on level and the off level, the switching circuit maintaining the level of the first voltage supply control signal and the level of the second voltage supply control signal at the off level in the touch detection period.
(5) The liquid crystal display device according to some embodiments of the disclosure includes, in addition to the above-described configuration (4), a plurality of scanning signal lines configured to supply a scanning signal to each of the plurality of pixel circuits; a scanning signal line drive circuit configured to apply the scanning signal to each of the plurality of scanning signal lines; a plurality of data signal lines configured to supply a data signal to each of the plurality of pixel circuits; a data signal line drive circuit configured to apply the data signal to each of the plurality of data signal lines; a display voltage generation circuit configured to generate the first voltage and the second voltage; a scanning signal supply control switch circuit provided in a region outside a display region where the plurality of pixel circuits are formed, the scanning signal supply control switch circuit being configured to control an electrical connection state between the scanning signal line drive circuit and the plurality of scanning signal lines in the display region; a data signal supply control switch circuit provided in the region outside the display region, the data signal supply control switch circuit being configured to control an electrical connection state between the data signal line drive circuit and the plurality of data signal lines in the display region; and a display voltage supply control switch circuit provided in the region outside the display region, the display voltage supply control switch circuit being configured to control an electrical connection state between the display voltage generation circuit and the plurality of first voltage supply wiring lines in the display region and an electrical connection state between the display voltage generation circuit and the plurality of second voltage supply wiring lines in the display region, wherein the scanning signal supply control switch circuit electrically disconnects the scanning signal line drive circuit and the plurality of scanning signal lines in the display region from each other before the start of the touch detection period, and electrically connects the scanning signal line drive circuit and the plurality of scanning signal lines in the display region to each other after the end of the touch detection period, the data signal supply control switch circuit electrically disconnects the data signal line drive circuit and the plurality of data signal lines in the display region from each other before the start of the touch detection period, and electrically connects the data signal line drive circuit and the plurality of data signal lines in the display region to each other after the end of the touch detection period, and the display voltage supply control switch circuit electrically disconnects the display voltage generation circuit and the plurality of first voltage supply wiring lines in the display region from each other and electrically disconnects the display voltage generation circuit and the plurality of second voltage supply wiring lines in the display region from each other before the start of the touch detection period, and electrically connects the display voltage generation circuit and the plurality of first voltage supply wiring lines in the display region to each other and electrically connects the display voltage generation circuit and the plurality of second voltage supply wiring lines in the display region to each other after the end of the touch detection period.
(6) The liquid crystal display device according to some embodiments of the disclosure includes, in addition to the above-described configuration (1), a display voltage generation circuit provided outside the liquid crystal panel, the display voltage generation circuit being configured to generate the first voltage and the second voltage; a first voltage supply wiring line configured to supply the first voltage from the display voltage generation circuit to the voltage selection circuit; and a second voltage supply wiring line configured to supply the second voltage from the display voltage generation circuit to the voltage selection circuit, wherein the state control circuit is a switch circuit provided between the display voltage generation circuit and the first voltage supply wiring line and between the display voltage generation circuit and the second voltage supply wiring line, the switch circuit being configured to electrically disconnect the display voltage generation circuit and the first voltage supply wiring line from each other and electrically disconnect the display voltage generation circuit and the second voltage supply wiring line from each other before the start of the touch detection period, and electrically connect the display voltage generation circuit and the first voltage supply wiring line to each other and electrically connect the display voltage generation circuit and the second voltage supply wiring line to each other after the end of the touch detection period.
(7) A liquid crystal display device according to some embodiments of the disclosure includes, in addition to the above-described configuration (6), a plurality of scanning signal lines configured to supply a scanning signal to each of the plurality of pixel circuits; a scanning signal line drive circuit configured to apply the scanning signal to each of the plurality of scanning signal lines; a plurality of data signal lines configured to supply a data signal to each of the plurality of pixel circuits; a data signal line drive circuit configured to apply the data signal to each of the plurality of data signal lines; a scanning signal supply control switch circuit provided in a region outside a display region where the plurality of pixel circuits are formed, the scanning signal supply control switch circuit being configured to control an electrical connection state between the scanning signal line drive circuit and the plurality of scanning signal lines in the display region; and a data signal supply control switch circuit provided in the region outside the display region, the data signal supply control switch circuit being configured to control an electrical connection state between the data signal line drive circuit and the plurality of data signal lines in the display region, wherein the scanning signal supply control switch circuit electrically disconnects the scanning signal line drive circuit and the plurality of scanning signal lines in the display region from each other before the start of the touch detection period and electrically connects the scanning signal line drive circuit and the plurality of scanning signal lines in the display region to each other after the end of the touch detection period, and the data signal supply control switch circuit electrically disconnects the data signal line drive circuit and the plurality of data signal lines in the display region from each other before the start of the touch detection period and electrically connects the data signal line drive circuit and the plurality of data signal lines in the display region to each other after the end of the touch detection period.
(8) A liquid crystal display device according to some embodiments of the disclosure includes the above-described configuration (6), wherein the display voltage generation circuit and the switch circuit are provided in one integrated circuit.
(9) A liquid crystal display device according to several embodiments of the disclosure includes any one of the above-described configurations (1) to (8), wherein each of the plurality of pixel circuits includes auxiliary capacitance provided in parallel to the liquid crystal capacitance.
(10) A method for driving a liquid crystal display device according to some embodiments of the disclosure is a method for driving a liquid crystal display device including a liquid crystal panel with a built-in touch panel, the liquid crystal display device including a plurality of pixel circuits each including a liquid crystal capacitance constituted by a pixel electrode and a common electrode, a memory circuit configured to store binary data, and a voltage selection circuit configured to supply either a first voltage or a second voltage to the pixel electrode in accordance with a value of the binary data stored in the memory circuit; and a common electrode drive circuit configured to drive the common electrode, the touch panel using the common electrode as an electrode for touch detection, the method sequentially executing: a step of switching a state of the pixel electrode from a non-floating state to a floating state; a step of supplying, by the common electrode drive circuit, a pulse signal for touch detection to the common electrode to detect a touched position on the touch panel; and a step of switching the state of the pixel electrode from the floating state to the non-floating state.
These and other objects, features, aspects, and advantages of the disclosure will become more apparent from the following detailed description of the disclosure with reference to the accompanying drawings.
The disclosure will be described with reference to the accompanying drawings, wherein like numbers reference like elements.
Embodiments will be described below with reference to the accompanying drawings. A liquid crystal display device described in each of the following embodiments is above-described memory liquid crystal display. and includes the in-cell type touch panel.
An overall configuration and a schematic operation of the liquid crystal display device according to the first embodiment will be described with reference to
In the present embodiment, a common electrode, which is an electrode for image display, is also used as an electrode for touch detection. By sharing the electrode for touch detection and the electrode for image display in this manner, a reduction in thickness and weight of the device is realized.
In the present embodiment, both of the pixel electrode and the common electrode are provided on the TFT array substrate 3. In other words, the IPS mode is employed as the liquid crystal operating mode. However, no such limitation is intended.
Various wiring lines are arranged around each pixel circuit 100 as illustrated in
The timing control circuit 20 receives image data DAT transmitted from an external host or the like and outputs a digital video signal DV, a gate control signal GCTL for controlling an operation of the gate driver 30, a source control signal SCTL for controlling an operation of the source driver 40, and a common electrode control signal VCTL for controlling an operation of the common electrode drive circuit 50. The gate control signal GCTL includes a gate start pulse signal, a gate clock signal, and the like. The source control signal SCTL includes a source start pulse signal, a source clock signal, a latch strobe signal, and the like. Note that a floating control signal FCTL, which will be described later, is also output from the timing control circuit 20.
The gate driver 30 applies the first scanning signals GLA(1) to GLA(i) to the i first gate bus lines, and applies the second scanning signals GLB(1) to GLB(i) to the i second gate bus lines, based on the gate control signal GCTL transmitted from the timing control circuit 20. The source driver 40 applies data signals SL(1) to SL(j) to the j source bus lines, based on the digital video signal DV and the source control signal SCTL transmitted from the timing control circuit 20. The common electrode drive circuit 50 applies the common electrode voltage VCOM to the common electrode constituting the touch panel 7 based on the common electrode control signal VCTL transmitted from the timing control circuit 20. Note that a pulse signal for touch detection is supplied to the common electrode in a touch detection period. The position detection circuit 55 receives the detection signal SX as a result of the touch detection, and supplies a position signal PS indicating a touch position to the timing control circuit 20. As a result, in the liquid crystal display device, image display in accordance with the touch position is performed.
The power source circuit 60 outputs a power supply voltage Vlcd (high-level DC power supply voltage VDD and low-level DC power supply voltage VSS) for holding data in the memory circuit in the pixel circuit 100. The display voltage generation circuit 65 generates and outputs the black voltage VA and the white voltage VB.
The common electrode 70 is realized by a transparent conductive film such as Indium Tin Oxide (ITO). As illustrated in
One end of the common electrode wiring line 71 is connected to the contact portion 72 formed on the corresponding common electrode 70, and the other end of the common electrode wiring line 71 is connected to the IC 8. As a result, the common electrode voltage VCOM is supplied to each common electrode 70 from the IC 8, and the touch position can be identified based on the detection signal SX.
Next, a configuration of the pixel circuit 100 will be described.
A state of the input switch 110 is controlled by the first scanning signal GLA and the second scanning signal GLB. When the input switch 110 is in an on state, the data signal SL is supplied to the memory circuit 120. Note that the data signal SL is binary data. The memory circuit 120 stores the binary data based on the data signal SL. The voltage selection circuit 130 selects either the black voltage VA or the white voltage VB in accordance with a value of the binary data stored in the memory circuit 120.
In the example illustrated in
In a period when the n-channel transistor 151 is maintained in the on state, a voltage (black voltage VA or white voltage VB) selected by the voltage selection circuit 130 is applied to the pixel electrode 102, which is reflected in the display state of the pixel.
Note that in a period when the pixel electrode 102 is in the floating state, neither the black voltage VA nor the white voltage VB is supplied to the pixel electrode 102. Thus, an auxiliary capacitance 141 may be provided in parallel with the liquid crystal capacitance 140, as illustrated in
In the example illustrated in
Assuming that the state control circuit 150 is a switch, regardless of which configuration illustrated in
The input switch 110 is a CMOS switch including a p-channel transistor 111 and an n-channel transistor 112. Note that in the following, the input switch 110 is also referred to as a “first switch”. The first switch is denoted by a reference sign SW1. The first switch SW1 is in the on state in a case where the first scanning signal GLA is at the high level and the second scanning signal GLB is at the low level. When the first switch SW1 is in the on state, a source bus line for transmitting the data signal SL and a node 127 are electrically connected to each other. As described above, in a case where the first scanning signal GLA is at the high level and the second scanning signal GLB is at the low level. the first switch SW1 is in the on state, and the voltage of the data signal SL is supplied to the node 127.
The memory circuit 120 is constituted by a second switch SW2, which is a CMOS switch including an n-channel transistor 121 and p-channel transistor 122, a first inverter INV1, which is a CMOS inverter including a p-channel transistor 123 and an n-channel transistor 124, and a second inverter INV2, which is a CMOS inverter including a p-channel transistor 125 and an n-channel transistor 126. The second switch SW2 is in the on state in a case where the second scanning signal GLB is at the high level and the first scanning signal GLA is at the low level. When the second switch SW2 is in the on state, the node 127 and a node 129 are electrically connected to each other. The first inverter INV1 includes an input terminal connected to the node 127, and an output terminal connected to a node 128. The second inverter INV2 includes an input terminal connected to the node 128, and an output terminal connected to the node 129. In the configuration described above, the memory circuit 120 functions to hold a value (logic value) based on the voltage supplied to the node 127 in a case where the first switch SW1 is in the on state until the next time the first switch SW1 is in the on state.
The voltage selection circuit 130 is constituted by a third switch SW3, which is a CMOS switch including an p-channel transistor 131 and an n-channel transistor 132, and a fourth switch SW4, which is a CMOS switch including an p-channel transistor 133 and an n-channel transistor 134. The third switch SW3 is in the on state in a case where the voltage of the node 127 is at the high level and the voltage at the node 128 is at the low level. When the third switch SW3 is in the on state, the black voltage VA is output from the voltage selection circuit 130. The fourth switch SW4 is in the on state in a case where the voltage of the node 127 is at the low level and the voltage at the node 128 is at the high level. When the fourth switch SW4 is in the on state, the white voltage VB is output from the voltage selection circuit 130.
According to the configuration described above, binary data is stored in the memory circuit 120 based on the voltage of the data signal when the first switch SW1 is in the on state. In the voltage selection circuit 130, the display voltage (either the black voltage VA or the white voltage VB) to be applied to the pixel electrode 102 is selected based on the binary data stored in the memory circuit 120. Then, the display state of the pixel is a white display or a black display, based on the display voltage applied to the pixel electrode 102.
Next, a driving method will be described.
The pulse signal for touch detection is supplied to the common electrode 70 in the touch detection period Td. Accordingly, in the touch detection period Td, as illustrated in
By selecting the white voltage VB by the voltage selection circuit 130, the pixel electrode voltage Vp is equal to the white voltage VB in the periods other than the touch detection period Td. As described above, in the period other than the touch detection period Td, the liquid crystal application voltage is 0 V both in the period in which the common electrode voltage VCOM is 5 V and in the period in which the common electrode voltage VCOM is 0 V. As a result, the white display is performed.
The pulse signal for touch detection is supplied to the common electrode 70 in the touch detection period Td, so that the common electrode voltage VCOM varies between 0 V and 5 V, as illustrated in
Note that although in this description, an example has been described in which a cycle of polarity inversion of the liquid crystal application voltage and a scanning cycle of the touch panel 7 (a cycle of supplying the pulse signal for touch detection to the common electrode 70) are the same, no such limitation is intended, and the cycle of polarity inversion of the liquid crystal application voltage and the scanning cycle of the touch panel 7 may be different from each other. In one example, the frequency of the polarity inversion of the liquid crystal application voltage is set to 0.5 Hz, and the scanning rate of the touch panel 7 is set to 80 Hz.
According to the present embodiment, the state control circuit 150 configured to switch the state of the pixel electrode 102 between the floating state and the non-floating state is provided in the memory liquid crystal display (the liquid crystal display device provided with the memory circuit 120 in the pixel circuit 100) provided with the in-cell type touch panel 7 that uses the common electrode 70 as the electrode for touch detection. The state control circuit 150 changes the state of the pixel electrode 102 from the non-floating state to the floating state before the start of the touch detection period Td, and changes the state of the pixel electrode 102 from the floating state to the non-floating state after the end of the touch detection period Td. As a result, even when the pulse signal for touch detection is supplied to the common electrode 70 in the touch detection period Td, the pixel electrode voltage Vp also changes in accordance with the change in the common electrode voltage VCOM. Thus, the liquid crystal application voltage is maintained at the desired voltage throughout the touch detection period Td. Thus, the display defect (inversion of black and white) due to the pulse signal for touch detection being supplied to the common electrode 70 does not occur. As described above, according to the present embodiment, the memory liquid crystal display provided with the in-cell type touch panel 7 is realized.
A second embodiment will be described below. Note that points different from the first embodiment will be mainly described below.
In the first embodiment, the state of the pixel electrode 102 is controlled by providing between the voltage selection circuit 130 and the pixel electrode 102 the state control circuit 150 configured to function as the switch. In contrast, in the present embodiment, the state of the pixel electrode 102 is controlled by controlling the output from the memory circuit 120 to the voltage selection circuit 130. In order to realize the above, the state control circuit in the present embodiment is provided in the memory circuit 120. A detailed description will be given below.
A configuration in the vicinity of the voltage selection circuit 130 in the pixel circuit 100 is schematically configured as illustrated in
As illustrated in
In order to enable the above-described control, in the present embodiment, a state control circuit 160 having a configuration such as that illustrated in
As described above, when the floating control signal FCTL is at the high level, the CMOS switch SWb and the CMOS switch SWd are in the on state, the voltage V(127) of the node 127 is output as the black voltage supply control signal Vbk, and the voltage V(128) of the node 128 is output as the white voltage supply control signal Vwh. At this time, since the pixel electrode 102 is electrically connected to either the black voltage supply line VAL or the white voltage supply line VBL, the pixel electrode 102 is maintained in the non-floating state. On the other hand, when the floating control signal FCTL is at the low level, the CMOS switch SWa and the CMOS switch SWc are in the on state, the low-level voltage VLOW is output as the black voltage supply control signal Vbk, and the white voltage supply control signal Vwh. At this time, as described above, the pixel electrode 102 is high impedance (in the floating state).
As described above, the state control circuit 160 in the present embodiment functions as a switching circuit configured to switch the level of the black voltage supply control signal Vbk between the high level (on level) and the low level (off level), and switch the level of the white voltage supply control signal Vwh between the high level (on level) and the low level (off level), wherein the switching circuit maintains the level of the black voltage supply control signal Vbk and the level of the white voltage supply control signal Vwh at the low level (off level) in the touch detection period Td.
Also in the present embodiment, similar to the first embodiment, under the control of the timing control circuit 20, the floating control signal FCTL changes from the high level to the low level before the start of the touch detection period Td, and changes from the low level to the high level after the end of the touch detection period Td (see
Also in the present embodiment, the state of the pixel electrode 102 changes from the non-floating state to the floating state before the start of the touch detection period Td, and the state of the pixel electrode 102 changes from the floating state to the non-floating state after the end of the touch detection period Td. Accordingly, even when the pulse signal for touch detection is supplied to the common electrode 70 in the touch detection period Td, the pixel electrode voltage Vp also changes in accordance with the change in the common electrode voltage VCOM. Thus, similar to the first embodiment, the display defect (inversion of black and white) due to the pulse signal for touch detection being supplied to the common electrode 70 does not occur. As described above, also in the present embodiment, the memory liquid crystal display provided with the in-cell type touch panel 7 is realized.
In the present embodiment, in contrast to the first embodiment and the second embodiment, components for switching the state of the pixel electrode 102 between the floating state and the non-floating state is provided outside the liquid crystal panel 6. A detailed description will be given below.
Also in the present embodiment, the display voltage generation circuit 65 configured to generate the black voltage VA and the white voltage VB is provided inside the IC (see
Under the above assumptions, as illustrated in
In the example illustrated in
Note that the configuration of the state control circuit 170 is not limited to the configuration illustrated in
Also in the present embodiment, similar to the first embodiment, under the control of the timing control circuit 20, the floating control signal FCTL changes from the high level to the low level before the start of the touch detection period Td, and changes from the low level to the high level after the end of the touch detection period Td (see
According to the present embodiment, the state of the pixel electrode 102 can be switched between the floating state and the non-floating state by the state control circuit 170 provided outside the liquid crystal panel 6. Thus, the configuration of the pixel circuit 100 can prevent display defects (inversion of black and white) due to the pulse signal for touch detection being supplied to the common electrode 70, without changing the configuration from the known configuration (see
In each of the above-described embodiments, the pulse signal for touch detection is supplied to the common electrode 70 in the touch detection period Td. Various wiring lines such as the first gate bus line, the second gate bus line, the source bus line, the black voltage supply line VAL, the white voltage supply line VBL, and the like are arranged on the common electrode 70. When the potentials of the various wiring lines are maintained at a fixed potential, parasitic capacitances can be formed by the various wiring lines and the common electrode 70. Thus, in consideration of the presence of such parasitic capacitances, it is necessary to reduce the frequency of the pulse signal for touch detection.
Thus, in the present modification example, in order to prevent the various wiring lines from causing parasitic capacitance formation in the touch detection period Td, components for maintaining the various wiring lines in the floating state through the touch detection period Td are provided. Specifically, a switch circuit configured to switch the various wiring lines between the floating state and the non-floating state is provided at positions denoted by reference numerals 86 to 88 in
A scanning signal supply control switch circuit configured to control the electrical connection state between the gate driver 30 and the first gate bus line and the second gate bus line in the display portion 10 is provided in the position denoted by the reference numeral 86 in
A data signal supply control switch circuit configured to control the electrical connection state between the source driver 40 and the source bus line in the display portion 10 is provided in the position denoted by the reference numeral 87 in
A display voltage supply control switch circuit configured to control the electrical connection state between the display voltage generation circuit 65 and the black voltage supply line VAL and the white voltage supply line VBL in the display portion 10 is provided in the position denoted by the reference numeral 88 in
Note that the display voltage supply control switch circuit provided at the position denoted by the reference numeral 88 in
In each of the embodiments described above, a case where both an amplitude of the pulse signal for touch detection and an amplitude of the common electrode voltage VCOM in the periods other than the touch detection period Td are 5 V is described as an example, but no such limitation is intended. The amplitude of the pulse signal for touch detection and the amplitude of the common electrode voltage VCOM in the periods other than the touch detection period Td can be freely set. The amplitude of the pulse signal for touch detection and the amplitude of the common electrode voltage VCOM in the periods other than the touch detection period Td may be different from each other. For example, as illustrated in
In the embodiments described above, the common electrode drive circuit 50 (see
In contrast, in a case where a waveform such as that illustrated in
In the above, although the description is made focusing on a normally-white type liquid crystal display device, the disclosure can also be applied to a normally-black type liquid crystal display device.
Although the disclosure has been described in detail above, the above description is exemplary in all respects and is not limiting. It is understood that numerous other modifications or variations can be made without departing from the scope of the disclosure.
While preferred embodiments of the present invention have been described above, it is to be understood that variations and modifications will be apparent to those skilled in the art without departing from the scope and spirit of the present invention. The scope of the present invention, therefore, is to be determined solely by the following claims.
This application claims the benefit of priority to U.S. Provisional Application No. 63/123,840 filed on Dec. 10, 2020. The entire contents of the above-identified application are hereby incorporated by reference.
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| Co-Pending letter regarding a related co-pending. |
| Number | Date | Country | |
|---|---|---|---|
| 20220189428 A1 | Jun 2022 | US |
| Number | Date | Country | |
|---|---|---|---|
| 63123840 | Dec 2020 | US |
