Patent Application
20100123832
The present invention relates to a dummy scanning period of a liquid crystal display apparatus.
Liquid crystal display apparatuses have merits such as high definition, thinness, lightness in weight, and low power consumption. Recently, market scale of liquid crystal display apparatuses has been rapidly expanding. A liquid crystal display apparatus carries out AC driving in which a polarity of a signal potential is periodically (e.g., frame by frame) reversed. The AC driving causes a flicker. In view of this, a conventional liquid crystal display apparatus adopts (i) V-line inversion driving in which any two pixels adjacent in the line direction (i.e., in a direction in which scanning signal lines are provided) have respective signal potentials whose polarities are reverse to each other or (ii) dot inversion driving (1h/1v inversion driving) in which (a) any two pixels adjacent in a line direction have respective signal potentials whose polarities are reverse to each other and (b) any two pixels adjacent in a column direction (i.e., in a direction in which data signal lines are provided) have respective signal potentials whose polarities are reverse to each other.
In case of the V-line inversion driving, unfortunately, a flicker can be recognized by a viewer. On the other hand, the dot inversion driving has problems such as a decrease in pixel charging rate and/or an increase in power consumption, due to a high inversion frequency of a data signal line. In view of this, as is disclosed in Patent Literature 1 for example, block inversion driving (nh/1v inversion driving) is proposed in which a polarity of a signal potential is reversed for every plural pixels arrayed in the column direction whereas a polarity of a signal potential is reversed pixel by pixel for those arrayed in the line direction. According to the block inversion driving, a polarity of a signal potential to be supplied to a data signal line is reversed for every plural horizontal scanning periods. This allows an improvement in pixel charging rate, and also allows suppression of power consumption and an amount of heat, in contrast to the dot inversion driving.
As illustrated in
Patent Literature 1
Japanese Patent Application Publication, Tokukai, No. 2001-51252 A (Publication Date: Feb. 23, 2001)
Note however that a dummy scanning period which has a length equal to one horizontal scanning period is added every polarity reversal, i.e., every fifth horizontal scanning period (see
An object of the present invention is to suppress an increase in vertical display period although horizontal scanning periods and dummy scanning periods are provided in a liquid crystal display apparatus.
A liquid crystal panel driving apparatus of the present invention is a liquid crystal panel driving apparatus which sequentially receives, at intervals, pieces of video data each corresponding to one data signal line, wherein: the pieces of video data are divided into groups to each of which a predetermined number of pieces of video data belong and in each of which a piece of dummy data is added in a predetermined position; a signal potential corresponding to the piece of dummy data is outputted during a dummy scanning period; a signal potential corresponding to each of the predetermined number of pieces of video data is outputted during one horizontal scanning period; and the one horizontal scanning period is set to be shorter than each of the intervals at which said apparatus sequentially receives the pieces of video data. The liquid crystal panel driving apparatus, for example, (i) selects (arranges) pieces of video data so as to group the pieces of video data into a group containing a plurality of pieces of video data, and (ii) adds a piece of dummy data in a predetermined position in the group.
According to the arrangement, one horizontal scanning period in which a signal potential corresponding to a piece of video data is outputted is reduced shorter than an interval of inputting of pieces of video data (i.e., a horizontal scanning period assigned to a piece of video data to be inputted). A sum of such reduction makes it possible to provide dummy scanning periods for outputting pieces of dummy data. This makes it possible to suppress an increase in vertical display period even though a piece of dummy data is added to inputted video data while a dummy scanning period is assigned to the piece of dummy data. Further, this makes it possible to suppress an increase in time lag between inputting and outputting of data, and thereby reduce a memory (buffer) usage.
The liquid crystal panel driving apparatus can be arranged such that, in each of the groups, a product of (i) the number of the predetermined number of pieces of video data and (ii) any one of the intervals at which said apparatus sequentially receives the pieces of video data is equal to a sum of (I) a total of dummy scanning periods during each of which a corresponding piece of dummy data is outputted and (II) a total of horizontal scanning periods during which the respective predetermined number of pieces of video data are outputted.
This makes it possible to provide (add) dummy scanning periods without changing (i.e., without reducing) vertical scanning periods. This eliminates an increase in time lag between inputting and outputting of data. Therefore, the arrangement makes it possible to further reduce a memory (buffer) usage.
The liquid crystal panel driving apparatus can be arranged such that the piece of dummy data is added at a head of each of the groups.
The liquid crystal panel driving apparatus can be arranged such that, (i) each of signal potentials of respective predetermined number of pieces of video data and (ii) a signal potential of a piece of dummy data have a first polarity in one of adjacent ones of the groups, whereas (a) each of signal potentials of respective predetermined number of pieces of video data and (b) a signal potential of a piece of dummy data have a second polarity in the other of the adjacent ones of the groups. According to the arrangement, a desired piece of dummy data is added to, e.g., a head of each of data groups. This makes it possible to prevent a decrease in charging rate of a data signal line due to blunting of a waveform caused immediately after a polarity reversal.
The liquid crystal panel driving apparatus can be arranged such that the signal potentials corresponding to the respective predetermined number of pieces of video data are outputted to a corresponding data signal line in sync with scans of the respective scanning signal lines corresponding to the respective pieces of video data; the signal potential corresponding to the piece of dummy data is outputted to the data signal line (i) in sync with a scan of a scanning signal line corresponding to a piece of video data whose signal potential is outputted immediately after the signal potential of the dummy data or (ii) between (a) a scan of a scanning signal line corresponding to a piece of video data whose signal potential is outputted immediately before the signal potential of the dummy data and (b) a scan of a scanning signal line corresponding to a piece of video data whose signal potential is outputted immediately after the signal potential of the dummy data; and the respective scanning signal lines are subjected to progressive scanning in accordance with how the predetermined number of pieces of video data are arranged in each of the groups.
The liquid crystal panel driving apparatus can arranged such that the signal potentials corresponding to the respective predetermined number of pieces of video data are outputted to a corresponding data signal line in sync with scans of the respective scanning signal lines corresponding to the respective pieces of video data; the signal potential corresponding to the piece of dummy data is outputted to the data signal line (i) in sync with a scan of a scanning signal line corresponding to a piece of video data whose signal potential is outputted immediately after the signal potential of the dummy data or (ii) between (a) a scan of a scanning signal line corresponding to a piece of video data whose signal potential is outputted immediately before the signal potential of the dummy data and (b) a scan of a scanning signal line corresponding to a piece of video data whose signal potential is outputted immediately after the signal potential of the dummy data; and the respective scanning signal lines are subjected to interlaced scanning in accordance with how the predetermined number pieces of video data are arranged in each of the groups.
The liquid crystal panel driving apparatus may generate, in accordance with the horizontal scanning period and the dummy scanning period, (i) a signal for controlling (a) timing at which the signal potentials corresponding to the respective predetermined number of pieces of video data are outputted and (b) timing at which the signal potential of the piece of dummy data is outputted, and (ii) a signal for controlling timing at which gate ON pulses are outputted to the respective scanning signal lines corresponding to the predetermined number of pieces of video data.
A liquid crystal panel driving apparatus of the present invention: sequentially receives, at intervals, pieces of video data each corresponding to one data signal line, wherein: the pieces of video data are divided into groups to each of which a predetermined number of pieces of video data belong and in each of which (i) a signal potential corresponding to a predetermined piece of video data is outputted during a period of sum of one horizontal scanning period and at least one dummy scanning period and (ii) each of signal potentials corresponding to respective pieces of video data other than the predetermined piece of video data is outputted during one horizontal scanning period, and the one horizontal scanning period is set shorter than each of the intervals at which said apparatus sequentially receives the pieces of video data. The liquid crystal panel driving apparatus, for example, selects (arranges) pieces of video data so as to group the pieces of video data into a group containing a plurality of pieces of video data. The intervals (i.e., intervals of inputting of pieces of data) are regular in one frame.
According to the arrangement, one horizontal scanning period in which a signal potential corresponding to a piece of video data is outputted is reduced shorter than an interval of inputting of pieces of video data (i.e., a horizontal scanning period assigned to a piece of video data to be inputted). A sum of such reduction makes it possible to secure periods to be assigned to dummy scanning periods. This makes it possible to suppress an increase in vertical display period while providing (adding) dummy scanning periods. Further, this makes it possible to suppress an increase in time lag between inputting and outputting of data, and thereby reduce a memory (buffer) usage.
The liquid crystal panel driving apparatus is preferably arranged such that, in each of the groups, a product of (i) the number of the predetermined number of pieces of video data and (ii) any one of the intervals at which said apparatus sequentially receives the pieces of video data is equal to a sum of (I) a total of horizontal scanning periods during each of which the signal potential corresponding to the predetermined piece of video data is outputted, (II) a total of at least one dummy scanning period during which the signal potential corresponding to the predetermined piece of video data is outputted, and (III) a total of horizontal scanning periods during which the each of signal potentials corresponding to the respective pieces of video data other than the predetermined piece of video data is outputted. This makes it possible to provide (add) dummy scanning periods without changing (i.e., without reducing) vertical scanning periods. This eliminates an increase in time lag between inputting and outputting of data. Therefore, the arrangement makes it possible to further reduce a memory (buffer) usage.
The liquid crystal panel driving apparatus can be arranged such that signal potentials of respective predetermined number of pieces of video data have a first polarity (e.g., a positive polarity) in one of adjacent ones of the groups, whereas signal potentials of respective predetermined number of pieces of video data have a second polarity (e.g., a negative polarity) in the other of the adjacent ones of the groups. The arrangement makes it possible to reduce an effect of blunting of a signal waveform caused immediately after a polarity reversal.
The liquid crystal panel driving apparatus of the present invention can be arranged such that signal potentials corresponding to the respective predetermined number of pieces of video data are outputted to a corresponding data signal line in sync with scans of the respective scanning signal lines corresponding to the respective pieces of video data; and the respective scanning signal lines are subjected to progressive scanning in accordance with how the predetermined number of pieces of video data are arranged in each of the groups.
The liquid crystal panel driving apparatus of the present invention can be arranged such that signal potentials corresponding to the respective predetermined number of pieces of video data are outputted to a corresponding data signal line in sync with scans of the respective scanning signal lines corresponding to the respective pieces of video data; and the respective scanning signal lines are subjected to interlaced scanning in accordance with how the predetermined number of pieces of video data are arranged in each of the groups.
A liquid crystal panel driving apparatus of the present invention: receives pieces of video data each corresponding to one data signal line, wherein: the pieces of video data are divided into data strings in each of which (i) a predetermined number of pieces of video data, which are supplied in a predetermined period, are arranged in an order in which they are outputted and (ii) a piece of dummy data is added in a predetermined position; each of the predetermined number of pieces of video data is outputted during one horizontal scanning period and the piece of dummy data is outputted during one dummy scanning period; and one horizontal scanning period is set shorter than each of intervals at which the predetermined number of pieces of video data are supplied.
The liquid crystal panel driving apparatus can be arranged such that the predetermined period is equal to a sum of (i) a product of the number of the predetermined number of pieces of video data in each of the data strings and one horizontal scanning period and (ii) a product of the number of pieces of dummy data in a corresponding one of the data strings and a dummy scanning period.
The liquid crystal panel driving apparatus can be arranged such that the predetermined period is equal to a period found by subtracting a vertical blanking period from one vertical scanning period.
The liquid crystal panel driving apparatus can be arranged such that each of the data strings is made up of a plurality of groups arranged in chronological order; each of the plurality of groups has a piece of dummy data as a first piece of data, and a plurality of pieces of video data, as subsequent pieces of data; and signal potentials of a piece of dummy data and a plurality of pieces of video data have a first polarity in one of adjacent ones of the groups, whereas signal potentials of a piece of dummy data and a plurality of pieces of video data have a second polarity in the other of the adjacent ones of the groups.
The liquid crystal panel driving apparatus can be arranged such that the order in which the predetermined number of pieces of video data are arranged complies with progressive scanning or interlaced scanning which are carried out with respect to the scanning signal lines.
The liquid crystal panel driving apparatus can be arranged such that the signal potentials corresponding to the respective predetermined number of pieces of video data are outputted to a corresponding data signal line in sync with scans of the respective scanning signal lines corresponding to the respective pieces of video data; and the signal potential corresponding to the piece of dummy data is outputted to the data signal line between (a) a scan of a scanning signal line corresponding to a piece of video data whose signal potential is outputted immediately before the signal potential of the dummy data and (b) a scan of a scanning signal line corresponding to a piece of video data whose signal potential is outputted immediately after the signal potential of the dummy data.
The liquid crystal panel driving apparatus can be arranged such that a signal potential corresponding to the piece of dummy data is equal to a signal potential corresponding to a piece of video data whose signal potential is outputted immediately after the signal potential of the piece of dummy data.
The liquid crystal panel driving apparatus of the present invention can be arranged such that the predetermined piece of video data includes a first piece of video data and another piece of video data, in each of the groups.
The liquid crystal panel driving apparatus of the present invention can be arranged such that said dummy scanning period and said at least one dummy scanning period are each set to be shorter than each of the intervals at which said apparatus sequentially receives the pieces of video data.
The liquid crystal panel driving apparatus of the present invention can be arranged such that said dummy scanning period and said at least one dummy scanning period are each set to be equal to one horizontal scanning period. According to the arrangement, each dummy scanning period and each one horizontal scanning period are equal to each other. This makes it possible to simplify signal processing or an arrangement for the signal processing.
The liquid crystal panel driving apparatus of the present invention can be arranged such that said dummy scanning period and said at least one dummy scanning period are each set to be shorter than one horizontal scanning period. This makes it possible to secure long one horizontal scanning period. This is advantageous to increasing in charging rate of a pixel.
The liquid crystal panel driving apparatus of the present invention can be arranged such that said dummy scanning period and said at least one dummy scanning period are each set to be longer than one horizontal scanning period. This realizes an arrangement which is advantageous to increasing a charging rate of a data signal line immediately after a polarity reversal, in an arrangement in which a polarity of a signal potential is reversed group by group.
The liquid crystal panel driving apparatus of the present invention can be arranged such that the following steps (a) through (e) are carried out so as to find, for each of the groups, a combination of: (i) the number of dummy scanning periods; (ii) one horizontal scanning period; and (iii) a dummy scanning period, in a case where each of the groups has M horizontal scanning periods; the steps are: (a) determining whether or not B is not less than a predetermined value, where “a” indicates a variable which is an integer of not less than 1, A is a sum of M and “a”, and B is found by dividing, by A, a product of M and any one of the intervals at which said apparatus sequentially receives the pieces of video data, (b) determining whether or not F is an integer in a case where B is determined in the step (a) to be not less than the predetermined value, where D is an integer obtained by rounding down fractions below decimal point of B, E is a product of D and A, P is obtained by subtracting E from the product of M and any one of the intervals at which said apparatus sequentially receives the pieces of video data, and F is found by dividing P by “a,” (c) determining whether or not “a” is not less than a minimal required number of dummy scanning periods in a case where F is determined in the step (b) to be an integer, where the minimal required number is obtained from a charging characteristic at M, (d) storing a combination of: a dummy scanning period of “a”; one horizontal scanning period of D; and a dummy scanning period of a sum of D and F, in a case where “a” is determined in the step (c) to be not less than the minimal required number of the dummy scanning periods, and (e) changing “a”, and selecting one of combinations obtained by carrying out repeatedly the steps (a) through (d).
A drive condition setting program of the present invention causes the liquid crystal panel driving apparatus to operate, the drive condition setting program causing a computer to carry out the steps (a) through (e).
A method of the present invention for driving a liquid crystal display apparatus which sequentially receives, at intervals, pieces of video data each corresponding to one data signal line, said method includes the steps of: dividing the pieces of video data into groups to each of which a predetermined number of pieces of video data belong and in each of which a piece of dummy data is added in a predetermined position; outputting a signal potential corresponding to the piece of dummy data during a dummy scanning period; outputting a signal potential corresponding to each of the predetermined number of pieces of video data during one horizontal scanning period; and setting the one horizontal scanning period shorter than each of the intervals at which said apparatus sequentially receives the pieces of video data. According to the method, for example, pieces of video data are selected (arranged) so as to be grouped into a group containing a plurality of pieces of video data while a piece of dummy data is added to a predetermined position in the group.
The method for driving a liquid crystal display apparatus preferably arranged such that, in each of the groups, a sum of (i) a total of dummy scanning periods during each of which a corresponding piece of dummy data is outputted and (ii) a total of horizontal scanning periods during which the each of the predetermined number of pieces of video data is outputted is equal to a product of (I) the number of the predetermined number of pieces of video data and (II) any one of the intervals at which said apparatus sequentially receives the pieces of video data.
A method of the present invention for driving a liquid crystal display apparatus which sequentially receives, at intervals, pieces of video data each corresponding to one data signal line, said method includes the steps of: dividing the pieces of video data into groups to each of which a predetermined number of pieces of video data belong and in each of which (i) a signal potential corresponding to a predetermined piece of video data is outputted during a period of sum of one horizontal scanning period and at least one dummy scanning period and (ii) each of signal potentials corresponding to respective pieces of video data other than the predetermined piece of video data is outputted during one horizontal scanning period, and setting the one horizontal scanning period shorter than each of the intervals at which said apparatus sequentially receives the pieces of video data. According to the method, for example, pieces of video data are selected (arranged) so as to be grouped into a group containing a plurality of pieces of video data.
The method for driving a liquid crystal display apparatus is preferably arranged such that, in each of the groups, a sum of (I) a total of horizontal scanning periods during each of which the signal potential corresponding to the predetermined piece of video data is outputted, (II) a total of at least one dummy scanning period during which the signal potential corresponding to the predetermined piece of video data is outputted, and (III) a total of horizontal scanning periods during which the each of signal potentials corresponding to the respective pieces of video data other than the predetermined piece of video data is outputted is equal to a product of (i) the number of the predetermined number of pieces of video data and (ii) any one of the intervals at which said apparatus sequentially receives the pieces of video data.
A method of the present invention for driving a liquid crystal display apparatus which sequentially receives pieces of video data each corresponding to one data signal line, said method includes the steps of: dividing the pieces of video data into data strings in each of which (i) a predetermined number of pieces of video data, which are supplied in a predetermined period, are arranged in an order in which they are outputted and (ii) a piece of dummy data is added in a predetermined position; outputting each of the predetermined number of pieces of video data during one horizontal scanning period; outputting the piece of dummy data during one dummy scanning period; and setting one horizontal scanning period shorter than each of intervals at which the predetermined number of pieces of video data are supplied. In this case, the method can be further arranged such that the predetermined period is equal to a sum of (i) a product of the number of the predetermined number of pieces of video data in each of the data strings and one horizontal scanning period and (ii) a product of the number of pieces of dummy data in a corresponding one of the data strings and a dummy scanning period.
The liquid crystal display apparatus of the present invention includes a liquid crystal panel and the liquid crystal panel driving apparatus for driving the liquid crystal panel.
A television receiver of the present invention includes: the liquid crystal display apparatus; and a tuner section for receiving television broadcast.
As described above, the liquid crystal panel driving apparatus of the present invention makes it possible to suppress an increase in vertical display period even though the liquid crystal panel driving apparatus adds a piece of dummy data to inputted video data while assigning a dummy scanning period to the piece of dummy data. In addition, the liquid crystal panel driving apparatus makes it possible to suppress an increase in time lag between inputting and outputting of data. As a result, a memory (buffer) usage can be reduced.
The following description deals with an embodiment of the present invention.
The liquid crystal panel 100 includes a plurality of (“m”) gate lines (scanning signal lines) GL1 through GLm, a plurality of (“n”) source lines (data signal lines) SL1 through SLn each of which intersects with the gate lines GL1 through GLm, and a plurality of (m×n) pixels provided at respective intersections of the gate lines GL1 through GLm and the source lines SL1 through SLn. A direction in which the gate lines extend is referred to as line direction, and a direction in which the source lines extend is referred to as column direction.
Each of the plurality of pixels includes: a TFT 10 which has (i) a gate terminal connected to a gate line GLj running through a corresponding one of the intersections and (ii) a source terminal connected to a source line SLi running through the corresponding one of the intersections; a pixel electrode connected to a drain terminal of the TFT 10; a part of a common electrode Ec which part corresponds to the pixel electrode; and a liquid crystal layer sandwiched between the pixel electrode and the common electrode Ec. A pixel capacitor Cp is defined by a liquid crystal capacitor formed between the pixel electrode and the common electrode Ec. In order to retain and control an electric potential of the pixel electrode, An auxiliary capacitor (retention capacitor) is provided parallel to the liquid crystal capacitor. The auxiliary capacitor is formed between an auxiliary capacitor line and the pixel electrode or a capacitor electrode connected to the auxiliary capacitor line.
The source driver 300 applies a signal potential to a pixel electrode in each of the plurality of pixels via corresponding source line and TFT, in accordance with an image to be displayed. A power supply circuit (not illustrated) supplies a predetermined electric potential Vcom to the common electrode Ec. This causes a voltage to be applied to liquid crystal in accordance with an electric potential difference between the signal potential of the pixel electrode and the predetermined potential Vcom of the common electrode Ec. A light transmittance of the liquid crystal layer is controlled, so that image display is carried out.
The backlight 600 is a plane illumination device for illuminating the liquid crystal panel 100 from behind. The backlight 600 is constituted by for example a cold-cathode tube serving as a linear light source and a light guide plate. The backlight 600 is driven by the light source driving circuit 700 to be turned on. As a result, each of the plurality of pixels in the liquid crystal panel 100 is irradiated with light emitted from the backlight 600.
The display control circuit 200 receives from an external signal source: a digital video signal Dv indicative of an image to be displayed; a horizontal sync signal HSY and a vertical sync signal VSY which correspond to the digital video signal Dv; and a control signal Dc for controlling a display operation. In accordance with the signals Dv, HSY, VSY, and Dc thus received, the display control circuit 200 generates and outputs signals, such as a data start pulse signal SSP, a data clock signal SCK, a latch strobe signal (data signal application control signal) LS, a polarity reversal signal POL, a digital image signal DA (signal corresponding to the digital video signal Dv) indicative of an image to be displayed, a gate start pulse signal GSP, a gate clock signal GCK, and a gate driver output control signal (scanning signal output control signal) GOE, for causing the liquid crystal panel 100 (display section) to display an image indicated by the digital video signal Dv.
More specifically, in an internal memory of the display control circuit 200, a timing adjustment etc. are carried out with respect to the digital video signal Dv as needed, and the digital video signal Dv is then outputted from the display control circuit 200 as the digital image signal DA. The data clock signal SCK is generated as a signal having pulses corresponding to respective pixels of an image indicated by the digital image signal DA. The data start pulse signal SSP is generated as a signal which has an High level (H level) only during a predetermined period every horizontal scanning period, in accordance with the horizontal sync signal HSY. The gate start pulse signal GSP (GSPa, GSPb) is generated as a signal which has an H level only during a predetermined period every frame period (every vertical scanning period), in accordance with the vertical sync signal VSY. The gate clock signal GCK (GCKa, GCKb) is generated in accordance with the horizontal sync signal HSY. The latch strobe signal LS and the gate driver output control signal GOE (GOEa, GOEb) are generated in accordance with the horizontal sync signal HSY and the control signal Dc.
Among the signals thus generated in the display control circuit 200, the digital image signal DA, the latch strobe signal LS, the data start pulse signal SSP, the data clock signal SCK, and the polarity reversal signal POL are supplied to the source driver 300, whereas the gate start pulse signal GSP, the gate clock signal GCK, and the gate driver output control signal GOE are supplied to the gate driver 400.
The source driver 300 sequentially generates data signals S(1) through S(n) every horizontal scanning period as analog voltages, corresponding to gradation values of respective pixels on a corresponding horizontal scanning line, of an image indicated by the digital image signal DA in accordance with the digital image signal DA, the data start pulse signal SSP, the data clock signal SCK, the latch strobe signal LS, and the polarity reversal signal POL. The data signals S(1) through S(n) thus generated are applied to the source lines SL1 through SLn, respectively.
The gate driver 400 generates scanning signals G(1) through G(m) in accordance with the gate start pulse signal GSP (GSPa, GSPb), the gate clock signal GCK (GCKa, GCKb), and the gate driver output control signal GOE (GOEa, GOEb). The scanning signals G(1) through G(m) thus generated are applied to the gate lines GL1 through GLm, respectively. This causes the gate lines GL1 through GLm to be selectively driven. The gate lines GL1 through GLm can be selectively driven by applying, as the scanning signals G(1) through G(m), gate ON pulses whose pulse widths are respective selection periods to the gate lines GL1 through GLm.
The source driver 300 thus drives the source lines SL1 through SLn of the liquid crystal panel 100, and the gate driver 400 thus drives the gate lines GL1 through GLm of the liquid crystal panel 100. This causes a signal potential of a source line SLi is applied to a corresponding pixel electrode via a corresponding TFT 10 connected to a selected gate line GLj (i=1 through n; j=1 through m). Thus, a voltage is applied to a liquid crystal layer of each of the plurality of pixels in response to the digital image signal DA. A transmittance of light emitted from the backlight 600 in each of the plurality of pixels is controlled by the voltage thus applied. The image indicated by the digital video signal Dv is ultimately displayed over the plurality of pixels.
Examples of display methods encompass progressive scanning and interlaced scanning. According to the progressive scanning, the gate lines GL1 through GLm are sequentially selected line by line from an uppermost one to a lowermost one while one screen image is being displayed, i.e., during one frame period. According to the interlaced scanning, the gate lines GL1 through GLm are divided into a plurality of groups to each of which a predetermined number of gate lines belong so that the plurality of groups are separated from each other by a predetermined number of gate lines, and the plurality of groups are sequentially scanned. In a case where the gate lines GL1 through GLm are divided into two groups so as to alternately belong to one and the other of the two groups, during one frame period, odd-numbered ones of or even-numbered ones of the gate lines GL1 through GLm are sequentially selected from their uppermost one to their lowermost one, and then, the even-numbered ones of or the odd-numbered ones of the gate lines GL1 through GLm are sequentially selected from their uppermost one to their lowermost one.
The following description deals with an arrangement in which (i) pieces of video data are selected (arranged) in the order in which they are inputted, (ii) the pieces of video data are divided into a plurality of groups to which a predetermined number of pieces of video data (i.e., pieces of video data corresponding to one source line) belong, (iii) at least one piece of dummy data is added at a head of each of the plurality of groups, (iv) signal potentials corresponding to respective pieces of data (the pieces of video data and the at least one piece of dummy data) are outputted, in sync with progressive scanning of scanning signal lines, to respective source lines in the order in which the pieces of data are arranged, (v) a signal potential corresponding to each of the plurality of pieces of video data is outputted during one horizontal period, and a signal potential corresponding to each of the at least one piece of dummy data is outputted during a dummy scanning period, and (vi) polarities of the signal potentials are reversed group by group. The arrangement can realize block inversion driving (nh/1v inversion driving) in which polarities of respective signal potentials to be outputted to a plurality pixels arranged in any adjacent columns are reversed column by column. Note that polarities of respective signal potentials to be outputted to any adjacent pixels arranged in the line direction are reversed pixel by pixel.
In this case, pieces of video data to be inputted are arrayed in the order numbered: 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, . . . . Here, a piece of video data which corresponds to an N-th gate line is given number N. In a dummy data adding circuit of the display control circuit 200, (i) the pieces of video data are divided into groups for example as follows: 1, 2, 3, . . . 8, 9, and 10; 11, 12, 13, . . . 18, 19, and 20; 21, 22, . . . and (ii) a piece of dummy data is added at a head of each of the groups. With the arrangement, the pieces of data (the pieces of video data and the piece of dummy data) are outputted in the following order: <D>, <1>, <2>, <3>, <4>, <5>, <6>, <7>, <8>, <9>, and <10>; <D>, <11>, <12>, <13>, <14>, <15>, <16>, <17>, <18>, <19>, and <20>; <D>, <21>, <22>, . . . (see
It should be noted that any piece of data can be set as the piece of dummy data <D>. For example, the piece of dummy data <D> can be identical with a piece of video data whose signal potential is outputted immediately after the signal potential of the piece of dummy data <D>. Alternatively, the piece of dummy data <D> can be set to a piece of data whose signal potential is higher than that of a piece of video data whose signal potential is outputted immediately after the signal potential of the piece of dummy data <D>, from a viewpoint of an improvement in charging effect of a source line.
A waveform of a signal potential becomes blunt immediately after a polarity of the signal potential is reversed. In view of this, according to the arrangement, a dummy scanning period is secured immediately after a polarity reversal so that a predetermined signal potential (a signal potential corresponding to a piece of dummy data) is applied to a source line. This makes it possible to charge the source line during the dummy scanning period. This makes it possible to write a desired signal potential (an electric potential corresponding to a piece of video data) to a pixel during a horizontal scanning period which comes after a dummy scanning period. This makes it possible to prevent display unevenness which occurs every 10 lines due to blunting of a waveform of a signal potential which blunting is caused immediately after each polarity reversal.
As described above, the liquid crystal display apparatus of the present invention is arranged such that: one horizontal scanning period HtotalY in actual outputting is shorter than one horizontal scanning period HtotalX set to a video data string to be inputted so that a vertical display period of one frame does not vary (i.e., so that a vertical blanking period VblankX set to video data strings to be inputted is equal to a vertical blanking period VblankY in actual outputting), even though, as described above, (i) a piece of dummy data is added to each of the groups which contains 10 pieces of video data and (ii) pieces of dummy data are outputted during respective dummy scanning periods. This is explained below.
According to the liquid crystal display apparatus of the present embodiment, (i) one horizontal scanning period HtotalY during which a piece of video data is actually outputted corresponds to 2000 dots and (ii) a dummy scanning period DtotalY during which a piece of dummy data is actually outputted also corresponds to 2000 dots, although one horizontal scanning period HtotalX during which each of pieces of video data in a video data string is inputted is set to correspond to 2200 dots (see
More specifically, as illustrated in
A signal potential is supplied to a source line throughout one horizontal scanning period (HtotalY) including a horizontal blanking period (HblankY). A writing operation is carried out to a pixel during a period in which a transistor of the pixel turns ON in sync with a corresponding horizontal scanning period (i.e., during a period in which a gate ON pulse is supplied to a corresponding gate line). In addition, a signal potential is supplied to a source line also throughout a dummy scanning period (DtotalY) including a dummy blanking period (DblankY). Unlike the arrangement illustrated in
In
With the arrangement, it is possible for a horizontal display period HdispX to be identical to a horizontal display period HdispY. This makes it possible to add one piece of dummy scanning period every 10 horizontal scanning periods, without (i) changing a dot clock, (ii) increasing a vertical display period of a liquid crystal display apparatus, and (iii) reducing a vertical blanking period (i.e., while maintaining the following relations: VdispX=VdispY; VblankX=VblankY).
The arrangement also allows an advantage in easy signal processing or an easy arrangement for the signal processing. This is because a dummy scanning period DtotalY is equal (2000 dots) to a one horizontal scanning period HtotalY.
The display control circuit 200 (liquid crystal panel driving apparatus) determines a combination of: (i) a total number of horizontal scanning periods (the number of pieces of video data) in one group; (ii) a total number of dummy scanning periods (the number of pieces of dummy data) in one group, (iii) one horizontal scanning period HtotalY, and (iv) a dummy scanning period DtotalY. In accordance with the combination, the display control circuit 200 generates the signals (POL, LS, SSP, SCK, GCK, GSP, and GOE) etc. The display control circuit 200 also adds a piece of dummy data to a supplied piece of video data.
According to the arrangement, a piece of dummy data is added to pieces of video data which are sequentially supplied. However, the present embodiment is not limited to this. This can be replaced by an arrangement in which a dummy scanning period is secured for example by omitting one latch pulse, without adding a piece of dummy data (i.e., while maintaining a video data string as supplied). According to the arrangement, it should be noted that a same piece of video data is supplied to a source line during a dummy scanning period and a subsequent one horizontal scanning period.
As illustrated in
More specifically, as illustrated in
A signal potential is supplied to a source line throughout one horizontal scanning period (HtotalY) including a horizontal blanking period (HblankY). A writing operation is carried out to a pixel during a period in which a transistor of the pixel turns ON in sync with a corresponding horizontal scanning period (i.e., during a period in which a gate ON pulse is supplied to a corresponding gate line). In addition, a signal potential is supplied to a source line also throughout a dummy scanning period (DtotalY) including a dummy blanking period (DblankY). Unlike the arrangement illustrated in
With the arrangement, it is possible for a horizontal display period HdispX to be identical to a horizontal display period HdispY. This makes it possible to add one piece of dummy scanning period every 20 horizontal scanning periods, without (i) changing a dot clock, (ii) increasing a vertical display period of a liquid crystal display apparatus, and (iii) reducing a vertical blanking period (i.e., while maintaining the following relations: VdispX=VdispY; VblankX=VblankY).
In addition, according to the arrangement, a dummy scanning period DtotalY corresponds to 2080 dots, and one horizontal scanning period HtotalY corresponds to 2096 dots. As such, it is possible to secure a long horizontal scanning period. This is advantageous to the charging of a pixel.
In a case where a piece of dummy data is added to each group containing 20 pieces of video data, and a dummy scanning period is assigned to each piece of the dummy data, as illustrated in
Also in this case, it is possible for a horizontal display period HdispX to be identical to a horizontal display period HdispY. This makes it possible to add one piece of dummy scanning period every 20 horizontal scanning periods, without (i) changing a dot clock, (ii) increasing a vertical display period of a liquid crystal display apparatus, and (iii) reducing a vertical blanking period (i.e., while maintaining the following relations: VdispX=VdispY; VblankX=VblankY).
In addition, according to the arrangement, a dummy scanning period DtotalY corresponds to 2120 dots, and one horizontal scanning period HtotalY corresponds to 2094 dots. As such, it possible to secure a long dummy scanning period. This is advantageous to the charging of a source line in a case where a waveform of a signal voltage is greatly blunting after a polarity reversal.
By setting HtotalY (=HdispY+HblankY) and DtotalY (=DdispY+DblankY) to be one of combinations shown in
The following description deals with an arrangement in which (i) for interlaced scanning, pieces of video data are selected (arranged) so as to alternately belong to two groups in the order in which they are inputted, (ii) the pieces of video data are divided into a plurality of groups to which a predetermined number of pieces of video data (i.e., pieces of video data corresponding to one source line) belong, (iii) at least one piece of dummy data is added at a head of each of the plurality of groups, (iv) signal potentials corresponding to respective pieces of data (the pieces of video data and the at least one piece of dummy data) are outputted, in sync with interlaced scanning of scanning signal lines (i.e., interlaced scanning in which scanning is carried out with respect to every other gate line), to respective source lines in the order in which the pieces of data are arranged, (v) a signal potential corresponding to each of the plurality of pieces of video data is outputted during one horizontal period, and a signal potential corresponding to each of the at least one piece of dummy data is outputted during a dummy scanning period, and (vi) polarities of the signal potentials are reversed group by group. The arrangement can realize dot inversion driving (1h/1v inversion driving) in which polarities of respective signal potentials to be outputted to a plurality pixels arranged in any adjacent columns are reversed pixel by pixel. Note that polarities of respective signal potentials to be outputted to any adjacent pixels arranged in the line direction are reversed pixel by pixel. According to the arrangement, a sorting circuit is provided in the display control circuit 200 illustrated in
In this case, pieces of video data (not illustrated) to be inputted are arrayed as follows: 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24 . . . , where a piece of video data N (N=1, 2, 3 . . . ) corresponds to an N-th gate line. In the sorting circuit, (i) the pieces of video data are divided into groups for example as follows: 2, 4, 6, 8, 10, 12, 14, 16, 18, and 20; 1, 3, 5, 7, 9, 11, 13, 15, 17, and 19; 22, 24 . . . and (ii) a piece of dummy data is added at a head of each of the groups. With the arrangement, the pieces of data (the pieces of video data and the piece of dummy data) are outputted in the following order: <D>, <2>, <4>, <6>, <8>, <10>, <12>, <14>, <16>, <18>, and <20>; <D>, <1>, <3>, <5>, <7>, <9>, <11>, <13>, <15>, <17>, and <19>; <D>, <22>, <24>, . . . . Here, a piece of video data which corresponds to an N-th gate line is represented by <N>, and a piece of dummy data is represented by <D>. Signal potentials, which have a positive polarity and correspond to the respective pieces of data, i.e., correspond to <D>, <2>, <4> . . . and <20>, are supplied to one source line in this order. Then, signal potentials, which have a negative polarity and correspond to the respective pieces of data, i.e., correspond to <D>, <1>, <3>, . . . and <19>, are supplied to the one source line in this order. Then, signal potentials which have the positive polarity and correspond to the respective pieces of data: <D>, <22>, <24> . . . are supplied to the one source line in this order.
It should be noted that any piece of data can be set as a piece of dummy data <D>. For example, a piece of dummy data <D> can be identical with a piece of video data whose signal potential is outputted immediately after the signal potential of the piece of dummy data <D>. Alternatively, the piece of dummy data <D> can be set to a piece of data whose signal potential is higher than that of a piece of video data whose signal potential is outputted immediately after the signal potential of the piece of dummy data <D>, from a viewpoint of an improvement in charging effect of a source line.
A waveform of a signal potential becomes blunt immediately after a polarity of the signal potential is reversed. In view of this, according to the arrangement, a dummy scanning period is secured immediately after a polarity reversal so that a predetermined signal potential (a signal potential corresponding to a piece of dummy data) is applied to a source line. This makes it possible to charge the source line during the dummy scanning period. This makes it possible to write a desired signal potential (an electric potential corresponding to a piece of video data) to a pixel during a horizontal scanning period which comes after a dummy scanning period. Further, it is possible to seemingly carry out dot inversion of respective opposite polarities of pixels by inverting respective opposite polarities of signal voltages to be applied to two adjacent source lines. This is effective against a flicker etc.
The liquid crystal display apparatus of the present invention is arranged such that: one horizontal scanning period HtotalY in actual outputting is shorter than one horizontal scanning period HtotalX set to a video data string to be inputted so that a vertical display period of one frame does not vary (i.e., so that a vertical blanking period VblankX set to video data strings to be inputted is equal to a vertical blanking period VblankY in actual outputting), even though, as described above, (i) a piece of dummy data is added to each of the groups which contains 10 pieces of video data and (ii) pieces of dummy data are outputted during respective dummy scanning periods.
More specifically, as illustrated in
Also in this case, as illustrated in
A liquid crystal display apparatus can be alternatively arranged as is illustrated in
According to the liquid crystal panel 100 employing a pixel division method, (i) a first pixel electrode and a second pixel electrode are provided for a pixel Px (not illustrated), (ii) a retention capacitance is defined by (a) a capacitor electrode connected to the first pixel electrode and (b) a retention capacitor line Csi, and (iii) a retention capacitance is defined by (A) a capacitor electrode connected to the second pixel electrode and (B) a retention capacitor line Csj. Two pixels Py and Pz are provided so as to be adjacent to the pixel Px in the column direction (Pixels Py and Pz). The pixel Px and the pixel Py share the retention capacitor line Csi whereas the pixel Px and the pixel Pz share the retention capacitor line Csj. Identical signal potentials are written into the two pixel electrodes of the pixel Px while a gate ON pulse is being supplied to a corresponding gate line. However, after the supplying of the gate ON pulse is stopped (i.e., after a gate OFF state), an overshoot potential and an undershoot potential (CS signals) are supplied to the retention capacitor lines Csi and Csj, respectively. This causes the first and second pixel electrodes to be controlled so as to have respective different electric potentials (effective electric potentials).
In this case, pieces of video data (not illustrated) to be inputted are arrayed as follows: 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, . . . 43, 44, 45, 46, 47, 48, 49 where a piece of video data N (N=1, 2, 3 . . . ) corresponds to an N-th gate line. In the sorting circuit, (i) the pieces of video data are divided into groups for example as follows: 1, 3, 5, 7, 9, 11, 13, 15, 17, and 19; 2, 4, 6, 8, 10, 12, . . . 36, 38, and 40; 21, 23, 25, . . . 45, 47, and 49; 42, 44, 46, 48 . . . and (ii) a piece of dummy data is added at a head of each of the groups. With the arrangement, the pieces of data (the pieces of video data and the piece of dummy data) are outputted in the following order: <D>, <1>, <3>, <5>, <7>, <9>, <11>, <13>, <15>, <17>, and <19>, <D>, <2>, <4>, <6>, <8>, <10>, <12> . . . <36>, <38>, and <40>; <D>, <21>, <23>, <25>, <27>, . . . <45>, <47>, and <49>; <D>, <42>, <44>, . . . . Here, a piece of video data which corresponds to an N-th gate line is represented by <N>, and a piece of dummy data is represented by <D>. Signal potentials, which have a positive polarity and correspond to the respective pieces of data, i.e., correspond to <D>, <1>, <3>, <5> . . . <17>, and <19>, are supplied to one source line in this order. Then, signal potentials, which have a negative polarity and correspond to the respective pieces of data, i.e., correspond to <D>, <2>, <4>, <6>, <36>, <38>, and <40>, are supplied to the one source line in this order. Then, signal potentials which have the positive polarity and correspond to the respective pieces of data: <D>, <21>, <23>, <25>, <47>, and <49> are supplied to the one source line in this order. Then, signal potentials, which have a negative polarity and correspond to the respective pieces of data, i.e., correspond to <D>, <42>, <44>, . . . are supplied to the one source line in this order.
It should be noted that any piece of data can be set as a piece of dummy data <D>. For example, a piece of dummy data <D> can be identical with a piece of video data whose signal potential is outputted immediately after the signal potential of the piece of dummy data <D>. Alternatively, the piece of dummy data <D> can be set to a piece of data whose signal potential is higher than that of a piece of video data whose signal potential is outputted immediately after the signal potential of the piece of dummy data <D>, from a viewpoint of an improvement in charging effect of a source line.
In this case, it is possible to provide dummy scanning periods, without changing a vertical display period corresponding to one frame, by arranging such that: for the first group, one horizontal scanning period HtotalY corresponds to 2000 dots in actual outputting, which are less than HtotalX, and a dummy scanning period DtotalY corresponds to 2000 dots, which are less than HtotalX; and, for subsequent groups, one horizontal scanning period HtotalY corresponds to 2094 dots in actual outputting, which are less than HtotalX, and a dummy scanning period DtotalY corresponds to 2120 dots, which are less than HtotalX.
The following is a description as to a method for sorting pieces of data, with reference to
The sorting control circuit 552 receives pieces of video data to be displayed, a vertical sync signal and a horizontal sync signal which are in sync with the pieces of video data, and a control signal for controlling a display operation. The sorting control circuit 552 (i) separates, line by line, supplied pieces of video data into pieces of video data for odd-numbered lines and pieces of video data for even-numbered lines, (ii) continues to write, during a predetermined period, the pieces of video data for odd-numbered lines and the pieces of video data for even-numbered lines into the sorting memory 554A for odd-numbered lines and the sorting memory 5548 for even-numbered lines, respectively, (iii) sequentially reads out the pieces of video data for odd-numbered lines from the sorting memory 554A, and (iv) then sequentially reads out the pieces of video data for even-numbered lines from the sorting memory 554B.
The sorting control circuit 552 counts the number of pieces of video data in accordance with the number of lines of each of the groups, reads out the pieces of video data from the sorting memories 554A and 554B, and adds a piece of dummy data <D> in a predetermined position in each of the groups (e.g., at a head of each of the groups). Both each one horizontal scanning period during which a piece of video data is outputted and each dummy scanning period during which a piece of dummy data is outputted are arranged to be shorter than one horizontal scanning period during which a piece of video data is inputted (i.e., shorter than each of intervals at which pieces of video data are inputted). The orders in which the pieces of video data are written into and read out are predetermined orders, by reference to a look-up table which is prepared in advance. This allows (i) a reduction in scale of each of the respective sorting memories 554A and 554B without using a frame memory for memorizing pieces of video data corresponding to one display screen, and (ii) suppression of a time-lag between inputting and outputting of each of the pieces of video data.
For example, as illustrated in
Specifically, a first piece of video data (a piece of video data corresponding to a first gate line) is read out, as a piece of dummy data <D>, from the sorting memory 554A for odd-numbered lines. Then, 10 pieces of video data for 10 gate lines (i.e., for 1, 3, 5, . . . and 19th line) are sequentially read out from the sorting memory 554A for odd-numbered lines. The first piece and the 10 pieces of video data thus read out belong to a first group. Then, a second piece of video data (a piece of video data for a second gate line) is read out as a piece of dummy data <D> from the sorting memory 554B for even-numbered lines. Then, 10 pieces of video data for 10 gate lines (i.e., for 2, 4, 6, . . . and 20th line) are sequentially read out from the sorting memory 554B for even-numbered lines. Further, 10 pieces of video data for 10 gate lines (i.e., for 22, 24, 26, . . . and 40th line) are sequentially read out from the sorting memory 554B for even-numbered lines. The second piece, the 10 pieces, and other 10 pieces of video data thus read out are grouped into a second group. Then, a 21st piece of video data (i.e., a piece of video data for a 21st gate line) is read out, as a piece of the dummy data <D> from the sorting memory 554A for odd-numbered lines. Then, 10 pieces of video data for 10 gate lines (i.e., for 21, 23, 25, . . . and 39th line) are sequentially read out from the sorting memory 554A for odd-numbered lines. The 21st piece and the 10 pieces of video data thus read out are grouped into a third group. The sorting control circuit 552 repeatedly controls a sequence of such operations, so that readouts from the sorting memories 554A and 554B are carried out with respect to from the first gate line to a last gate line.
In the example, a headmost piece of dummy data <D> (i.e., a piece of data which is identical with a piece of video data corresponding to a first gate line which is the headmost gate line of each of the groups) is included in a vertical display period VdispY. However, the example is not limited to this. Alternatively, the headmost piece of dummy data <D> can be provided as a rearmost piece of data in a vertical blanking period VblankY of a previous frame.
The following describes, in a case where M pieces of video data belong to each of the groups in each of the embodiments, (i) how many dummy scanning periods (i.e., how many pieces of dummy data) should be prepared for one group and (ii) how to find a combination of one horizontal scanning period HtotalY, during which a piece of video data is actually outputted, and a dummy scanning period DtotalY. Note, as described above, that such a finding process can be alternatively carried out by the display control circuit 200 (liquid crystal panel driving apparatus). In this case, the finding process can be carried out by causing a computer to execute a predetermined program.
According to the finding process, in the case of M=10, a combination of the number of dummy scanning periods=1 and HtotalY=DtotalY=2000 dots is found; in the case of M=30, a combination of the number of dummy scanning periods=3 and HtotalY=DtotalY=2000 dots is found; in the case of M=40, a combination of the number of dummy scanning periods=4 and HtotalY=DtotalY=2000 dots is found. Thus, the finding process makes it possible to promptly find a combination of HtotalY and DtotalY which satisfy HtotalY=DtotalY.
Unfortunately, the finding process cannot find with a combination in case of M=20. In view of this, the following finding process can be adopted. The finding process is illustrated in
In the recalculation in S23: α and β which satisfy the equation: HtotalX (2200)×M=M×α+C×β are found by use of C (the minimal required number C of dummy scanning periods); the number of dummy scanning periods is set to C; HtotalY is set to a; and DtotalY is set to β.
According to the finding process illustrated in
The following describes an arrangement example of application of the liquid crystal display apparatus to a television receiver.
In the liquid crystal display apparatus 800 arranged as above, a composite color video signal Scv is externally supplied, as a television signal, to the Y/C separation circuit 80, so as to be separated into a luminance signal and a color signal. The luminance signal and the color signal are converted by the video chroma circuit 81 into an analog RGB signal corresponding to three primary light colors. The analog RGB signal is converted into a digital RGB signal by the A/D converter 82. The digital RGB signal is supplied to the liquid crystal controller 83. In the Y/C separation circuit 80, a horizontal sync signal and a vertical sync signal are extracted from the composite color video signal Scv thus externally supplied. The horizontal sync signal and the vertical sync signal are also supplied to the liquid crystal controller 83 via the microcomputer 78.
The digital RGB signal and a timing signal generated in sync with the horizontal sync signal and the vertical sync signal are supplied from the liquid crystal controller 83 to the liquid crystal display unit 84 at a predetermined timing. In the gradation circuit 88, respective gradation voltages of three primary colors R, G, and B of color display are generated, so as to be also supplied to the liquid crystal display unit 84. In the liquid crystal display unit 84, internal members such as the source driver and the gate driver generate driving signals (i.e., data signals such as a signal potential and a scanning signal) in accordance with the digital RGB signal, the timing signal, and the gradation voltages. In accordance with the driving signals, the liquid crystal panel inside the liquid crystal display unit 84 displays a color image. In order that the liquid crystal display unit 84 displays an image, it is necessary to irradiate with light the liquid crystal panel inside the liquid crystal display unit 84 from behind. In the liquid crystal display apparatus 800, the backlight driving circuit 85 drives the backlight 86 under control of the microcomputer 78 so that a back surface of the liquid crystal panel is irradiated with light.
Overall control of the liquid crystal display apparatus 800, including the processes above, is carried out by the microcomputer 78. The video signal to be externally supplied (composite color video signal) is not limited to a video signal of television broadcast but can be a video signal such as one taken by use of a camera or one supplied via the Internet. Therefore, the liquid crystal display apparatus 800 is capable of displaying images in accordance with a wide variety of video signals.
In a case where the liquid crystal display apparatus 800 displays an image in accordance with a video signal of television broadcast, as illustrated in
The invention being thus described is not limited to the aforementioned embodiment, but encompasses variations of the embodiment which are made on the basis of common general technical knowledge, and combinations of the variations.
The liquid crystal panel driving apparatus is suitable for, e.g., a liquid crystal television.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2007-155651 | Jun 2007 | JP | national |
| Filing Document | Filing Date | Country | Kind | 371c Date |
|---|---|---|---|---|
| PCT/JP2008/057038 | 4/9/2008 | WO | 00 | 12/10/2009 |
