Live partition mobility with I/O migration

Information

  • Patent Grant
  • 10761949
  • Patent Number
    10,761,949
  • Date Filed
    Wednesday, June 13, 2018
    6 years ago
  • Date Issued
    Tuesday, September 1, 2020
    4 years ago
Abstract
Live partition mobility in a computing environment that includes a source system and a target system may be carried out by: pausing a logical partition on the source system, wherein the logical partition is mapped to an I/O adapter of the source system; copying, to the target system, configuration information describing the mapping of the logical partition to the I/O adapter; copying, to the target system, the logical partition of the source system; placing an I/O adapter of the target system into an error state; mapping, in dependence upon the configuration information, the logical partition of the target system to the I/O adapter of the target system; placing the I/O adapter of the target system into an error recovery state; and resuming the logical partition on the target system.
Description
BACKGROUND
Field of the Invention

The field of the invention is data processing, or, more specifically, methods, apparatus, and products for live partition mobility with I/O migration.


Description of Related Art

The development of the EDVAC computer system of 1948 is often cited as the beginning of the computer era. Since that time, computer systems have evolved into extremely complicated devices. Today's computers are much more sophisticated than early systems such as the EDVAC. Computer systems typically include a combination of hardware and software components, application programs, operating systems, processors, buses, memory, input/output devices, and so on. As advances in semiconductor processing and computer architecture push the performance of the computer higher and higher, more sophisticated computer software has evolved to take advantage of the higher performance of the hardware, resulting in computer systems today that are much more powerful than just a few years ago.


One area of advancement includes data centers providing cloud services with various types of virtualization services. Regardless of the particular type of virtualization service being offered, most virtualization services make use of massive amounts of data I/O traffic and network bandwidth. In such a computing environment, live partition mobility in which a logical partition executing on a first host is migrated, without reboot, to a second host, is difficult to perform while maintaining the I/O and network connections of the logical partition executing on the first host.


SUMMARY

Methods, apparatus, and products for live partition mobility in a computing environment are disclosed in this specification. Such a computing environment includes a source system and a target system. Live partition mobility may include: pausing a logical partition on the source system, wherein the logical partition is mapped to an I/O (‘input/output’) adapter of the source system; copying, to the target system, configuration information describing the mapping of the logical partition to the I/O adapter; copying, to the target system, the logical partition of the source system; placing an I/O adapter of the target system into an error state; mapping, in dependence upon the configuration information, the logical partition of the target system to the I/O adapter of the target system; placing the I/O adapter of the target system into an error recovery state; and resuming the logical partition on the target system.


The foregoing and other objects, features and advantages of the invention will be apparent from the following more particular descriptions of exemplary embodiments of the invention as illustrated in the accompanying drawings wherein like reference numbers generally represent like parts of exemplary embodiments of the invention.





BRIEF DESCRIPTION OF THE DRAWINGS


FIG. 1 sets forth an example computing environment configured for live partition mobility.



FIG. 2 sets forth an example system in which a logical partition of a source system is mapped to a virtual function exposed by an SR-IOV adapter and the system is configured for live partition mobility with I/O migration.



FIG. 3 sets forth a flow chart illustrating an exemplary method for live partition mobility with I/O migration according to embodiments of the present invention.



FIG. 4 sets forth a flow chart illustrating a further exemplary method for live partition mobility with I/O migration according to embodiments of the present invention.



FIG. 5 sets forth a flow chart illustrating a further exemplary method for live partition mobility with I/O migration according to embodiments of the present invention.



FIG. 6 sets forth a flow chart illustrating a further exemplary method for live partition mobility with I/O migration according to embodiments of the present invention.





DETAILED DESCRIPTION

Embodiments of methods, apparatus, and computer program products for live partition mobility with I/O migration are described with reference to the accompanying drawings, beginning with FIG. 1. FIG. 1 sets forth an example computing environment configured for live partition mobility. The example environment of FIG. 1 includes a data center (120). Such a data center may provide clients on host devices (195) with virtualization services for enabling various cloud related product offerings.


The example data center (120) of FIG. 1 includes automated computing machinery in the form of a computing system (102) configured for live partition mobility with physical I/O migration. Live partition mobility enables a running logical partition to be relocated from one system to another. The source and target systems generally must have access to the same data communications network and storage area network, but need not be of the same type. Partitions that are to be relocated, at least in prior art, must be fully virtualized (that is, have no dedicated physical I/O adapters).


Any sized partition can be moved. Essentially, memory is copied asynchronously from one system to another to create a clone of a running partition, with “dirty” memory pages being re-copied as necessary. When a threshold is reached (such as when a high percentage of the pages have been successfully copied across), the logical partition is transitioned to the target machine and any remaining pages are copied across synchronously. Live partition mobility may be used to avoid outages for planned server maintenance, for load balancing across multiple servers, for energy conservation, and the like.


As mentioned above, in prior art computing environments, live partition mobility is restricted to migration of I/O functionality only with respect to completely virtualized I/O. That is, in prior art computing environments, an I/O communications channel between a logical partition and a physical I/O adapter, such as a PCI or PCIe adapter, cannot be migrated with live partition mobility. As explained below in greater detail, the example computing environment of FIG. 1, by contrast, enables such physical I/O to be migrated during live partition mobility.


The computing system (102) includes at least one computer processor (156) or “CPU” as well as random access memory (168) or “RAM,” which is connected through a high speed memory bus (166) and bus adapter (158) to processor (156) and to other components of the computing system (102).


Stored in RAM (168) is a hypervisor (136) and a management console (138). The management console (138) may provide a user interface through which a user may direct the hypervisor (136) on instantiating and maintaining multiple logical partitions (116, 118), where each logical partition may provide virtualization services to one or more clients. Although depicted in the example of FIG. 1 as being stored in RAM (168) of the computer (102), readers will understand the management console (138) may be implemented in a system entirely separate from the computer (102).


Also stored in RAM (168) are two instances of an operating system (154), one for each logical partition (116, 118). Operating systems useful in computers configured for live partition mobility with physical I/O migration according to various embodiments include UNIX™, Linux™, Microsoft Windows™, AIX™, IBM's i™ operating system, and others as will occur to those of skill in the art. The operating systems (154), hypervisor (136), and management console (138) are shown in RAM (168), but many components of such software may typically be stored in non-volatile memory such as, for example, on a data storage (170) device or in firmware (132).


The computing system (102) may also include a storage device adapter (172) coupled through expansion bus (160) and bus adapter (158) to processor (156) and other components of the computing system (102). Storage device adapter (172) connects non-volatile data storage to the computing system (102) in the form of data storage (170). Storage device adapters useful in computers configured for live partition mobility with physical I/O migration according to various embodiments include Integrated Drive Electronics (“IDE”) adapters, Small Computing system Interface (“SCSI”) adapters, and others as will occur to those of skill in the art. Non-volatile computer memory also may be implemented for as an optical disk drive, electrically erasable programmable read-only memory (so-called “EEPROM” or “Flash” memory (134)), RAM drives, and so on, as will occur to those of skill in the art.


The example computing system (102) may also include one or more input/output (“I/O”) adapters (178). I/O adapters implement user-oriented input/output through, for example, software drivers and computer hardware for controlling output to display devices such as computer display screens, as well as user input from user input devices (181) such as keyboards and mice. The example computing system (102) may also include a video adapter (114), which may be an example of an I/O adapter specially designed for graphic output to a display device (180) such as a display screen or computer monitor. Video adapter (114) may be connected to processor (156) through a high speed video bus (164), bus adapter (158), and the front side bus (162), which may also be a high speed bus.


The example computing system (102) of FIG. 1 also includes several I/O adapters which may be implemented as SR-IOV adapters in the form of network adapters (124, 126, and 128). SR-IOV, Single-root I/O virtualization, is an extension to the PCI Express (PCIe) specification. SR-IOV allows a device, such as a network adapter, to separate access to its resources among various PCIe hardware functions. These functions consist of the following types: A PCIe Physical Function (PF) and a PCIe Virtual Function (VF). The PF advertises the device's SR-IOV capabilities. Each VF is associated with a device's PF. A VF shares one or more physical resources of the device, such as a memory and a network port, with the PF and other VFs on the device. From the perspective of a logical partition (116, 118) instantiated by a hypervisor (136), a VF appears as a fully functional physical PCIe adapter. In this way, a single physical adapter may be ‘shared’ amongst many logical partitions or multiple virtual functions may be instantiated for use by a single logical partition. Although referred to as a ‘virtual’ function, readers of skill in the art will recognize that a VF is in fact a physical channel that is not a resource virtualized entirely by the hypervisor.


Any of the example network adapters from among network adapters (124, 126, and 128) may be configured to support SR-IOV and provide multiple virtual functions, where each of the virtual functions may be mapped to a respective logical partition (116, 118). In this way, each of the logical partitions may independently use a physical network adapter that is being shared among different logical partitions. Such network adapters may also be configured for data communications with other computers or devices (not shown) and for data communications with a data communications network (100, 101). Such data communications may be carried out serially through RS-232 connections, through external buses such as a Universal Serial Bus (“USB”), through PCI and PCIe fabrics, through data communications networks such as IP data communications networks, and in other ways as will occur to those of skill in the art. Network adapters may implement the hardware level of data communications through which one computer sends data communications to another computer, directly or through a data communications network. Examples of communications adapters useful in computers configured for live partition mobility with physical I/O migration according to various embodiments include modems for wired dial-up communications, Ethernet (IEEE 802.3) adapters for wired data communications, and 802.11 adapters for wireless data communications.


The network adapters (124, 126, and 128) may further be configured for data communications with hosts (195) over a network (101) reachable through local area networks (LANs), such as LAN (100). The network adapters (124, 126, and 128) may further be configured for data communications with storage area networks (SANs), such as SAN (112), and for data communications with various storage devices (104), such as storage devices (106) and storage devices (108).


As mentioned above, the computing system (102) of FIG. 1 may be configured for live partition mobility with physical I/O migration. Consider, for example, that the logical partition (116) is to be transferred to one of the hosts (195), where the computing system (102) is referred to as a ‘source system’ and the host (195) to which the logical partition (116) is to be transferred is referred to as a ‘target system.’ The hypervisor (136) in the example of FIG. 1 may carry out live partition mobility in accordance with various embodiments of the present disclosure by: pausing the logical partition (116) on the source system, where the logical partition is mapped to an I/O (‘input/output’) adapter (126, for example) of the source system; copying, to the target system (195), configuration information describing the mapping of the logical partition (116) to the I/O adapter (126); and copying, to the target system, the logical partition (116) of the source system (102). The hypervisor (136), through communications with a hypervisor on the target system may direct the target system hypervisor to place an I/O adapter of the target system (195) into an error state; map the logical partition of the target system to the I/O adapter of the target system in dependence upon the configuration information; place the I/O adapter of the target system into an error recovery state; and resume the logical partition on the target system. When the logical partition resumes, the logical partition will enter error recovery of the I/O communications channel and will now connect to the I/O adapter of the target system rather than the source system. All of this can occur without any modification of I/O parameters in the logical partition itself. That is, from the perspective of the logical partition, at least with respect to the I/O communications settings, no change has occurred when transferred from the source to the target system.


While in this disclosure, various embodiments are described in the context of the SR-IOV standard and PCIe, such descriptions are intended to be illustrative, not limiting. Readers will recognize that failover of a virtual function exposed by an SR-IOV adapter of a computing system may be carried out utilizing other virtualization standards, or no standard at all.


The network adapters (124, 126, and 128) are for purposes of illustration, not for limitation. Other I/O adapters may be utilized in live partition mobility according to embodiments of the present invention. Similarly, data centers according to various embodiments may include additional servers, routers, other devices, and peer-to-peer architectures, not shown in the figures, as will occur to those of skill in the art. Networks in such data processing systems may support many data communications protocols, including for example TCP (Transmission Control Protocol), IP (Internet Protocol), HTTP (HyperText Transfer Protocol), WAP (Wireless Access Protocol), HDTP (Handheld Device Transport Protocol), and others as will occur to those of skill in the art. Various embodiments may be implemented on a variety of hardware platforms in addition to those illustrated.


For further explanation, FIG. 2 sets forth an example system in which a logical partition of a source system is mapped to a virtual function exposed by an SR-IOV adapter and the system is configured for live partition mobility with I/O migration. The system of FIG. 2 includes a source system (250). The source system includes a hypervisor (136a) that is coupled for data communications over a physical medium (236) through one or more network adapters (232). The hypervisor (136a) of the source system (250) in the example of FIG. 2 supports execution of several logical partitions (204, 206) and an adjunct partition (202). Each logical partition (204, 206) is mapped (214, 216) to a respective virtual function (224, 226) exposed by the network adapter (232). The logical partitions (204, 206) in the example of FIG. 2 may be mapped (214, 216) to the virtual functions (224, 226) exposed by network adapter (232) with: information for identifying a PCIe slot for the network adapter for a virtual function; specifications of direct memory access (DMA) memory space; mappings for memory mapped input output (MMIO); and other configurations or settings that enable a given logical partition to communicate and use physical resources by interfacing with a given virtual function on a network adapter. Such mappings are generally maintained by the hypervisor (136a) and an adjunct partition (202).


An adjunct partition as the term is used in this specification refers to a partition instantiated by a hypervisor and configured for management of SR-IOV adapter resources, including various configuration parameters of virtual functions (224, 226) exposed by the network adapter (232). In some embodiments, for example, each adjunct partition (202) is associated and mapped (212) with a physical function (222) of a discrete network adapter (232). The adjunct partition may include, in addition to a kernel, a driver for managing a network adapter through a management channel specified in the protocol for the network adapter.


The example source system (250) of FIG. 2 may be configured for live partition mobility with I/O migration. The logical partition (204), for example, may be migrated to the target system (252) as logical partition (210). The target system (252) also executes a hypervisor (136b) and is coupled to a physical medium (238) via an SR-IOV network adapter (234). The hypervisor (136b) of the target system (252) supports execution of an adjunct partition (208) which is mapped (218) to the physical function (228) exposed by the network adapter (234).


To migrate the logical partition (204) from the source system to the target system utilizing live partition mobility with I/O migration, the hypervisor (136a) may pause execution of the logical partition (204), copy, to the target system, configuration information describing the mapping of the logical partition (204) to the I/O adapter (232), and copying, to the target system, the logical partition (204) of the source system. These steps need not occur in any particular order. For example, copying the logical partition (204) to the target system may be done asynchronously over time, page by page until a threshold number of pages has been copied.


The hypervisor (136a) may then direct the hypervisor (136b) to place an I/O adapter of the target system into an error state. An error state may include the ‘EEH’ (enhanced error handling) error state which is an extension to the PCI standard specification and enabled in systems running IBM's Power™ Processors. In embodiments in which the I/O adapter is an SR-IOV adapter and the logical partition migrated to the target system is to be mapped to a virtual function exposed by the SR-IOV adapter, placing the I/O adapter in the error state may include placing only the virtual function in the error state. Once the virtual function is placed in the error state, the hypervisor (136b) may map (220) the logical partition (210) of the target system to a virtual function (230) exposed by the I/O adapter (234) of the target system (252). Mapping the logical partition (210) to the virtual function (230) may include mapping direct memory access (DMA) memory space; MMIO space; mapping interrupts, and other configurations or settings that enable a given logical partition to communicate and use physical resources by interfacing with a given virtual function on a network adapter.


After mapping the logical partition (210) to the virtual function (230), the hypervisor (136b) may place the I/O adapter of the target system into an error recovery state and resume the logical partition on the target system. Once placed into the error recovery state and upon resuming execution of the logical partition, the logical partition (210) will reconnect to the virtual function (230) as if reestablishing communication with the virtual function (226) of the source system. That is, the logical partition (210), from the perspective of I/O functionality, has no knowledge that the logical partition is executing on a different system and coupled for I/O to a different adapter.


For further explanation, FIG. 3 sets forth a flow chart illustrating an exemplary method for live partition mobility with I/O migration according to embodiments of the present invention. The method of FIG. 3 may be carried out in a computing environment similar to that of FIG. 1 or FIG. 2 which includes a source system and a target system.


The method of FIG. 3 includes pausing (318) a logical partition (306) on the source system (304), where the logical partition (306) is mapped to an I/O adapter (308) of the source system (304). Pausing (318) a logical partition (306) on the source system (304) may be carried out by the hypervisor (302) of the source system through one or more interrupts.


The method of FIG. 3 also includes copying (320), to the target system (312), configuration information (332) describing the mapping of the logical partition (306) to the I/O adapter (308). Copying (320) configuration to the target system (304) may be carried out by collecting information from the I/O adapter of the source system and from the hypervisor including a capacity value of I/O adapter, a Media Access Control (MAC) address of the I/O adapter, permissions for the I/O adapter, virtual LAN (VLAN) information, and the like and providing the information to a hypervisor (310) of the target system.


The method of FIG. 3 also includes copying (322), to the target system (312), the logical partition (306) of the source system (304). Copying (322) the logical partition (306) to the target system, where it is instantiated as a logical partition (314), may be carried out by copying memory contents corresponding to the logical partition of the source system to the target system and creating a clone of the running partition. Dirty memory pages are recopied to the target system as necessary. When a particular threshold of memory pages has been copied the logical partition (314) on the target system (312) is ready to resume execution. After which, any additional memory pages related to the logical partition of the source system are copied over to the target system and incorporated into the logical partition execution there.


The method of FIG. 3 also includes placing (324) an I/O adapter of the target system into an error state. Placing (324) an I/O adapter of the target system into an error state may be carried out in a variety of ways including, for example, by generating an interrupt in the I/O adapter designated for such purpose.


The method of FIG. 3 also includes mapping (326), in dependence upon the configuration information (332), the logical partition (314) of the target system (312) to the I/O adapter (316) of the target system (312). Mapping (326) the logical partition (314) to the I/O adapter (316) may include mapping I/O-related interrupts to the I/O adapter and the logical partition, mapping MIMO space, mapping DMA space, mapping VLANs, and the like. Mapping (326) the logical partition of the target system to the I/O adapter of the target system may be carried out without modifying I/O parameters in the logical partition. Rather only modifications are made to mappings in the I/O adapter and hypervisor with respect to the logical partition.


The method of FIG. 3 also includes placing (328) the I/O adapter (316) of the target system (312) into an error recovery state and resuming (330) the logical partition on the target system. Placing (328) the I/O adapter of the target system into an error recovery state may be carried out in a variety of ways including, for example, by transmitting to the I/O adapter (316) an interrupt designated for such a purpose. In some other embodiments, the I/O adapter may be placed in the error recovery state with no direct involvement from the hypervisor. Rather, the hypervisor, in resuming the logical partition may indirectly place the I/O adapter in an error recovery state. That is, the I/O adapter may, once place into an error state immediately begin to attempt to recover from that error state. In such an embodiment, when the logical partition (314) is resumed on the target system (312), the I/O driver in the logical partition will detect a loss of communications on the I/O communications channel, enter the error state, and attempt to recover. In this way, the hypervisor, by resuming the logical partition (314), may place the I/O adapter in a state in which it is able to recover.


The method of FIG. 3 continues by recovering (332) from the error recovery state and communicating (334) by the logical partition (314) with the I/O adapter (316) of the target system (312). That is, once the logical partition and the I/O adapter reestablish communications on a physical I/O channel, through normal error recovery options, the logical partition (314) and I/O adapter (316) may communicate with one other through I/O operations. In this way, a logical partition having a physical I/O connection rather than purely virtual connections may be migrated from a source system to a target system with only a short interruption of I/O communications and no need to modify I/O parameters in the logical partition itself.


For further explanation, FIG. 4 sets forth a flow chart illustrating a further exemplary method for live partition mobility with I/O migration according to embodiments of the present invention. The method of FIG. 4 is similar to the method of FIG. 3 including as it does: pausing (318) a logical partition on the source system; copying (320) I/O configuration information to the target system; copying (322) the logical partition to the target system; placing (324) an I/O adapter of the target system into an error state; mapping (326) the logical partition of the target system to the I/O adapter of the target system; placing (328) the I/O adapter of the target system into an error recovery state; and resuming (330) the logical partition on the target system.


The method of FIG. 4 differs from the method of FIG. 3, however, in that in the method of FIG. 4, the I/O adapter (308) of the source system is an SR-IOV adapter and the logical partition (306) of the source system is mapped to a virtual function (402) exposed by the SR-IOV adapter (308) of the source system (304). Moreover, in the method of FIG. 4, the I/O adapter (316) of the target system (312) is also an SR-IOV adapter.


In such an embodiment, mapping (326) the logical partition (314) of the target system (312) to the I/O adapter (316) of the target system is carried out by mapping (406) the logical partition (314) of the target system (312) to a virtual function (404) exposed by the SR-IOV adapter (316) of the target system (312). Mapping the logical partition to a virtual function may be carried out through an adjunct partition configured to manage the SR-IOV adapter (316) of the target system. The hypervisor may update various mappings for the virtual function (404) in the adjunct partition which includes an SR-IOV physical function driver. The SR-IOV physical function driver may also utilize the PF driver management channel of the physical function to configure the I/O adapter as necessary. Some configurations may include instantiating a new virtual function if a standby is not available, mapping MIMO space, DMA space, and so on.


For further explanation, FIG. 5 sets forth a flow chart illustrating a further exemplary method for live partition mobility with I/O migration according to embodiments of the present invention. The method of FIG. 5 is similar to the method of FIG. 3 including as it does: pausing (318) a logical partition on the source system; copying (320) I/O configuration information to the target system; copying (322) the logical partition to the target system; placing (324) an I/O adapter of the target system into an error state; mapping (326) the logical partition of the target system to the I/O adapter of the target system; placing (328) the I/O adapter of the target system into an error recovery state; and resuming (330) the logical partition on the target system.


The method of FIG. 5 differs from the method of FIG. 3, however, in that in the method of FIG. 5, at some time prior to placing (328) the I/O adapter of the target system in the error recovery state, the hypervisor (302) of the source system (304) may receive (502), in the source system, a configuration change request (506) to the I/O adapter (308) of the source system. That is, prior to the logical partition and I/O adapter of the target system being fully operational, a user or management application may alter the configuration of the I/O adapter being migrated from the source to the target. To that end, the method of FIG. 5 includes propagating (504) the configuration change (332) to the target system (312).


For further explanation, FIG. 6 sets forth a flow chart illustrating a further exemplary method for live partition mobility with I/O migration according to embodiments of the present invention. The method of FIG. 6 is similar to the method of FIG. 3 including as it does: pausing (318) a logical partition on the source system; copying (320) I/O configuration information to the target system; copying (322) the logical partition to the target system; placing (324) an I/O adapter of the target system into an error state; mapping (326) the logical partition of the target system to the I/O adapter of the target system; placing (328) the I/O adapter of the target system into an error recovery state; and resuming (330) the logical partition on the target system.


The method of FIG. 6 differs from the method of FIG. 3, however, in that the method of FIG. 6 also includes maintaining (602), in a non-volatile memory (606) of the target system (312), a copy of a configuration (608) of the I/O adapter (316) of the target system (312). Such a copy may be stored for use when an error causes a reboot of the I/O adapter or the like.


As changes are made over time to the configuration of the I/O adapter, the copy (608) of the I/O configuration is updated to reflect those changes. As such, responsive to mapping (326) the logical partition (314) of the target system to the I/O adapter (316) of the target system (312), the method of FIG. 6 continues by updating (604) the copy (608) of the configuration of the I/O adapter of the target system. That is, the hypervisor may propagate any changes to the configuration of the I/O adapter, even prior to the I/O adapter operating in communication with the logical partition (314) to the backup copy (608) stored in non-volatile memory (606). In the example of FIG. 6, the non-volatile memory (606) is implemented, for example only, as a non-volatile RAM which may be a battery backed RAM module or modules.


The present invention may be a system, a method, and/or a computer program product. The computer program product may include a computer readable storage medium (or media) having computer readable program instructions thereon for causing a processor to carry out aspects of the present invention.


The computer readable storage medium can be a tangible device that can retain and store instructions for use by an instruction execution device. The computer readable storage medium may be, for example, but is not limited to, an electronic storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination of the foregoing. A non-exhaustive list of more specific examples of the computer readable storage medium includes the following: a portable computer diskette, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or Flash memory), a static random access memory (SRAM), a portable compact disc read-only memory (CD-ROM), a digital versatile disk (DVD), a memory stick, a floppy disk, a mechanically encoded device such as punch-cards or raised structures in a groove having instructions recorded thereon, and any suitable combination of the foregoing. A computer readable storage medium, as used herein, is not to be construed as being transitory signals per se, such as radio waves or other freely propagating electromagnetic waves, electromagnetic waves propagating through a waveguide or other transmission media (e.g., light pulses passing through a fiber-optic cable), or electrical signals transmitted through a wire.


Computer readable program instructions described herein can be downloaded to respective computing/processing devices from a computer readable storage medium or to an external computer or external storage device via a network, for example, the Internet, a local area network, a wide area network and/or a wireless network. The network may comprise copper transmission cables, optical transmission fibers, wireless transmission, routers, firewalls, switches, gateway computers and/or edge servers. A network adapter card or network interface in each computing/processing device receives computer readable program instructions from the network and forwards the computer readable program instructions for storage in a computer readable storage medium within the respective computing/processing device.


Computer readable program instructions for carrying out operations of the present invention may be assembler instructions, instruction-set-architecture (ISA) instructions, machine instructions, machine dependent instructions, microcode, firmware instructions, state-setting data, or either source code or object code written in any combination of one or more programming languages, including an object oriented programming language such as Smalltalk, C++ or the like, and conventional procedural programming languages, such as the “C” programming language or similar programming languages. The computer readable program instructions may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the latter scenario, the remote computer may be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or the connection may be made to an external computer (for example, through the Internet using an Internet Service Provider). In some embodiments, electronic circuitry including, for example, programmable logic circuitry, field-programmable gate arrays (FPGA), or programmable logic arrays (PLA) may execute the computer readable program instructions by utilizing state information of the computer readable program instructions to personalize the electronic circuitry, in order to perform aspects of the present invention.


Aspects of the present invention are described herein with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and/or block diagrams, and combinations of blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer readable program instructions.


These computer readable program instructions may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions/acts specified in the flowchart and/or block diagram block or blocks. These computer readable program instructions may also be stored in a computer readable storage medium that can direct a computer, a programmable data processing apparatus, and/or other devices to function in a particular manner, such that the computer readable storage medium having instructions stored therein comprises an article of manufacture including instructions which implement aspects of the function/act specified in the flowchart and/or block diagram block or blocks.


The computer readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other device to cause a series of operational steps to be performed on the computer, other programmable apparatus or other device to produce a computer implemented process, such that the instructions which execute on the computer, other programmable apparatus, or other device implement the functions/acts specified in the flowchart and/or block diagram block or blocks.


The flowchart and block diagrams in the Figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of the present invention. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of instructions, which comprises one or more executable instructions for implementing the specified logical function(s). In some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems that perform the specified functions or acts or carry out combinations of special purpose hardware and computer instructions.


It will be understood from the foregoing description that modifications and changes may be made in various embodiments of the present invention without departing from its true spirit. The descriptions in this specification are for purposes of illustration only and are not to be construed in a limiting sense. The scope of the present invention is limited only by the language of the following claims.

Claims
  • 1. A method of live partition mobility in a computing environment, the computing environment comprising a target system, the method comprising: instantiating a logical partition on the target system, wherein the logical partition was previously paused on a source system;placing a Single-root I/O virtualization (SR-IOV) adapter of the target system into an error state by placing a virtual function of the SR-IOV adapter of the target system into an error state;mapping, in dependence upon configuration information, the logical partition of the target system to a virtual function exposed by the SR-IOV adapter of the target system;placing the SR-IOV adapter of the target system into an error recovery state; andresuming the paused logical partition previously instantiated on the target system.
  • 2. The method of claim 1 wherein mapping the logical partition of the target system to the virtual function exposed by the SR-IOV adapter of the target system further comprises: mapping interrupts for the virtual function and logical partition;mapping memory mapped I/O space for the virtual function and logical partition; andmapping direct memory access (‘DMA’) space for the virtual function and logical partition.
  • 3. The method of claim 1, further comprising: recovering from the error recovery state; andcommunicating by the logical partition with the SR-IOV adapter of the target system.
  • 4. The method of claim 1 further comprising: receiving, from the source system, a configuration change request to the SR-IOV adapter of the source system prior to placing the SR-IOV adapter of the target system in the error recovery state.
  • 5. The method of claim 1 further comprising: maintaining, in a non-volatile memory of the target system, a copy of a configuration of the SR-IOV adapter of the target system; andresponsive to mapping the logical partition of the target system to the virtual function exposed by the SR-IOV adapter of the target system, updating the copy of the configuration of the SR-IOV adapter of the target system.
  • 6. The method of claim 1, wherein: mapping the logical partition of the target system to the virtual function exposed by the SR-IOV adapter of the target system further comprises mapping the logical partition of the target system to the virtual function exposed by the SR-IOV adapter of the target system without modifying I/O parameters in the logical partition.
  • 7. An apparatus for live partition mobility in a computing environment, the computing environment comprising a source system and a target system, the apparatus comprising a computer processor, a computer memory operatively coupled to the computer processor, the computer memory having disposed within it computer program instructions that, when executed by the computer processor, cause the apparatus to carry out: instantiating a logical partition on the target system, wherein the logical partition was previously paused on a source system;placing a Single-root I/O virtualization (SR-IOV) adapter of the target system into an error state by placing a virtual function of the SR-IOV adapter of the target system into an error state;mapping, in dependence upon configuration information, the logical partition of the target system to a virtual function exposed by the SR-IOV adapter of the target system;placing the SR-IOV adapter of the target system into an error recovery state; andresuming the paused logical partition previously instantiated on the target system.
  • 8. The apparatus of claim 7 wherein mapping the logical partition of the target system to the virtual function exposed by the SR-IOV adapter of the target system further comprises: mapping interrupts for the virtual function and logical partition;mapping memory mapped I/O space for the virtual function and logical partition; andmapping direct memory access (‘DMA’) space for the virtual function and logical partition.
  • 9. The apparatus of claim 7, further comprising computer program instructions that, when executed by the computer processor, cause the apparatus to carry out: recovering from the error recovery state; andcommunicating by the logical partition with the SR-IOV adapter of the target system.
  • 10. The apparatus of claim 7 further comprising computer program instructions that, when executed by the computer processor, cause the apparatus to carry out: receiving, from the source system, a configuration change request to the SR-IOV adapter of the source system prior to placing the SR-IOV adapter of the target system in the error recovery state.
  • 11. The apparatus of claim 7 further comprising computer program instructions that, when executed by the computer processor, cause the apparatus to carry out: maintaining, in a non-volatile memory of the target system, a copy of a configuration of the SR-IOV adapter of the target system; andresponsive to mapping the logical partition of the target system to the virtual function exposed by the SR-IOV adapter of the target system, updating the copy of the configuration of the SR-IOV adapter of the target system.
  • 12. The apparatus of claim 7, wherein: mapping the logical partition of the target system to the virtual function exposed by the SR-IOV adapter of the target system further comprises mapping the logical partition of the target system to the virtual function exposed by the SR-IOV adapter of the target system without modifying I/O parameters in the logical partition.
  • 13. A computer program product for live partition mobility in a computing environment, the computing environment comprising a source system and a target system, the computer program product disposed upon a computer readable storage medium, wherein the computer readable storage medium is not a signal, the computer program product comprising computer program instructions that, when executed, cause a computer to carry out: instantiating a logical partition on the target system, wherein the logical partition was previously paused on a source system;placing a Single-root I/O virtualization (SR-IOV) adapter of the target system into an error state by placing a virtual function of the SR-IOV adapter of the target system into an error state;mapping, in dependence upon configuration information, the logical partition of the target system to a virtual function exposed by the SR-IOV adapter of the target system;placing the SR-IOV adapter of the target system into an error recovery state; andresuming the paused logical partition previously instantiated on the target system.
  • 14. The computer program product of claim 13 wherein mapping the logical partition of the target system to the virtual function exposed by the SR-IOV adapter of the target system further comprises: mapping interrupts for the virtual function and logical partition;mapping memory mapped I/O space for the virtual function and logical partition; andmapping direct memory access (‘DMA’) space for the virtual function and logical partition.
  • 15. The computer program product of claim 13, further comprising computer program instructions that, when executed, cause a computer to carry out: recovering from the error recovery state; andcommunicating by the logical partition with the SR-IOV adapter of the target system.
  • 16. The computer program product of claim 13 further comprising computer program instructions that, when executed, cause a computer to carry out: receiving, from the source system, a configuration change request to the SR-IOV adapter of the source system prior to placing the SR-IOV adapter of the target system in the error recovery state.
  • 17. The computer program product of claim 13 further comprising computer program instructions that, when executed, cause a computer to carry out: maintaining, in a non-volatile memory of the target system, a copy of a configuration of the SR-IOV adapter of the target system; andresponsive to mapping the logical partition of the target system to the virtual function exposed by the SR-IOV adapter of the target system, updating the copy of the configuration of the SR-IOV adapter of the target system.
CROSS-REFERENCE TO RELATED APPLICATION

This application is a continuation application of and claims priority from U.S. patent application Ser. No. 15/049,506, filed on Feb. 22, 2016.

US Referenced Citations (151)
Number Name Date Kind
7039692 Foster et al. May 2006 B2
7209994 Klaiber et al. Apr 2007 B1
7240364 Branscomb et al. Jul 2007 B1
7549090 Bailey Jun 2009 B2
7574537 Arndt et al. Aug 2009 B2
7613898 Haertel et al. Nov 2009 B2
7734843 Bender et al. Jun 2010 B2
7813366 Freimuth et al. Oct 2010 B2
7882326 Armstrong et al. Feb 2011 B2
7937518 Boyd et al. May 2011 B2
7984262 Battista et al. Jul 2011 B2
8146082 Belay Mar 2012 B2
8219988 Armstrong et al. Jul 2012 B2
8321722 Tanaka et al. Nov 2012 B2
8327086 Jacobs et al. Dec 2012 B2
8418166 Armstrong et al. Apr 2013 B2
8429446 Hara et al. Apr 2013 B2
8533713 Dong Sep 2013 B2
8561065 Cunningham et al. Oct 2013 B2
8561066 Koch et al. Oct 2013 B2
8607230 Hatta et al. Dec 2013 B2
8621120 Bender et al. Dec 2013 B2
8645755 Brownlow Feb 2014 B2
8677356 Jacobs et al. Mar 2014 B2
8683109 Nakayama et al. Mar 2014 B2
8874749 Vittal et al. Oct 2014 B1
8875124 Kuzmack et al. Oct 2014 B2
8984240 Aslot et al. Mar 2015 B2
9032122 Hart et al. May 2015 B2
9047113 Iwamatsu et al. Jun 2015 B2
9304849 Arroyo et al. Apr 2016 B2
9317317 Graham et al. Apr 2016 B2
9473400 DeVilbiss et al. Oct 2016 B1
9501308 Arroyo et al. Nov 2016 B2
9552233 Tsirkin et al. Jan 2017 B1
9715469 Arroyo Jul 2017 B1
9720862 Arroyo Aug 2017 B1
9720863 Arroyo Aug 2017 B1
9740647 Arroyo Aug 2017 B1
9760512 Arroyo Sep 2017 B1
9785451 Arroyo et al. Oct 2017 B1
9830171 Arroyo Nov 2017 B1
9875060 Arroyo Jan 2018 B1
9892070 Arroyo Feb 2018 B1
9916267 Arroyo Mar 2018 B1
9940123 Ayoub et al. Apr 2018 B1
10002018 Anand et al. Jun 2018 B2
10025584 Anand et al. Jul 2018 B2
10042720 Arroyo et al. Aug 2018 B2
10042723 Arroyo Aug 2018 B2
10209918 Arroyo Feb 2019 B2
10417150 Arroyo Sep 2019 B2
20020083258 Bauman et al. Jun 2002 A1
20030050990 Craddock et al. Mar 2003 A1
20030101377 Dawkins et al. May 2003 A1
20030204648 Arndt Oct 2003 A1
20040064601 Swanberg Apr 2004 A1
20040205272 Armstrong et al. Oct 2004 A1
20040243994 Nasu Dec 2004 A1
20060095624 Raj et al. May 2006 A1
20060179177 Arndt et al. Aug 2006 A1
20060195618 Arndt et al. Aug 2006 A1
20060195620 Arndt et al. Aug 2006 A1
20060281630 Bailey et al. Dec 2006 A1
20070157197 Neiger et al. Jul 2007 A1
20070260768 Bender et al. Nov 2007 A1
20080005383 Bender et al. Jan 2008 A1
20080114916 Hummel et al. May 2008 A1
20080147887 Freimuth et al. Jun 2008 A1
20090007121 Yamada et al. Jan 2009 A1
20090037941 Armstrong et al. Feb 2009 A1
20090083467 Giles et al. Mar 2009 A1
20090119538 Scales et al. May 2009 A1
20090133016 Brown et al. May 2009 A1
20090133028 Brown et al. May 2009 A1
20090249366 Sen et al. Oct 2009 A1
20090276551 Brown et al. Nov 2009 A1
20090276773 Brown Nov 2009 A1
20100036995 Nakayama et al. Feb 2010 A1
20100250824 Belay Sep 2010 A1
20100262727 Arndt Oct 2010 A1
20100299666 Agbaria et al. Nov 2010 A1
20110197003 Serebrin et al. Aug 2011 A1
20110289345 Agesen et al. Nov 2011 A1
20110314345 Stern et al. Dec 2011 A1
20110320860 Coneski et al. Dec 2011 A1
20120042034 Goggin Feb 2012 A1
20120089864 Tanaka Apr 2012 A1
20120131232 Brownlow et al. May 2012 A1
20120131576 Hatta et al. May 2012 A1
20120137288 Barrett et al. May 2012 A1
20120137292 Iwamatsu et al. May 2012 A1
20120151473 Koch et al. Jun 2012 A1
20120159245 Brownlow Jun 2012 A1
20120167082 Kumar et al. Jun 2012 A1
20120179932 Armstrong et al. Jul 2012 A1
20120191935 Oberly, III et al. Jul 2012 A1
20120198187 Accapadi et al. Aug 2012 A1
20120246644 Hattori et al. Sep 2012 A1
20120265910 Galles et al. Oct 2012 A1
20120297379 Anderson et al. Nov 2012 A1
20120303594 Mewhinney et al. Nov 2012 A1
20130086298 Alanis et al. Apr 2013 A1
20130159572 Graham Jun 2013 A1
20130159686 Graham Jun 2013 A1
20130160001 Graham Jun 2013 A1
20130160002 Graham et al. Jun 2013 A1
20130191821 Armstrong et al. Jul 2013 A1
20130268800 Rangaiah Oct 2013 A1
20140122760 Grisenthwaite et al. May 2014 A1
20140149985 Takeuchi May 2014 A1
20140181801 Voronkov et al. Jun 2014 A1
20140229769 Abraham et al. Aug 2014 A1
20140245296 Sethuramalingam et al. Aug 2014 A1
20140258570 Eide et al. Sep 2014 A1
20140281263 Deming et al. Sep 2014 A1
20140351471 Jebson et al. Nov 2014 A1
20140372739 Arroyo et al. Dec 2014 A1
20140372789 Arroyo et al. Dec 2014 A1
20140372795 Graham et al. Dec 2014 A1
20140372801 Graham et al. Dec 2014 A1
20150006846 Youngworth Jan 2015 A1
20150052281 Hart et al. Feb 2015 A1
20150052282 Dong Feb 2015 A1
20150120969 He et al. Apr 2015 A1
20150193248 Noel et al. Jul 2015 A1
20150193250 Ito et al. Jul 2015 A1
20150220354 Nair Aug 2015 A1
20150229524 Engebretsen et al. Aug 2015 A1
20150301844 Droux et al. Oct 2015 A1
20150317274 Arroyo et al. Nov 2015 A1
20150317275 Arroyo et al. Nov 2015 A1
20160019078 Challa et al. Jan 2016 A1
20160077884 Hunter Mar 2016 A1
20160170855 Graham Jun 2016 A1
20160239326 Kaplan Aug 2016 A1
20160246540 Blagodurov et al. Aug 2016 A1
20160350097 Mahapatra et al. Dec 2016 A1
20170046184 Tsirkin et al. Feb 2017 A1
20170075706 Apfelbaum Mar 2017 A1
20170199768 Arroyo et al. Jul 2017 A1
20170242720 Anand Aug 2017 A1
20170242756 Arroyo et al. Aug 2017 A1
20170242763 Arroyo Aug 2017 A1
20170249136 Anand et al. Aug 2017 A1
20180113644 Arroyo Apr 2018 A1
20180113823 Arroyo et al. Apr 2018 A1
20180285096 Anand et al. Oct 2018 A1
20180293143 Arroyo Oct 2018 A1
20190317820 Abdulla Oct 2019 A1
20190361751 Chen Nov 2019 A1
Foreign Referenced Citations (4)
Number Date Country
101488092 Jul 2009 CN
104737138 Jun 2015 CN
2012-113660 Jun 2012 JP
5001818 Aug 2012 JP
Non-Patent Literature Citations (14)
Entry
Ajila et al., Efficient Live Wide Area VM Migration With IP Address Change Using Type II Hypervisor, 2013 IEEE 14th International Conference on Information Reuse and Integration (IRI2013), Aug. 2013, pp. 372-379, IEEE Xplore Digital Library (online), DOI: 10.1109/IRI.2013.6642495.
PCI-SIG, Single Root I/O Virtualization and Sharing Specification-Revision 1.0, Sep. 2007, PCI-SIG Specifications Library, pcisig.com (online), URL: pcisig.com/specifications/iov/single_root/.
Axnix et al., IBM z13 firmware innovations for simultaneous multithreading and I/O virtualization, IBM Journal of Research and Development, Jul./Sep. 2015, vol. 59, No. 4/5, 11-1, International Business Machines Corporation (IBM), Armonk, NY.
Xu et al., Multi-Root I/O Virtualization Based Redundant Systems, 2014 Joint 7th International Conference on Soft Computing and Intelligent Systems (SCIS) and 15th International Symposium on Advanced Intelligent Systems (ISIS), Dec. 2014, pp. 1302-1305, IEEE Xplore Digital Library (online), DOI: 10.1109/SCIS-ISIS.2014.7044652.
Xu et al., SRVM: Hypervisor Support for Live Migration with Passthrough SR-IOV Network Devices, Proceedings of the12th ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments (VEE'16), Apr. 2016, pp. 65-77, ACM New York, NY, USA.
Huang et al., Nomad: Migrating OS-bypass Networks in Virtual Machines, Proceedings Of The 3rd International Conference On Virtual Execution Environments (VEE'07), Jun. 2007, pp. 158-168, ACM New York, NY, USA.
Oracle, Updating the Universal HBA Firmware, Oracle Docs, dated Sep. 15, 2013, docs.oracle.com/cd/E24650_01/html/E24461/z40004591045586.html. Accessed Oct. 23, 2017, 4 pages.
Lynch, Live Partition Mobility, Presentation, Nov. 11, 2014, 30 pages, FORSYTHE (online), <http://www.circle4.com/forsythe/Ipm2014.pdf>.
U.S. Appl. No. 16/001,089, to Manu Anand et al., entitled, Firmware Management Of SR-IOV Adapters, assigned to International Business Machines Corporation, 30 pages, filed Jun. 6, 2018.
U.S. Appl. No. 16/005,032, to Jesse P. Arroyo et al., entitled, Failover Of A Virtual Function Exposed By An SR-IOV Adapter, assigned to International Business Machines Corporation, 27 pages, filed Jun. 11, 2018.
Appendix P; List of IBM Patent or Applications Treated as Related, Sep. 26, 2018, 2 pages.
Challa, “Hardware Based I/O Virtualization Technologies For Hypervisors, Configurations And Advantages—A Study”, 2012 IEEE International Conference on Cloud Computing in Emerging Markets (CCEM), Oct. 2012, pp. 99-103, IEEE Xplore Digital Library (online), DOI: 10.1109/CCEM.2012.6354610.
Salapura et al., “Resilient cloud computing”, IBM Journal of Research and Development, Sep./Oct. 2013, vol. 57, No. 5, 10-1, 12 pages, International Business Machines Corporation (IBM), Armonk, NY.
Anonymous, Virtual Function Tracing in Particular SR-IOV Environment, The IP.com Prior Art Database (online), Nov. 2015, 13 pages, IP.com Disclosure No. IPCOM000244289D.
Related Publications (1)
Number Date Country
20180293140 A1 Oct 2018 US
Continuations (1)
Number Date Country
Parent 15049506 Feb 2016 US
Child 16007134 US