1. Field of the Invention
Embodiments of the present disclosure relate to electronic loads, and more particularly to a load detecting system and method.
2. Description of the Related Art
Running a processor in a device, such as a computer, at high clock speeds allows for better performance. However, when the same processor is run at a lower frequency, it generates less heat and consumes less power. In many cases, the core voltage of the processor can also be reduced, further reducing power consumption and heat generation. This can conserve battery power in notebooks, extend processor life, and reduce noise generated by variable-speed fans.
At the present time, a software module is used to detect a load on the processor, and users can adjust the core voltage to consume less power. However, the software module consumes additional resources of the computer.
Therefore, what is needed, is a load detecting system and method which can save resources.
As used herein, the term “load” is defined to include a workload of a processor executing one or more computerized instructions. It may be understood that the load may increase as the processor executes additional tasks and/or a frequency of the processor is increased.
Referring to
An input of the amplifier 20 is connected to a voltage output of the CPU 10 to receive a voltage signal from the CPU 10, and output an amplified voltage signal Vin. An output of the amplifier 20 is connected to the SIO 30 to output the amplified voltage signal Vin to the SIO 30. The BIOS is configured to store values representing a maximum voltage Vhigh and a minimum voltage Vlow in the memory system of the SIO 30. The voltage sensor of the SIO 30 is configured to compare the amplified voltage signal Vin to the maximum voltage Vhigh and the minimum voltage Vlow. When the amplified voltage signal Vin is more than the maximum voltage Vhigh, an interrupt pin of the SIO 30 outputs an interrupt signal to the interrupt controller 40 to activate a program that will raise a work frequency of the CPU 10. When the amplified voltage signal Vin is less than the minimum voltage Vlow, the interrupt pin of the SIO 30 outputs another interrupt signal to the interrupt controller 40 to activate another program that will lower a work frequency of the CPU 10.
In block S1, the CPU 10 is working at a voltage rating. In other words, power of the CPU 10 is equal to its rated power at this time.
In block S2, a full load voltage Vfull of the CPU 10 is obtained by the SIO 30.
In block S3, the full load voltage Vfull is multiplied by a first coefficient to determine the maximum voltage Vhigh, and the full load voltage Vfull is then multiplied by a second coefficient to determine the minimum voltage Vlow. The first coefficient may range between 0.95 to 1, the second coefficient may range between about 0.90 to about 0.95, but not equal to the first coefficient.
In block S4, the maximum voltage Vhigh and the minimum voltage Vlow values are stored in the memory system of the SIO 30, and the voltage detecting function of the voltage sensor of the SIO 30 is activated.
In block S5, the amplifier 20 receives a voltage output signal Vcpu from the CPU 10, and outputs the amplified voltage signal Vin.
In block S6, the SIO 30 receives the amplified voltage signal Vin from the amplifier 20, and compares the amplified voltage signal Vin to the maximum voltage Vhigh and the minimum voltage Vlow values.
In block S7, if the amplified voltage signal Vin is more than the maximum voltage Vhigh value or less than the minimum voltage Vlow value, the SIO 30 outputs an interrupt signal to the interrupt controller 40. The interrupt controller 40 activates the program that will raise or lower work frequency of the CPU 10 correspondingly.
In block S8, if the amplified voltage signal Vin is between the maximum voltage Vhigh value and the minimum voltage Vlow value, no interrupt signal is output by the SIO 30, and the CPU 10 maintains its working status. In other words, work frequency of the CPU 10 remains the same.
In the current embodiment, the amplifier 20 can be replaced by a step-up circuit such as a boost circuit 50 (see in
The foregoing description of the various inventive embodiments of the disclosure has been presented only for the purposes of illustration and description and is not intended to be exhaustive or to limit the disclosure to the precise forms disclosed. Many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to explain the principles of the disclosure and their practical application so as to enable others of ordinary skill in the art to utilize the disclosure and various embodiments and with various modifications as are suited to the particular use contemplated. Alternately embodiments will become apparent to those of ordinary skill in the art to which the present disclosure pertains without departing from its spirit and scope. Accordingly, the scope of the present disclosure is defined by the appended claims rather than the foregoing description and the various inventive embodiments described therein.
Number | Date | Country | Kind |
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200810304113.5 | Aug 2008 | CN | national |