1. Field
The disclosed concept pertains generally to branch circuit monitors and, more particularly, to branch circuit monitors for load panels. The disclosed concept further pertains to load panels that include a branch circuit monitor.
2. Background Information
It is known to deliver hundreds of analog signal conductors from current transformers (CTs) to a central processing unit (CPU) of a load panel branch circuit monitor (BCM) for processing by a single digital signal processor (DSP) and the CPU. A number of problems are associated with this prior proposal. For example, relatively expensive multi-conductor ribbon cables and connectors (e.g., up to 50-pins) are employed to deliver hundreds of analog signal conductors over the requisite distance creating reliability and assembly difficulties. Calibration is relatively very difficult to handle since burden resistors are within the BCM at the CPU and are physically separated from the various CTs. As a result, better than 1% accuracy and better metering are not cost effective due to the added component cost and complexity necessary to manage calibration of separate sensing and processing assemblies using multiplexing of relatively many analog signals. Also, an open circuit clamping diode is needed for each CT, which adds to the cost.
The root of these problems is the centralization of the metering in the prior BCM, which requires all current and voltage analog signals to be wired to a CPU board.
There is room for improvement in branch circuit monitors.
There is also room for improvements in load panels which include a branch circuit monitor.
These needs and others are met by various aspects of the disclosed concept. As one aspect of the disclosed concept, a branch circuit monitor is for a load panel inputting a number of line voltages and including a plurality of currents. The branch circuit monitor comprises: a processor component comprising a plurality of digital interfaces, the processor component being structured to receive a plurality of first digital values from each of the digital interfaces; and a plurality of metering mechanisms external to the processor component, each of the metering mechanisms being structured to: communicate with a corresponding one of the digital interfaces, convert analog values from the number of line voltages and a plurality of the currents to a plurality of second digital values, determine a plurality of digital energy values from the second digital values, and transmit the second digital values and the digital energy values to the corresponding one of the digital interfaces.
As another aspect of the disclosed concept, a load panel inputs a number of line voltages and includes a plurality of currents. The load panel comprises: an enclosure enclosing a number of main circuit breakers and a plurality of branch circuit breakers; and a branch circuit monitor comprising: a processor component comprising a plurality of digital interfaces, the processor component being structured to receive a plurality of first digital values from each of the digital interfaces; and a plurality of metering mechanisms external to the processor component, each of the metering mechanisms being structured to: communicate with a corresponding one of the digital interfaces, convert analog values from the number of line voltages and a plurality of the currents to a plurality of second digital values, determine a plurality of digital energy values from the second digital values, and transmit the second digital values and the digital energy values to the corresponding one of the digital interfaces.
As another aspect of the disclosed concept, a branch circuit monitor is for a load panel including a plurality of currents. The branch circuit monitor comprises: a processor component comprising a plurality of digital interfaces, the processor component being structured to receive a plurality of first digital values from each of the digital interfaces; and a plurality of metering mechanisms external to the processor component, each of the metering mechanisms being structured to: communicate with a corresponding one of the digital interfaces, convert analog values from a plurality of the currents to a plurality of second digital values, determine a plurality of digital energy values from the second digital values and a number of digital voltage values, and transmit the second digital values and the digital energy values to the corresponding one of the digital interfaces.
A full understanding of the disclosed concept can be gained from the following description of the preferred embodiments when read in conjunction with the accompanying drawings in which:
As employed herein, the term “number” shall mean one or an integer greater than one (i.e., a plurality).
As employed herein, the term “processor” shall mean a programmable analog and/or digital device that can store, retrieve, and process data; a computer; a controller; a workstation; a personal computer; a microprocessor; a microcontroller; a microcomputer; a digital signal processor; a central processing unit; a central data aggregation unit; a mainframe computer; a mini-computer; a server; a networked processor; or any suitable processing device or apparatus.
As employed herein, the statement that two or more parts are “connected” or “coupled” together shall mean that the parts are joined together either directly or joined through one or more intermediate parts.
As employed herein, the term “load panel” shall mean a load center, a panelboard, a circuit breaker panel, or any suitable enclosure enclosing or housing a number of electrical switching apparatus for a number of branch or other load circuits.
The disclosed concept is described in association with a three-phase load panel including a number of three-phase main circuit breakers and a plurality of single-phase branch circuit breakers, although the disclosed concept is applicable to a wide range of load panels and to circuit breakers having any number of phases or poles.
Each of the AICs 40 includes a number of burden resistors (not shown) for applications where the CSs 34 are CTs.
Non-limiting examples of the digital interfaces 12,22 include serial digital interfaces, such as RS-485, RS-422, RS-232, LonWorks®, Profibus DP, SMARTWIRE-DT®, DeviceNet™ and CANopen.
The processor component 20 is structured to determine a number of digital energy (E) values 35 (e.g., E=∫P=∫(I*V)) from the second digital values 30, which correspond to the number of voltages (V) and to the sensed current (I) flowing in the conductor of the load panel 4 for each of the CSs 34. The third digital values 33 include the second digital values 30 and the number of digital energy values 35.
The processor component 20 can also determine a number of digital power (P) values 35′ (e.g., P=(I*V)) from the second digital values 30, which correspond to the number of voltages (V) and to the sensed current (I) flowing in the conductor of the load panel 4 for each of the CSs 34. The third digital values 33 can also include the number of digital power values 35′.
The digital interface 22 is coupled for communication with a corresponding one of the digital interfaces 12. The second routine 32 transmits the third digital values 33 from the digital interface 22 to the corresponding one of the digital interfaces 12. The first routine 14 receives the third digital values 33 as at least some of the first digital values 16.
The digital interfaces 12,22 can be wired or wireless serial digital interfaces.
The processor component 20 preferably includes a memory 46 that stores calibration data 48 for the CSs 34. The memory 46 also stores configuration pairing information (e.g., which current(s) and voltage(s) correspond to each circuit breaker), computed energy values, load current polarity, and a wide range of other values.
For example and without limitation, the calibration data 48 can include voltage calibration values, gain and offset calibration values, the relationship (phase) between current and voltage, and variances of voltage references, analog to digital converters and/or clock circuits. Preferably, all calibration values for power and energy measurement are self-contained in the metering modules 6. The output of the metering modules 6 is calibrated digital data, thereby eliminating the transfer of raw, un-calibrated data between metering sub-assemblies. Hence, the calibration is local to the metering modules 6 and is not split among separate assemblies within a metering system.
The CSs 34 can be solid core CTs 34 (
The processor 10 preferably includes a serial port 50 structured to provide network communications.
As will be discussed below in connection with
Also, the current sensed by the CSs 34 can be a neutral current of the main circuit breakers 54,55 of the respective load panels 56,58.
As shown in
As shown in
The load panels 56,58 can be load centers, panelboards or circuit breaker panels.
As shown in
The solid core CTs are typically factory installed on the PCB 18 of the metering modules 6,6′, which are mounted inside the load panel enclosures 60 or 64 along with the BCM processor component 8 (e.g., as is shown with the BCM 2 and the load panel 4 of
Alternatively, the split core CTs are mounted in an existing load panel (e.g., for a retrofit application) and their secondary winding (not shown) is electrically connected to the PCB 18 of the metering modules 6,6′, which can be mounted internal (as shown) or external (not shown) to the load panel enclosures 60 or 64. Except for the secondary winding, the split core CTs are not mounted on the PCB 18 of the metering modules 6,6′. This permits these split core CTs to be used in a retrofit application, since they can be worked into the constraints of an existing running power distribution system without disturbing the load conductors. The electrical connection of the secondary wiring to the PCB 18 is important since this unifies the calibration of the metering modules 6,6′ with split core CTs. As a result, all of the analog variables are part of the monolithic metering modules 6,6′, all calibration is done as one unit, and, thus, the output of fully calibrated digital data (third digital values 33 of
As will be described in greater detail, below, in connection with
The disclosed BCM 2 can monitor, for example, up to 84 circuit breaker branch circuits and up to eight main circuit breaker line and neutral circuits, report the corresponding voltages, currents, power quality, alarm status and the energy allocation. The BCM 2 can report through the serial port 50, for example, the main circuit breaker voltages (VA,VB,VC), the main circuit breaker line currents (IA,IB,IC,IN), power (W), energy (WHr), power factor (PF), and up to 84 branch circuit currents, which all come from the metering modules 6,6′ external to the processor 10.
Applications for this technology include load panels having relatively many circuit breakers. For example, today, far less than 1% of known load panels are monitored, including those, for example and without limitation, in residences.
All digital signal processing of analog values is within the example intelligent metering modules 6,6′. Only the resulting digital data is serially delivered to the BCM processor 10.
The routine 32 (
In the example of
The analog inputs 24 (
The example metering module 6 includes four metering processors 80 (e.g., without limitation, an MSP430™ ultra-low power 16-bit microcontroller marketed by Texas Instruments Incorporated of Dallas, Tex.), although any suitable number or type of metering processors can be employed. In this example, three of the four metering processors 80A,80B,80C are “slaves” and one of the four metering processors 80D is a “master”, although any suitable arrangement of multiple metering processors can be provided. The three example slave metering processors 80A,80B,80C input and convert branch load currents (I1-I7, I8-I14 and I15-I21). The example master metering processor 80D inputs and converts main circuit breaker currents (IA,IB,IC,IN) and voltages (VA,VB,VC,VN), and also collects serial digital data from the other three slave metering processors 80A,80B,80C and outputs serial digital data 82 on the digital interface 84 to the central data aggregation unit or processor component 8 (
Other functions that can be performed by the example metering processors 80 include: (1) measure current and voltage simultaneously; (2) apply calibration factors to these measurements for gain and phase, and perform a high pass filter to eliminate DC offsets; (3) associate the proper phase voltage to each load channel (e.g., by configuration); (4) associate the proper current flow polarity to each load channel (e.g., by configuration); (5) multiply current times voltage to provide power; (6) integrate current, voltage and power into RMS values over a suitable time interval for each load channel; (7) integrate power into energy for each load channel; (8) derive other metering data, such as, for example and without limitation, frequency; (9) provide all of this metering data to the processor 10 of the central data aggregation unit 8; (10) accept configuration information from the aggregator processor 10; (11) accept calibration and functional control commands from the aggregator processor 10; (12) accept firmware upgrades from the aggregator processor 10; (13) provide product and production identification information to the aggregator processor 10; (14) provide meter module health status to the aggregator processor 10; and/or (15) accept power to operate from the aggregator's power supply 99 (
The example metering processors 80 include seven Sigma Delta differential inputs 86 (one is shown in
The example master metering processor 80D is the interface/gateway between the aggregator processor 10 (
The master metering processor 80D also exchanges data with the other three slave metering processors 80A,80B,80C over the digital interface 88 using a chip select 92,94,96 for each respective slave metering processor 80A,80B,80C. Over this digital interface 88, calibration and related system commands, initialization data and firmware upgrades are sent to the slave metering processors 80A,80B,80C. During normal operation, metering data is brought up through the digital interface 88 and the master metering processor 80D to the aggregator processor 10. Each slave metering processor 80A,80B,80C performs all of the metering functions per branch circuit channel, and obtains its configuration and controls from the master metering processor 80D.
As shown in
The metering module 6 (
The example embodiment of
Although the digital values 30 (
The BCM 2′ of
Although the BCMs 2,2′ disclosed herein convert a number of line voltages 45 to a number of corresponding digital values for use in determining power and/or energy values, the BCMs 2,2′ can alternatively employ a number of predetermined digital voltage values (e.g., without limitation, predetermined digital values corresponding to conventional 110 V or 120 V line voltages).
The disclosed concept provides metering within each metering module in order that only the digital data needs to be delivered to the BCM processor 10 by just a few conductors. This provides a fundamental change to and the improvement of the BCM.
The disclosed concept employs an intelligent metering module, such as an example metering module 6, in which digital signal processing is provided. The resulting digital data is serially sent to the corresponding processor 10 of the BCM 2 employing a relatively few digital serial data communication lines, which replace 50 pin-connectors and 50-pin ribbon cables for hundreds of analog signal conductors, 84 TVS bi-directional diodes for protecting corresponding CTs, and external calibration data storage. Instead, where each CT needs to be calibrated, the calibration data can be stored in the metering module (e.g., in the memory 46 of
Furthermore, much better metering (e.g., without limitation, 0.5% accuracy or better) is possible due to cost saving and de-centralization of the hardware architecture. Moreover, the intelligent metering module 6 and the BCM processor component 8 can be manufactured and tested independently to create various types of BCMs and/or other products, which is not possible with known prior BCMs.
The disclosed concept can be applied to all kind of CTs including, for example, solid core, split core, relatively low-current rated CTs, and relatively high-current rated CTs, as opposed to only 100 A solid core CTs. Known BCMs are limited to one type of solid core CT, since the different CTs have different burden resisters and, thus, require different BCM CPU boards.
The disclosed concept employs far fewer conductors, no ribbon cables and no relatively large connectors. As a result, assembly is relatively fast, clean and easy. Energy accuracy is improved from about 1%-3% to about 0.5%, especially for relatively low currents. Calibration is relatively much easier, better and lower in cost. Manufacturing cost is significantly less.
While specific embodiments of the disclosed concept have been described in detail, it will be appreciated by those skilled in the art that various modifications and alternatives to those details could be developed in light of the overall teachings of the disclosure. Accordingly, the particular arrangements disclosed are meant to be illustrative only and not limiting as to the scope of the disclosed concept which is to be given the full breadth of the claims appended and any and all equivalents thereof