Patent Application
20100110061
1. Field of the Invention
The invention relates to image display technology, and more particularly to a local area image displaying system for a display device.
2. Description of the Related Art
The main stream of the liquid crystal displays (LCD) currently available in the market is thin-film-transistor (TFT) LCD driven in an active matrix fashion. A feature of the thin film transistor is that pixels are controlled in a manner similar to a large-scale integrated circuit constituted by silicon transistor electrodes made with thin film techniques. In other words, the electrodes are formed by lining up transistors, and each pixel is directly controlled by applying point-based pulses and can be controlled in a continuous manner.
However, the currently adopted techniques for displaying with a TFT-LCD is full screen displaying, together with variation of brightness realized through a backlight module, to exhibit information to a user. Since the displaying of information on the TFT-LCD is presented in a full screen ON/OFF fashion, in case that only a local area of the full screen is needed in carrying out the operation of information displaying, the remaining portions of the screen must be simultaneously put into operation, leading to undesired consumption of power.
According to practical experiences of use, when an idle area of a screen is larger than an in-operation area, the power consumption caused by the idle area of the screen will substantially reduce the in-service time period of a battery pack, especially for a system device that is long term carried, eventually affecting convenience and portability thereof. (For example, for a regular mobile phone, in order to acquire time data, a display of the mobile phone has to turn the full screen on, but an image displayed area for showing the time data may only take only a minor fraction of the full screen.)
In view of the above discussed problems of the known techniques, the present invention aims to provide a local area image displaying system for a screen of a display device, which allows a target image to be displayed in a selected local image displaying area of the screen of the display device. Since the display device only consumes power for the selected local image displaying area of the screen, unnecessary power consumption can be reduced.
In an embodiment of the present invention, screen signals supplied to an LCD screen are determined by controlling matrix-arranged switches for displaying operation of the LCD screen. A gate driving circuit for horizontal rows of the matrix-arranged switches supplies gate voltages to control switching-on/off of each pixel unit; and a data driving circuit for vertical columns of the matrix-arranged switches supplies data voltages to provide a suitable voltage signal to each pixel unit.
A timing controller and a microprocessor unit connected to the timing controller together control the displaying operation of the LCD screen. The timing controller generates a data driving circuit control signal and a gate control signal. The data driving circuit control signal controls the operation timing of the data driving circuit. The gate control signal controls the operation timing of the gate driving circuit.
The data driving circuit supplies the data voltages through data lines to selected ones of the pixel units. The gate driving circuit supplies gate voltages through gate lines to the selected ones of the pixel unit. The pixel units are arranged in a pixel matrix and the pixel units that are arranged in a pixel matrix define a global displaying area.
Based on the local displaying area in which a target image is to be displayed on the global displaying area, the timing controller sends the control signals to the data lines of the data driving circuit and the gate lines of the gate driving circuit that are covered by the local displaying area in order to enable the pixel units covered by the local displaying area, whereby the target image is displayed on the selected local displaying area.
With the technical solution provided by the present invention, the timing controller may function to supply desired control signals to the data driving circuit and the gate driving circuit according to the desired local displaying area so that data voltages and gate voltages are only supplied to the data lines and gate lines covered by the local displaying area. Thus, the present invention provides a displaying method that exhibits only an in-operation area and turns off signals associated with non-operated displaying areas of the LCD screen. In this way, power utilization efficiency can be enhanced and in-service time period of a battery pack is extended.
These and other features, aspects, and advantages of the present invention will become better understood with reference to the following description and appended claims. It is to be understood that both the foregoing general description and the following detailed description are examples, and are intended to provide further explanation of the invention as claimed.
The present invention will become more fully understood from the detailed description given herein below for illustration only, and thus is not limitative of the present invention, and wherein:
Reference will now be made in detail to the present preferred embodiments of the invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers are used in the drawings and the description refers to the same or the like parts.
With reference to
The scaler 12 is connected to a microprocessor unit 13 and an on-screen display (OSD) adjuster 14. The OSD adjuster 14 allows for fine adjustment of displaying-related parameters, such as brightness and contrast of screen displaying and horizontal and vertical positioning, of the image data that have been subjected to adjustment realized through the scaler 12. Further, the OSD adjuster 14 can be embedded or optional according to the numbers of language and font that the system can support.
During the processing of image data, the microprocessor unit 13 carries out reception and conversion of the image signal and interlaced scanning. In addition, it also helps the OSD adjuster 14 in appearance adjustment and font conversion. The scaler 12 transmits the adjusted and integrated image data as an image data signal s1 to a timing controller 2.
The timing controller 2 comprises an image signal source connection portion 21, a data driving circuit connection port 22, and a gate driving circuit connection port 23. The image data signal s1 provided by the scaler 12 is fed to the timing controller 2 through the image signal source connection port 21.
The timing controller 2 uses the data driving circuit connection port 22 and the gate driving circuit connection port 23 to respectively connect with the data driving circuit 31 and the gate driving circuit 32. The timing controller 2 generates a data driving circuit control signal s2 and a gate control signal s3 that respectively control the operation timings of the data driving circuit 31 and the gate driving circuit 32.
A display device 4 is connected to the data driving circuit 31 and the gate driving circuit 32, whereby the data driving circuit 31 and the gate driving circuit 32 supply data voltages and gate voltages to the display device 4 for displaying an image thereon.
As shown in
The data driving circuit 31 comprises a plurality of data lines S1-S6. These data lines S1-S6 are respectively connected to the data terminals 511 of the pixel units 51. The data driving circuit 31 selectively supplies a data voltage to the data line S1-S6 of at least one selected pixel unit. And also, the image data signal s1 and the data driving circuit control signal s2 generated by the timing controller 2 are transmitted with the data voltages generated by the data driving circuit 31 to the data lines S1-S6 of the selected pixel units 51 of the pixel matrix 5.
The gate driving circuit 32 comprises a plurality of gate lines G1-G6. These gate lines G1-G6 are respectively connected to the gate terminals 512 of the pixel units 51. The gate driving circuit 32 selectively supplies a gate voltage to the gate lines G1-G6 of at least one selected pixel unit. And also, the gate control signal s3 generated by the timing controller 2 is transmitted with the gate voltages generated by the gate driving circuit 32 to the gate lines G1-G6 of the selected pixel units 51 of the pixel matrix 5.
In
To display the image of the image data signal s1 with the pixel units 51, the gate voltage supplied by the gate driving circuit 32 controls the switch units 513 of the pixel units 51 and the data voltage supplied by the data driving circuit 31 conveys primary color signals of red, blue, and green fed from the image data source 10.
The gate driving circuit 32 operates to control the supply of a gate voltage to each gate line G1-G6 of the pixel matrix 5. When an image is subjected to a one-time row-by-row scanning operation, the gate driving circuit 32 supplies the gate voltage to the gate terminals 512 of the pixel units 51 to close all the switch units 513 comprised in a row to allow the data driving circuit 31 to supply the data voltages that contain image signals to the data terminals 511 of the pixel units 51.
The data driving circuit 31 operates to control the supply of a data voltage through each individual data line S1-S6 to the data terminals 511 of the pixel units 51 of the pixel matrix 5. When the gate driving circuit 32 close or open all the switch units 513 comprised in a row, the data driving circuit 31 supplies the data voltages to a whole row of the pixel matrix 5 in accordance with the image data signal s1 and the data driving circuit control signal s2 generated by the timing controller 2 to exhibit the pixels that form a combined and complete image.
Further, to display various colors for a complete image in the display device 4, it is obtained through the color levels of the sub-pixel of the primary color signals of red, blue, and green from the image data source 10. Color level control is performed in accordance with the level of gate voltage supplied from the gate driving circuit 32.
For the present invention that realizes displaying image in a local portion of a screen, the timing controller 2 generates, in response to a local displaying area W1 (see
For displaying the target image in the local displaying area W1, the embodiment discussed above employs selective driving of the data lines S3, S4 and gate lines G3, G4 associated with the local displaying area W1. Alternatively, it is also feasible to simultaneously drive all the data lines S1-S6, but only drive the gates lines G3, G4 associated with the local displaying area W1. This also allows the pixel units 51 contained in the local displaying area W1 to be enabled for displaying the target image in the selected local displaying area W1. It is apparent that, alternatively, only the data lines S3, S4 associated with the local displaying area W1 are driven, but all the gate lines G1-G6 are simultaneously driven for enabling only the pixel units 51 contained in the local displaying area W1 to display the target image in the selected local displaying area W1.
Similarly, when an attempt is made to display a target image in a different local displaying area W2 (see
Additional advantages and modifications will readily occur to those proficient in the relevant fields. The invention in its broader aspects is therefore not limited to the specific details and representative embodiments shown and described herein. Accordingly, various modifications may be made without departing from the spirit or scope of the general inventive concept as defined by the appended claims and their equivalents.
