Patent Grant
7362175
The invention relates to a low consumption voltage amplifier.
The low consumption voltage amplifier according to the invention may be used in any electronics domain. According to one particularly advantageous embodiment, the low consumption voltage amplifier according to the invention is a voltage/voltage amplifier of an X photon or gamma detector.
The block diagram for an X photon or gamma detector operating in photon counting is shown in
The amplifier A is usually composed of an operational amplifier 2 for which the inverter input (−) is connected to the elementary detector 1 and for which the non-inverter input (+) is connected to the circuit ground, a resistor 3 and a capacitor 4 being mounted in parallel between the inverter input (−) and the output from the operational amplifier 2.
In general, the voltage/voltage amplifier 5 is expected to have the following performances:
G=−Ca/Cb
The resistor r firstly stabilises the potential on the gate of the transistor T, and secondly varies the low cutoff frequency of the circuit.
Such an amplifier has several limitations. In particular, the counter-reaction (r, Cb) is such that in AC, the gate of the transistor T is like a virtual ground for the stage on the input side. The search for a high gain, and therefore a high capacitance Ca, then leads to charging the stage on the input side, and therefore introduces a significant consumption into this stage on the input side. The amplifier global consumption can then become high and can reach several tens of microwatts or even several hundreds of microwatts.
The amplifier according to the invention does not have this disadvantage.
The invention relates to a voltage amplifier comprising a first field effect transistor with a gate, a drain and a source, the amplifier input terminal being the gate of the first field effect transistor, and the amplifier output terminal being the drain of this first field effect transistor. The voltage amplifier comprises:
The first and second reference voltages may be the same value, for example the circuit reference voltage (ground).
According to another characteristic of the invention, the amplifier comprises a slaving circuit to control its output voltage.
According to yet another characteristic of the invention, the slaving circuit is composed of a resistor connected between the drain of the first transistor and a fixed voltage.
According to yet another characteristic of the invention, the slaving circuit is composed of a read circuit, the amplifier output voltage being applied to the input of this read circuit and the output of the read circuit outputting a control signal for the gate of a transistor that forms the first or the second current generator.
According to yet another characteristic of the invention, the amplifier comprises a low pass filter placed at the output from the read circuit to filter the control signal output by the read circuit.
According to yet another characteristic of the invention, the read circuit is a voltage follower.
According to yet another characteristic of the invention, the read circuit is a differential amplifier with two inputs, the amplifier output voltage being applied to a first input of the differential amplifier and a reference voltage being applied to the second input of the differential amplifier.
According to yet another characteristic of the invention, the read circuit is an amplifier that amplifies the variations of the amplifier output voltage compared with a reference voltage determined from an adjustment voltage.
According to yet another characteristic of the invention, the slaving circuit is composed of a MOS transistor mounted with common gate and the source of which is connected to the amplifier output.
According to a first embodiment of the invention, the gate of the first field effect transistor and the gate of the additional transistor are connected together.
According to a second embodiment of the invention, the amplifier comprises a voltage offset circuit to form the voltage applied to the gate of the additional transistor from the voltage applied to the gate of the first field effect transistor.
According to yet another characteristic of the invention, the voltage offset circuit is an external voltage source.
According to yet another characteristic of the invention, the voltage offset circuit is a directly polarised diode.
According to yet another characteristic of the invention, the amplifier is made using the MOS technology.
The invention also relates to an X photon or gamma detector comprising a charge/voltage amplifier and a voltage/voltage amplifier that amplifies the voltage output by the charge/voltage amplifier, characterised in that the voltage/voltage amplifier is an amplifier according to the invention.
Other characteristics and advantages of the invention will appear after reading preferred embodiments of the invention with reference to the attached figures among which:
The same references denote the same elements in all figures.
The voltage/voltage amplifier comprises a MOS transistor M1, a first current generator I1, a first capacitor with capacitance C1, a second current generator I0 and a second capacitor with capacitance C0. The circuit is described with an N type MOS transistor, as an example. A person skilled in the art could easily transpose this circuit for use with a P type MOS transistor.
The amplifier is then powered between a polarisation voltage Vdd and a reference voltage, for example the ground. The input terminal E and the output terminal S of the amplifier are the gate and the drain respectively of the transistor M1.
The transistor drain is connected to a first terminal of the first current generator I1, the second terminal of which is connected to the power supply voltage Vdd. The first capacitor with capacitance C1 has a first terminal connected to the drain of the transistor M1 and a second terminal connected to the ground. The source of transistor M1 is connected to a first terminal of the second current generator I0, and the second terminal of the second current generator is connected to the ground. The second capacitor with capacitance C0 is mounted in parallel with the second current generator I0.
We will now describe operation of the amplifier.
Initially, transistor M1 is not conducting.
The current generator I0 injects electrons onto the source of transistor M1, these electrons are stored in the capacitor with capacitance C0 leading to a drop in the source potential VA, until the transistor M1 starts conducting. The source potential VA stabilises when the current that passes through the transistor M1 becomes equal to I0. As long as the transistor M1 is not conducting, the amplifier output voltage VS is equal to the power supply voltage Vdd. As soon as the transistor M1 starts conducting current I0, and if the currents I1 and I0 are substantially equal, the sum of the currents applied to the output terminal S are equal to zero and the output voltage VS may a priori stabilise at any value between VE-VT and Vdd, where VE is the amplifier input voltage and VT is the threshold voltage of transistor M1.
Suppose that the output voltage VS is equal to an at-rest voltage VS0. If the amplifier input stage modulates the input voltage VE by a positive quantity ΔVE, then the transistor M1 is temporarily more conducting and the potential VA increases until the current passing through the transistor M1 stabilises once again at this value I0. We then have:
VA≈VE−VT+ΔVE.
The charge Q01 transmitted by the transistor M1 from the source to the drain of the transistor M1 throughout the duration Δt1 of the transient phenomenon described above is then written:
Q01=−I0×Δt1−C0×ΔVE
Throughout this duration Δt1, the charge Q1 output by the current generator I1 onto the output terminal S is written:
Q1=I1×Δt1, and
Q1≅I0×Δt1
The charge variation ΔQ1 on the output terminal S is then written:
ΔQ1≅−C0×ΔVE,
which generates a voltage variation such that:
ΔVS≅−(C0/C1)×ΔVE.
Thus the amplifier has a negative gain equal to −(C0/C1), throughout the duration of the transient during which the voltage ΔVE appears. An input step is then transformed into an output step.
When the voltage VE returns to its at-rest state and therefore varies by a negative quantity ΔVE, the transistor M1 is temporarily less conducting. The voltage VA then reduces until the current that passes through the transistor stabilises again at the value I0. The voltage VA is then written:
VA≅VE−VT.
The charge Q02 transmitted by the transistor M1 from the source to the drain for the duration Δt2 of this transient phenomenon is then written:
Q02=−I0×Δt2+C0×ΔVE
During this time Δt2, the charge Q2 output by the current generator I0 on the output terminal S is written:
Q2=I1×Δt2, namely
Q2≅I0×Δt2
Therefore the charge variation ΔQ2 on terminal S is written as follows:
ΔQ2≅C0×ΔVE
which generates a voltage variation ΔVs such that:
ΔVS≅(C0/C1)×ΔVE
Since this variation is the opposite of the above variation, the output voltage VS returns to its at-rest value.
The proposed voltage amplifier is a negative gain voltage amplifier −(C0/C1).
The main advantages of such a circuit can be listed as follows:
The voltage VS available at the amplifier output is output at high impedance. Therefore, this requires that the stage on the output side is a high impedance stage itself. This is easily possible due to the use of integrated circuits, particularly MOS integrated circuits for which the input impedance of the stage on the output side can be purely capacitive and high due to the small size of transistors (low gate capacitance). It should be noted also that the stray connection capacitance between the amplifier and the output side stage is added to the output capacitance C1. Once again, integrated circuits minimise stray capacitances.
It is desirable that currents I0 and I1 should be equalized as precisely as possible so that the voltage VS can stabilize between voltage VE−VT and voltage Vdd. Due to technological dispersions, it is generally impossible to achieve almost perfect equality between I0 and I1 simply by choosing the size of components from which the circuit is made. In this case, almost perfect equality between I0 and I1 is achieved using a slaving device.
According to this first variant, the amplifier comprises all the elements already described with reference to
The assembly composed of the current source I1 and the resistor R1 is then an imperfect current source with nominal value I1, and with an output resistor R1. By construction, the value of the current I1 in this case is chosen to be less than I0. The voltage VS stabilises when the following relation is satisfied:
Vdd−VS=R1×(I0−I1), namely
VS=Vdd−R1×(I0−I1)
In the case in which the second terminal of the resistor R1 is connected to the ground, by construction the current I1 is chosen to be greater than I0. The current circulating in the resistor R1 is then equal to I1−I0 and the equations that express the voltage VS are modified accordingly.
The circuit according to the first variant of the first improvement does not transport very low frequency variations of the input voltage VE. The output voltage then returns to its equilibrium point with the time constant R1C1. This is advantageous, because the X-ray or gamma detection circuit voltage amplifier is usually required to be band-pass (<<shaper>>function).
Although the low cutoff frequency is defined by the time constant R1C1, the high cutoff frequency is defined by the transfer rate of charges from the capacitor with capacitance C0 to the capacitor with capacitance C1, in other words by the time constant (1/gm)×C0, where gm is the transconductance of the transistor M1, itself defined by the choice of the current I0.
The slaving amplifier shown in
According to this second variant, the amplifier comprises all the elements already described with reference to
VG=VS−VTmos,
where VTmos is the threshold voltage of the transistor TM and VS is the amplifier output voltage.
The transistor TM operating under saturated conditions then has a highly non-linear behaviour as a function of the voltage VS. This circuit is particularly well adapted when the amplifier input signal is composed of pulses.
The transistor TM may be of the N type or the P type. In the case in which the transistor TM is of the N type (
In the case in which the transistor TM is of the P type (not shown on the figures), its drain is connected to the ground and its substrate is connected to the voltage Vdd. In this case, the current I1 is greater than the current I0 and the circuit is adapted to the presence of positive pulses at the amplifier input.
Two other variants to the first improvement of the slaving amplifier are shown in
In the second example of a slaving voltage/voltage amplifier, the amplifier comprises all the elements already described with reference to
In this case the current generator I1 is made from a P type transistor M2a for which the drain, source and gate are connected to the drain of transistor M1, to the power supply voltage Vdd and to the intermediate point between R2 and C2 respectively. The circuit input As is connected to the drains of transistors M1 and M2a (i.e. the output S of the amplifier). A first terminal of the filter composed of the resistor R2 in series with the capacitor with capacitance C2 is connected to the output from the read circuit As, the second terminal of the filter, namely the intermediate point, being connected to the gate of transistor M2a.
The output voltage VS is read by the read circuit As that reproduces the variations of voltage VS with a positive but not necessarily constant gain, and with an offset voltage that is not necessarily zero. The output from the read circuit As is filtered at low frequency by the circuit (R2, C2). The filtered voltage is applied to the gate of transistor M2a.
The at-rest value of the voltage VS is the value that produces a voltage on the gate of transistor M2a, through the read circuit As, such that the current I1 that passes through the transistor M2a is equal to the current I0.
The read circuit As may be made in different ways. Thus, the circuit As may be a voltage follower with a gain equal to substantially 1. The circuit As may also be a differential amplifier with two inputs, the voltage VS being applied to a first input and a reference voltage being applied to the second input. In the latter case, the output voltage VS stabilises at a value substantially equal to the reference voltage. A third example is the case in which the circuit As amplifies variations in the voltage VS with respect to a reference voltage determined from an adjustment voltage, as can be seen as an example in
In order to achieve a stable circuit, the read circuit As is designed to introduce a small phase shift. The amplifier according to the two variants described with reference to
According to the diagram in
The voltage/voltage amplifier according to the invention comprises all the elements already described with reference to
In the same way as above, precise equality between currents 10 and 11 may be achieved by a slaving device as shown in
Transistors M1 and M3 are in saturated conditions. It follows that:
VS>VE−VT(M1), and
VS<VE−VT(M2), where
VT(M1) is the threshold voltage (positive) of transistor M1 and VT(M2) is the threshold voltage (negative) of transistor M2. The role of the slaving device (not shown in
When the input voltage VE increases, the current passing through transistor M1 increases and the current passing through transistor M3 reduces.
At the end of an input transient ΔVE, we get:
ΔVS=−(C0/C1+C01/C1)×ΔVE
Therefore advantageously, the amplifier gain is increased. For example, if the capacitances C0 and C01 are substantially equal, the gain is doubled while consumption remains unchanged.
A second embodiment of the invention is shown in
In the case in which the voltage Vdec is negative, the minimum value necessary for the power supply voltage Vdd is low and consequently it is possible to reduce the dissipated power (but in this case the voltage excursion VS is also low). Conversely, if the voltage Vdec is positive, the minimum value of the power supply voltage Vdd is increased and consequently it is possible to increase the excursion of voltage VS (but in this case the dissipated power is also increased).
It should be noted here that
In addition to the elements shown in
The circuit shown in
The electrical circuit shown in
The circuit is polarized between a voltage Vdd and the ground.
| Number | Date | Country | Kind |
|---|---|---|---|
| 03 50344 | Jul 2003 | FR | national |
| Filing Document | Filing Date | Country | Kind | 371c Date |
|---|---|---|---|---|
| PCT/FR2004/050330 | 7/13/2004 | WO | 00 | 1/6/2006 |
| Publishing Document | Publishing Date | Country | Kind |
|---|---|---|---|
| WO2005/011104 | 2/3/2005 | WO | A |
| Number | Name | Date | Kind |
|---|---|---|---|
| 3733514 | Garuts | May 1973 | A |
| 6750716 | Cusinato et al. | Jun 2004 | B2 |
| Number | Date | Country |
|---|---|---|
| 0480815 | Apr 1992 | EP |
| 0789450 | Aug 1997 | EP |
| 03034593 | Apr 2003 | WO |
| Number | Date | Country | |
|---|---|---|---|
| 20060186959 A1 | Aug 2006 | US |
