Claims
- 1. Hardware, wherein a GPS C/A code and carrier tracking component is coupled to an L1 and L2 band sampling component, where said sampling component is coupled to a digital signal processing component, wherein the internal timing of each of said components are carrier phase coherent, and said digital signal processing component operates on specified segment of data from said sampling component.
- 2. Hardware of claim 1, wherein the digital signal processing component includes a sample RAM and a computer.
- 3. Hardware of claim 2 where the computer includes an Intel 486 microprocessor.
- 4. Hardware of claim 2 where the computer includes a TI TMS320 DSP.
- 5. Hardware of claim 1, wherein the digital signal processing component operates continuously on data from sampling component.
- 6. Hardware of claim 5, wherein the digital signal processing component utilizes direct memory access.
- 7. Hardware of claim 5, where the digital signal processing component is an FPGA.
- 8. Hardware of claim 1, where the digital signal processing component is an FPGA with a sample buffer.
- 9. Hardware wherein an a GPS C/A code and carrier tracking receiver whose software can be reprogrammed is coupled to an L1 and L2 band sampling component and a digital signal processing component, wherein the reference oscillator of said receiver and each component are common and carrier phase coherent.
- 10. Hardware of claim 9 wherein said GPS C/A code and carrier tracking receiver is a Canadian Marconi Electronics Superstar with an external clock input.
- 11. Hardware of claim 9, wherein the digital signal processing component includes a sample RAM and a computer.
- 12. Hardware of claim 11 where the computer includes an Intel 486 microprocessor.
- 13. Hardware of claim 11 where the computer includes a TI TMS320 DSP.
- 14. Hardware of claim 9, wherein the digital signal processing component operates continuously on data from sampling component.
- 15. Hardware of claim 14, wherein the digital signal processing component utilizes direct memory access.
- 16. Hardware of claim 14, where the digital signal processing component is an FPGA.
- 17. Hardware of claim 9, where the digital signal processing component is an FPGA with a sample buffer.
- 18. Hardware of claim 17, where the digital signal processing component utilizes discontinuous, batch segments.
- 19. A System and Method wherein
a continuously tracking C/A code carrier phase tracking GPS component is coherently coupled to a L1 and L2 band sampling component and digital signal processing component, where said sampling component generates L1 and L2 quadrature samples of the GPS signal, where a selection of data over a specified interval is collected for processing, where tracking parameters from the C/A code and carrier tracking over said specified interval are used to synthesize feedforward P code and carrier sequences for each of the L1 and L2 channels, where said L1 feedforward P code and carrier sequence is mixed with said quadrature L1 samples and filtered to form a baseband, intermediate, quasi-static sequence, where said baseband, intermediate, quasi-static sequence from L1 is mixed with the samples from said L2 channel and filtered to form a baseband quasi-static output whose phase is a measurement of the difference between said L1 and L2 quadrature components of the GPS signal.
- 20. System and Method of claim 19 wherein said baseband quasi-static output maybe used to reconstruct the L2 carrier phase by tying said baseband quasi-static output to the parameters from the C/A code and carrier tracking.
- 21. System and Method of claim 19 wherein said baseband quasi-static output is averaged over 100 ms.
- 22. System and Method of claim 19 wherein said baseband quasi-static output is used as the error signal for a phase-locked loop in software downstream of said baseband quasi-static output.
- 23. System and Method of claim 19 wherein said specified intervals are discontinuous from one interval to the next.
- 24. System and Method of claim 19 wherein said filter for baseband, intermediate, quasi-static sequence is a boxcar average of 2 μs.
- 25. System and Method of claim 19 wherein said baseband quasi-static output is the basis for resolving cycle ambiguities between a reference base station and a mobile user in order that the mobile user may initialize kinematic positioning using the C/A code carrier measurements available on the mobile user's receiver.
- 26. System and Method of claim 25 wherein said kinematic position sensing is used as the guidance signal to automatically steer a farm tractor or other heavy equipment.
- 27. System and Method of claim 26 wherein a plurality of said reference base stations are used with one or more mobile users to create a distributed reference network.
- 28. System and Method of claim 19 wherein said C/A code carrier phase tracking GPS receiver is a GPS C/A code and carrier tracking receiver whose software can be reprogrammed, wherein the reference oscillator of said receiver and each component are common and carrier phase coherent.
- 29. A System and Method wherein
a continuously tracking C/A code carrier phase tracking GPS component is coherently coupled to a L1 and L2 band sampling component and digital signal processing component, where said sampling component generates L1 and L2 quadrature samples of the GPS signal, where a selection of data over a specified interval is collected for processing, where tracking parameters from the C/A code and carrier tracking over said specified interval are used to synthesize feedforward P code and carrier sequences for each of the L1 and L2 channels, where said L1 and L2 feedforward P code and carrier sequences are mixed with said quadrature L1 and L2 samples, respectively, and filtered to form baseband, intermediate, quasi-static signals, where said baseband, intermediate, quasi-static signals are mixed together and filtered to form a baseband quasi-static output whose phase is a measurement of the difference between said L1 and L2 quadrature components of the GPS signal.
- 30. A System and Method wherein
a continuously tracking C/A code carrier phase tracking GPS component is coherently coupled to a L2 band sampling component and digital signal processing component, where said sampling component generates L2 quadrature samples of the GPS signal, where a selection of data over a specified interval is collected for processing, where tracking parameters from the C/A code and carrier tracking over said specified interval are used to synthesize feedforward C/A code and carrier sequences for the L2 channel to form a baseband, intermediate quasi-static sequence, where said baseband, intermediate, quasi-static sequence from said L2 channel is filtered to form a baseband quasi-static output whose phase is a measurement of the difference between said L1 and L2 quadrature components of the GPS signal.
- 31. A Process wherein
C/A code carrier phase tracking parameters and L1 and L2 quadrature samples of the GPS signal are provided to a digital signal processor over a specified interval, where tracking parameters from the C/A code and carrier tracking over said specified interval are used to synthesize feedforward P code and carrier sequences for each of the L1 and L2 channels, where said L1 feedforward P code and carrier sequence is mixed with said quadrature L1 samples and filtered to form a baseband, intermediate, quasi-static sequence, where said baseband, intermediate, quasi-static sequence from L1 is mixed with the samples from said L2 channel and filtered to form a baseband quasi-static output whose phase is a measurement of the difference between said L1 and L2 quadrature components of the GPS signal.
- 32. A process of claim 31 wherein lookup tables are used to generate said feedforward P code.
- 33. A process of claim 31 wherein lookup tables are used to mix said feedforward P code and carrier signals with said quadrature L1 and L2 samples.
- 34. System of claim 19 wherein an FPGA is used as the processing component.
- 35. A System and Process wherein
a C/A code carrier phase tracking GPS component is coherently coupled to a L1 and L2 band sampling component and an FPGA, where said sampling component generates L1 and L2 quadrature samples of the GPS signal, where said FPGA is coupled to a RAM, where said RAM collects a selection of L1 and L2 samples over a specified interval, where said FPGA uses tracking parameters from the C/A code and carrier tracking over said specified interval are used to synthesize feedforward P code and carrier sequences for each of the L1 and L2 channels, where said L1 feedforward P code and carrier sequence is mixed with said quadrature L1 samples and filtered to form a baseband, intermediate, quasi-static sequence, where said baseband, intermediate, quasi-static sequence from L1 is mixed with the samples from said L2 channel and filtered to form a baseband quasi-static output whose phase is a measurement of the difference between said L1 and L2 quadrature components of the GPS signal.
- 36. A System and Process of claim 34 wherein said specified interval is selected so as not to coincide with an P code X1 or X2 register rollover event
- 37. System of claim 19 wherein the computer is that of said ordinary GPS C/A code receiver.
Parent Case Info
[0001] This application claims the benefit of U.S. Provisional Appl. Ser. Nos. 60/266,811, filed Feb. 5, 2001, and 60/295,935, filed Jun. 4, 2001.
Provisional Applications (2)
|
Number |
Date |
Country |
|
60266811 |
Feb 2001 |
US |
|
60295936 |
Jun 2001 |
US |