Patent Application
20100026254
1. Field of the Invention
The present invention relates to an over current protection circuit, and more particularly, to an over current protection circuit for a low dropout regulator.
2. Description of the Related Art
A low dropout regulator, one kind of linear regulator, provides an output voltage slightly lower than its input voltage. Like most power supply circuits, a low dropout regulator requires an over current protection mechanism to prevent itself and the load circuit thereof from being damaged by its output current.
As shown in
The current I1 provided by the current source 152 is fixed, and therefore the voltage across the resistor 154, VA, is also fixed. When the current flowing through the power transistor 110 is over a threshold, i.e., when the voltage across the resistor 153, VB, is higher than the voltage across the resistor 154, VA, the current-limiting amplifier 151 outputs a high voltage to activate the transistor 155. The transistor 155 then pulls down the voltage at the gate electrode of the power transistor 110 to turn off the power transistor 110, and the output current of the low dropout regulator 100 is restrained.
However, since the output current of the power transistor 110 equals the current flowing through the resistor 153, the voltage across the resistor 153, VB, is considerably high. Therefore, the voltage dropout between the supply voltage and the output voltage of the low dropout regulator 100 increases significantly, which contradicts the main function thereof. In addition, the dissipated heat caused by the resistor 153 raises the chip temperature such that the performance of the low dropout regulator 100 is degraded and the heat dissipation problem thereof is aggravated.
In view of the drawbacks of the aforesaid prior art, it is necessary to design a low dropout regulator and an over current protection circuit thereof such that the low dropout regulator is not damaged by an over current, the voltage difference of the input and output voltages of the low dropout regulator does not increase, and the heat dissipation problem is not aggravated.
The over current protection circuit for a low dropout regulator according to one embodiment of the present invention comprises a sense transistor, a sense resistor, an operational amplifier and a first transistor, wherein the low dropout regulator comprises a power transistor. The sense transistor is configured to sense the current flowing through the power transistor. The sense resistor is coupled to the sense transistor and shares the same current flowing through the sense transistor. The operational amplifier is configured to output a control signal according to the voltage across the sense resistor and a reference voltage. The first transistor is configured to control the power transistor according to the control signal.
The over current protection circuit for low dropout regulator according to another embodiment of the present invention comprises a sense transistor, a sense resistor, a current source, a first current-mirror circuit, a second current-mirror circuit, a first resistor and a first transistor, wherein the low dropout regulator comprises a power transistor. The sense transistor is configured to sense the current flowing through the power transistor. The sense resistor is coupled to the sense transistor and shares the same current flowing through the sense transistor. The first current-mirror circuit is coupled to the current source and forms a first part of first current path and a first part of a second current path. The second current-mirror circuit is coupled to the current source and forms a second part of the first current path and a second part of the second current path. The first resistor is coupled to the second current-mirror circuit and forms a third part of the first current path. The first transistor is configured to control the power transistor according to the voltages across the sense resistor and the first resistor.
The low dropout regulator with over current protection mechanism according to another embodiment of the present invention comprises an NMOS power transistor, an error amplifier, a sense transistor, a sense resistor, a current source, a first current-mirror circuit, a second current-mirror circuit, a first resistor and a first transistor. The drain electrode of the NMOS power transistor is coupled to a supply voltage. The source electrode of the NMOS power transistor is coupled to a feedback circuit. The non-inverting input terminal of the error amplifier is coupled to a reference voltage. The inverting input terminal of the error amplifier is coupled to the feedback circuit. The output terminal of the error amplifier is coupled to the gate electrode of the power transistor. The sense transistor is configured to sense the current flowing through the power transistor. The sense resistor is coupled to the sense transistor and shares the same current flowing through the sense transistor. The first current-mirror circuit is coupled to the current source and forms a first part of a first current path and a first part of a second current path. The second current-mirror circuit is coupled to the current source and forms a second part of the first current path and a second part of the second current path. The first resistor is coupled to the second current-mirror circuit and forms a third part of the first current path. The first transistor is configured to control the power transistor according to the voltages across the sense resistor and the first resistor.
The objectives and advantages of the present invention will become apparent upon reading the following description and upon referring to the accompanying drawings of which:
The over current protection circuit 250 comprises a sense resistor 251, a sense transistor 252, an operational amplifier 253, a first transistor 254 and a reference voltage circuit 255. The sense transistor 252 is an NMOS transistor. The gate electrode of the sense transistor 252 is coupled to the gate electrode of the power transistor 210. The source electrode of the sense transistor 252 is coupled to the source electrode of the power transistor 210. One end of the sense resistor 251 is coupled to the supply voltage, and the other end is coupled to the drain electrode of the sense transistor 252. The first transistor 254 is an NMOS transistor. The drain electrode of the first transistor 254 is coupled to the gate electrode of the sense transistor 252. The gate electrode of the first transistor 254 is coupled to the output terminal of the operational amplifier 253. The source electrode of the first transistor 254 is grounded. The inverting input terminal of the operational amplifier 253 is coupled to the drain electrode of the sense transistor 252. The non-inverting input terminal of the operational amplifier 253 is coupled to a reference voltage VF provided by the reference voltage circuit 255. The reference voltage circuit 255 comprises a first resistor 256 and a current source 257. One end of the first resistor 256 is coupled to the supply voltage, and the other end is coupled to the common node of the current source 257 and the non-inverting input terminal of the operational amplifier 253. The current source 257 provides a fixed current and generates the reference voltage VF at the non-inverting input terminal of the operational amplifier 253.
The width-to-length ratio (W/L) of the sense transistor 252 is 1/K times that of the power transistor 210. Therefore, the current flowing through the sense transistor 252, ISEN, is 1/K times the current flowing through the power transistor 210, ILOAD. When the low dropout regulator 200 operates in normal mode, the operational amplifier 253 outputs a low voltage, and the first transistor 254 is non-activated. When the current ILOAD flowing through the power transistor 210 is over a threshold, that is, when the voltage across the sense resistor 251 (ISEN multiplied by the resistance of the sense resistor 251) is higher than a threshold, the voltage at the non-inverting input terminal of the operational amplifier 253 is higher than that at the inverting input terminal of the operational amplifier 253. At such point, the operational amplifier 253 outputs a high voltage to activate the first transistor 254. The voltage at the drain electrode of the first transistor 254 is then pulled to a low voltage such that the current flowing through the power transistor 210 is restrained.
Comparing the low dropout regulator 200 and the over current protection circuit 250 to the aforesaid prior art, it is clear that the low dropout regulator 200 is not negatively affected by the addition of the over current protection circuit 250, but still retains a low dropout voltage between its input and output voltages. On the other hand, since the current ISEN is relatively small, the heat generated thereby would not cause any serious heat dissipation problem. In addition, the current ISEN flows to the load circuit 260 and therefore does not add to the current flowing through the over current protection circuit 250.
The over current protection circuit 350 is simplified compared to the over current protection circuit 250. The over current protection circuit 350 comprises a sense transistor 351, a sense resistor 352, a first resistor 353, a first current-mirror circuit 354, a second current-mirror circuit 355, a first transistor 356 and a current source 357. The first current-mirror circuit 354 comprises a second transistor 3541, a third transistor 3542 and a fourth transistor 3543. The second current-mirror circuit 355 comprises a fifth transistor 3551 and a sixth transistor 3552.
The sense transistor 351 is an NMOS transistor. The gate electrode of the sense transistor 351 is coupled to the gate electrode of the power transistor 310. The source electrode of the sense transistor 351 is coupled to the source electrode of the power transistor 310. One end of the sense resistor 352 is coupled to a supply voltage, and the other end is coupled to the drain electrode of the sense transistor 351. The first transistor 356 is an NMOS transistor. The drain electrode of the first transistor 356 is coupled to the gate electrode of the sense transistor 351. The source electrode of the first transistor 356 is grounded. The second transistor 3541, the third transistor 3542 and the fourth transistor 3543 are all NMOS transistors, and the size ratios thereof are substantially the same. The drain electrode of the second transistor 3541 is coupled to the gate electrode of the second transistor 3541. The source electrode of the second transistor 3541 is grounded. The drain electrode of the third transistor 3542 is coupled to the gate electrode of the first transistor 356. The gate electrode of the third transistor 3542 is coupled to the gate electrode of the second transistor 3541. The source electrode of the third transistor 3542 is grounded. The gate electrode of the fourth transistor 3543 is coupled to the gate electrode of the second transistor 3541. The source electrode of the fourth transistor 3543 is grounded. The output terminal of the current source 357 is coupled to the drain electrode of the second transistor 3541.
The fifth transistor 3551 and the sixth transistor 3552 are both PMOS transistors, and the size ratios thereof are substantially the same. The gate electrode of the fifth transistor 3551 is coupled to the gate electrode of the sixth transistor 3552. The drain electrode of the fifth transistor 3551 is coupled to the drain electrode of the third transistor 3542. The gate electrode of the sixth transistor 3552 is coupled to the drain electrode of the sixth transistor 3552. The source electrode of the sixth transistor 3552 is coupled to the drain electrode of the sense transistor 351. One end of the first resistor 353 is coupled to the supply voltage, and the other end is coupled to the source electrode of the fifth transistor 3551.
As shown in
The width-to-length ratio of the sense transistor 351 is 1/K times that of the power transistor 310. Therefore, the current flowing through the sense transistor 351, ISEN, is 1/K times the current flowing through the power transistor 310, ILOAD. The resistance of the sense resistor 352 is much smaller than that of the first resistor 353. The current source 357 provides a fixed current IA flowing through the second transistor 3541. The first current-mirror circuit 354 mirrors the current IA such that the current flowing through the third transistor 3542 and the fourth transistor 3543 are also IA. According to the same principle, the current flowing through the fifth transistor 3551 and the sixth transistor 3552 are also IA.
When the low dropout regulator 300 operates in normal mode, the voltage across the sense resistor 352 caused by the current ISEN is negligible. In addition, since the resistance of the sense resistor 352 is much smaller than that of the first resistor 353, the voltage across the sense resistor 352 is much lower than that of the first resistor 353. Therefore, the gate-to-source voltage of the third transistor 3542 is much higher than that of the fifth transistor 3551. At such point, the fifth transistor 3551 is non-activated such that the voltage at the drain electrode of the fifth transistor 3551 is not high enough to activate the first transistor 356.
When the current ILOAD flowing through the power transistor 210 is over a threshold, the sensed current ISEN generates a sufficient voltage across the sense resistor 352. In consequence, the gate-to-source voltage of the fifth transistor 3551 is sufficient to activate the fifth transistor 3551. At such point, the voltage at the drain electrode of the fifth transistor 3551 is sufficient to activate the first transistor 356. The activated first transistor 356 then pulls down the voltage at its drain electrode, that is, the voltage at the gate electrode of the power transistor 310. In consequence, the current ILOAD is restrained.
Comparing the low dropout regulator 300 and the over current protection circuit 350 to the aforesaid prior art, it is clear that the low dropout regulator 300 is not negatively affected by the over current protection circuit 350, but still retains a low dropout voltage between its input and output voltages. On the other hand, since the current ISEN is relatively small, the heat generated thereby would not cause any serious heat dissipation problem. In addition, the current ISEN flows to the load circuit 360 such that it does not contribute to the current flowing through the over current protection circuit 350.
The above-described embodiments of the present invention are intended to be illustrative only. Those skilled in the art may devise numerous alternative embodiments without departing from the scope of the following claims.
| Number | Date | Country | Kind |
|---|---|---|---|
| 097128571 | Jul 2008 | TW | national |
