Patent Application
20160122235
The present invention relates to low-e panels. More particularly, this invention relates to low-e panels with improved performance and methods for forming such low-e panels.
Low emissivity, or low-e, panels are often formed by depositing a reflective layer (e.g., silver), along with various other layers, onto a transparent (e.g., glass) substrate. The other layers typically include various dielectric and metal oxide layers, such as silicon nitride, tin oxide, and zinc oxide, to provide a barrier between the stack and both the substrate and the environment, as well as to act as optical fillers and improve the optical characteristics of the panel.
When used in, for example, windows, and depending on the particular environment (i.e., climate), it may be desirable for the low-e panels to allow visible light to pass through the window while blocking other types of solar radiation, such as infra-red. Such panels are often referred to as having a high light-to-solar gain (LSG) ratio.
Currently available low-e panels are able to achieve LSG ratios of 1.8, or even higher, by using coating with more than one reflective layer (i.e., “double silver” coatings, “triple silver” coatings, etc.) However, these coatings typically exhibit changes in, for example, optical performance (e.g., color) if they are exposed to a heat treatment, such as that often performed to temper the glass substrate. As a result, different coatings must be used depending on whether or not a heat treatment will subsequently be performed.
Some existing low-e panels, suitable for certain applications, exhibit little or no change in performance due to the heat treatment. However, these low-e panels typically only utilize a single reflective layer, and thus have relatively low LSG ratios (e.g., less than 1.5).
To facilitate understanding, identical reference numerals have been used, where possible, to designate identical elements that are common to the figures. The drawings are not to scale and the relative dimensions of various elements in the drawings are depicted schematically and not necessarily to scale.
The techniques of the present invention can readily be understood by considering the following detailed description in conjunction with the accompanying drawings, in which:
A detailed description of one or more embodiments is provided below along with accompanying figures. The detailed description is provided in connection with such embodiments, but is not limited to any particular example. The scope is limited only by the claims, and numerous alternatives, modifications, and equivalents are encompassed. Numerous specific details are set forth in the following description in order to provide a thorough understanding. These details are provided for the purpose of example and the described techniques may be practiced according to the claims without some or all of these specific details. For the purpose of clarity, technical material that is known in the technical fields related to the embodiments has not been described in detail to avoid unnecessarily obscuring the description.
The term “horizontal” as used herein will be understood to be defined as a plane parallel to the plane or surface of the substrate, regardless of the orientation of the substrate. The term “vertical” will refer to a direction perpendicular to the horizontal as previously defined. Terms such as “above”, “below”, “bottom”, “top”, “side” (e.g. sidewall), “higher”, “lower”, “upper”, “over”, and “under”, are defined with respect to the horizontal plane. The term “on” means there is direct contact between the elements. The term “above” will allow for intervening elements.
Some embodiments provide low-e panels which exhibit very little color change from a heat treatment (e.g., to temper the glass) and improved transmission of visible light, while also providing relatively high light-to-solar gain (LSG) ratios (e.g., ˜1.8 in a double silver configuration).
In some embodiments, this is accomplished using a new material as a dielectric layer (e.g., a base layer and/or a spacer layer) within a double (or triple) silver low-e stack, which includes zinc, tin, and aluminum (e.g., zinc-tin-aluminum oxide). In some embodiments, this dielectric layer is used as a base layer formed between the substrate and the first silver layer. The base layer may have a thickness of between about 3 nm and about 40 nm. In some embodiments, the dielectric layer is also used as a base/spacer layer between the two silver layers and has a thickness of between about 50 nm and about 90 nm. The dielectric layer may also include beryllium, sodium, magnesium, potassium, calcium, and/or cadmium to adjust various performance characteristics of the low-e stack.
The low-e stack 104 includes a first (or lower) protective layer 106, a first base layer 108, a first seed layer 110, a first reflective layer 112, a first barrier layer 114, a second (or upper) base layer 116, a second seed layer 118, a second reflective layer 120, a second barrier layer 122, an over-coating layer 124, and a second protective layer 126. Exemplary details as to the functionality provided by each of the layers 106-126 are provided below.
The various layers in the low-e stack 104 may be formed sequentially (i.e., from bottom to top) above the transparent substrate 102 using, for example, a physical vapor deposition (PVD) and/or reactive sputtering processing tool. In some embodiments, the low-e stack 104 is formed above the entire substrate 102. However, in some embodiments, the low-e stack 104 may only be formed above isolated portions of the transparent substrate 102. Although the layers may be described as being formed “above” the previous layer (or the substrate), it should be understood that in some embodiments, each layer is formed directly on (and adjacent to) the previously provided/formed component (e.g., layer). In some embodiments, additional layers may be included between the layers, and other processing steps may also be performed between the formation of various layers.
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The first base (or dielectric) layer 108 is formed above the first protective layer 106. The first base layer 106 may include zinc, tin, aluminum, or a combination thereof. In some embodiments, the first base layer 108 is made of zinc-tin-aluminum oxide. The first base layer 108 may have a thickness of, for example, between about 3 nanometers (nm) and about 40 nm, such as about 25 nm. The first base layer 108 may be used to tune the optical properties (e.g., color, transmittance, etc.) of the low-e panel 100 as a whole, as well as to enhance silver nucleation. The material used in the first base layer 108 (e.g., zinc-tin-aluminum oxide) may also include beryllium, sodium, magnesium, potassium, calcium, cadmium, or a combination thereof (e.g., zinc-tin-aluminum-beryllium oxide) to further adjust the performance of the low-e panel 100.
The first seed layer 110 is formed above the first base layer 108. The first seed layer 110 may be made of a metal oxide and may have a thickness of, for example, between about 2 nm and about 12 nm, such as about 4 nm. In some embodiments, the first seed layer includes zinc, and the metal oxide used in the first seed layer 110 is zinc oxide. Other exemplary materials that may be used in the first seed layer 110 include tin oxide, scandium oxide, yttrium oxide, titanium oxide, zirconium oxide, hafnium oxide, vanadium oxide, niobium oxide, tantalum oxide, chromium oxide, tungsten oxide, molybdenum oxide, and combinations thereof. The first seed layer 110 may be used to enhance the deposition/growth of the first reflective layer 112 in the low-e stack 104 (e.g., enhance the crystalline structure and/or texturing of the first reflective layer 112) and increase the transmission of the low-e stack 104 for anti-reflection purposes.
The first reflective layer 112 is formed above the first seed layer 110. In some embodiments, the first reflective layer 112 is made of silver and has a thickness of, for example, between about 6 nm and about 18 nm, such as about 11.4 nm. In some embodiments, the first reflective layer 112 includes (or is made of) copper and/or gold. As is commonly understood, the first reflective layer 112 is used to reflect infra-red electro-magnetic radiation, thus reducing the amount of heat that may be transferred through the low-e panel 100.
The first barrier layer 114 is formed above the first reflective layer 112. The first barrier layer 114 may include, for example, nickel, titanium, niobium, or a combination thereof. For example, in some embodiments, the first barrier layer 114 is made of nickel-titanium-niobium, or nickel-titanium-niobium oxide. Other exemplary materials which may be used in the first barrier layer 114 include various metals and alloys (and/or oxides thereof), such as nickel-chromium, titanium, titanium-aluminum, and combinations thereof. The first barrier layer 114 may have a thickness of, for example, between about 2 nm and about 6 nm, such as about 2.5 nm. The first barrier layer 114 is used, for example, to protect the first reflective layer 112 from the processing steps used to form the subsequent layers of the low-e stack 104 and to prevent any interaction of the material of the first reflective layer 112 with the materials of the other layers of the low-e stack 104, which may result in undesirable optical characteristics of the low-e panel 100, such as poor color performance.
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The second seed layer 118 is formed above the second base layer 116. The second seed layer 118 may be made of the same material(s), have a similar thickness, and serve the same purpose as the first seed layer 110, as described above. The second reflective layer 120 is formed above the second seed layer 118. The second reflective layer 120 may be made of the same material(s) and serve the same purpose as the first reflective layer 110, as described above. The second reflective layer 120 may have a thickness of, for example, between about 6 nm and about 18 nm, such as about 14.4 nm.
The second barrier layer 122 is formed above the second reflective layer 120. The second barrier layer 122 may be made of the same material(s), have a similar thickness (e.g., about 2 nm), and serve the same purpose as the first barrier layer 114, as described above.
The over-coating layer 124 is formed above the second barrier layer 122. The over-coating layer 124 may be made of the same material(s) (e.g., a dielectric material) as the first base layer 108 and the second base layer 116 (e.g., zinc-tin-aluminum oxide). In some embodiments, the over-coating layer 124 has a thickness of, for example, between about 3 nm and about 30 nm, such as about 9 nm.
In some embodiments, the first base layer 108 has a thickness that is at least twice (i.e., 2×) the thickness of the over-coating layer 124. In some embodiments, the first base layer 108 has a thickness that is at least four time (i.e., 4×) the thickness of the over-coating layer 124. In some embodiments, the second base layer 116 has a thickness that is at least five times (i.e., 5×) the thickness of the over-coating layer 124. In some embodiments, the second base layer 116 has a thickness that is at least seven times (i.e., 7×) the thickness of the over-coating layer 124.
The over-coating layer 124 may be used to further tune the optical properties of the low-e panel 100 as a whole. Additionally, in some embodiments, the over-coating layer 124 may enhance the light-to-solar gain (LSG) ratio of the low-e panel 100.
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After the formation of the second protective layer 126, the low-e panel 100 may undergo a heat treatment to, for example, temper the glass within the transparent substrate 102. For example, the low-e panel 100 may be heated to a temperature of between about 600° C. and about 700° C. for about 30 minutes.
One skilled in the art will appreciate that the embodiment(s) depicted in
It should be noted that depending on the materials used, some of the layers of the low-e stack 104 may have some materials in common. For example, in some embodiments, the base layers 108 and 116 and the over-coating layer 124 may be made of the same material (e.g., zinc-tin-aluminum oxide).
It should also be understood that the low-e panel 100 may be a portion of (or installed in) a larger, more complex device or system, such as a low-e window. Such a window may include multiple glass substrates (or panes), other coatings (or layers), such a thermochromic coating formed on a different pane than the low-e stack, and various barrier or spacer layers formed between adjacent panes.
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Other characteristics of the low-e panels described herein are shown in the tables depicted in
The various characteristics listed in
The color characteristics are measured and reported herein using the CIE LAB a*, b* coordinates and scale (i.e. the CIE a*b* diagram, Ill. CIE-C, 2 degree observer). In the CIE LAB color system, the “L*” value indicates the lightness of the color, the “a*” value indicates the position between magenta and green (more negative values indicate stronger green and more positive values indicate stronger magenta), and the “b*” value indicates the position between yellow and blue (more negative values indicate stronger blue and more positive values indicate stronger yellow).
Emissivity (E) is a characteristic of both absorption and reflectance of light at given wavelengths. It can usually represented as a complement of the reflectance by the film side, (e.g., E=1−Rf). For architectural purposes, emissivity values can be important in the far range of the infrared spectrum, (e.g., about 2,500-40,000 nm). Thus, the emissivity value reported here includes normal emissivity (En), as measured in the far range of the infrared spectrum. Haze is a percentage of light that deviates from the incident beam greater than 2.5 degrees on the average.
Data are also shown for the difference between heat treated and as-coated low-e panels. The value ΔE* (and Δa*, Δb*, ΔY) are important in determining whether or not upon heat treatment (HT) there is matchability, or substantial matchability, of the coated panels. For purposes of example, the term Δa*, for example, is indicative of how much color value a* changes due to heat treatment. Also, ΔE* is indicative of the change in reflectance and/or transmittance (including color appearance) in a coated panel after a heat treatment. ΔE* corresponds to the CIELAB Scale L*, a*, b*, and measures color properties before heat treatment (L0*, a0*, b0*) and color properties after heat treatment (L1*, a1*, b1*):
ΔE*=√{square root over ((ΔL*)2+(Δa*)2+(Δb*)2)}{square root over ((ΔL*)2+(Δa*)2+(Δb*)2)}{square root over ((ΔL*)2+(Δa*)2+(Δb*)2)}
where ΔL*=L1*−L0*, Δa*=a1*−a0*, and Δb*=b1*−b0*.
The color change of glass side reflection can be calculated as Rg ΔE*. The color change of light transmission can be calculated as T ΔE*, T|Δa*| and T|Δb*|. The luminance change of light transmission can be calculated as T ΔY.
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As an additional benefit, many of the layers in the low-e stacks described herein utilize materials used in the other layers (e.g., zinc, tin, aluminum, etc). As a result, the total number of targets required to form the low-e stack 104 may be minimized, which reduces manufacturing costs.
The housing 602 includes a gas inlet 612 and a gas outlet 614 near a lower region thereof on opposing sides of the substrate support 606. The substrate support 606 is positioned near the lower region of the housing 602 and in configured to support a substrate 616. The substrate 616 may be a round substrate having a diameter of, for example, about 200 mm or about 300 mm. In other embodiments (such as in a manufacturing environment), the substrate 616 may have other shapes, such as square or rectangular, and may be significantly larger (e.g., about 0.5 m to about 4 m across). The substrate support 606 includes a support electrode 618 and is held at ground potential during processing, as indicated.
The first and second target assemblies (or process heads) 608 and 610 are suspended from an upper region of the housing 602 within the processing chamber 604. The first target assembly 608 includes a first target 620 and a first target electrode 622, and the second target assembly 610 includes a second target 624 and a second target electrode 626. As shown, the first target 620 and the second target 624 are oriented or directed towards the substrate 616. As is commonly understood, the first target 620 and the second target 624 include one or more materials that are to be used to deposit a layer of material 628 on the upper surface of the substrate 616.
The materials used in the targets 620 and 624 may, for example, include tin, zinc, magnesium, aluminum, lanthanum, yttrium, titanium, antimony, strontium, bismuth, silicon, silver, nickel, chromium, niobium, or any combination thereof (i.e., a single target may be made of an alloy of several metals). Additionally, the materials used in the targets may include oxygen, nitrogen, or a combination of oxygen and nitrogen in order to form oxides, nitrides, and oxynitrides. Additionally, although only two targets 620 and 624 are shown, additional targets may be used.
The PVD tool 600 also includes a first power supply 630 coupled to the first target electrode 622 and a second power supply 632 coupled to the second target electrode 624. As is commonly understood, in some embodiments, the power supplies 630 and 632 pulse direct current (DC) power to the respective electrodes, causing material to be, at least in some embodiments, simultaneously sputtered (i.e., co-sputtered) from the first and second targets 620 and 624. In some embodiments, the power is alternating current (AC) to assist in directing the ejected material towards the substrate 616.
During sputtering, inert gases (or a plasma species), such as argon or krypton, may be introduced into the processing chamber 604 through the gas inlet 612, while a vacuum is applied to the gas outlet 614. The inert gas(es) may be used to impact the targets 620 and 624 and eject material therefrom, as is commonly understood. In embodiments in which reactive sputtering is used, reactive gases, such as oxygen and/or nitrogen, may also be introduced, which interact with particles ejected from the targets (i.e., to form oxides, nitrides, and/or oxynitrides).
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Although the PVD tool 600 shown in
At block 704, a first dielectric layer is formed above the transparent substrate. In some embodiments, the first dielectric layer includes zinc, tin, and aluminum. The first dielectric layer may be made of zinc-tin-aluminum oxide. At block 706, a first reflective layer is formed above the first dielectric layer. In some embodiments, the reflective layer is made of silver.
At block 708, a second dielectric layer is formed above the first reflective layer. In some embodiments, the second dielectric layer is made of the same material as the first dielectric layer (e.g., zinc-tin-aluminum oxide). At block 710, a second reflective layer is formed above the second dielectric layer.
Although not shown, the method 700 may include forming additional layers above the transparent substrate, such as those described above (e.g., seed layers, barrier layers, etc.). The method 700 may also include heating the transparent substrate and the layers formed above (e.g., to temper the glass substrate). At block 712, the method 700 ends.
Thus, in some embodiments, methods for forming a low-e panel are provided. A transparent substrate is provided. A first dielectric layer is formed above the transparent substrate. The first dielectric layer includes zinc, tin, and aluminum. A first reflective layer is formed above the first dielectric layer. A second dielectric layer is formed above the first reflective layer. The second dielectric layer includes zinc, tin, and aluminum. A second reflective layer is formed above the second dielectric layer.
In some embodiments, methods for forming a low-e panel are provided. A transparent substrate is provided. A first dielectric layer is formed above the transparent substrate. The first dielectric layer includes zinc-tin-aluminum oxide. A first seed layer is formed above the first dielectric layer. The first seed layer includes zinc. A first reflective layer is formed above the first seed layer. A second dielectric layer is formed above the first reflective layer. The second dielectric layer includes zinc-tin-aluminum oxide. A second seed layer is formed above the second dielectric layer. The second seed layer includes zinc. A second reflective layer is formed above the second seed layer.
In some embodiments, low-e panels are provided. The low-e panels include a transparent substrate. A first dielectric layer is formed above the transparent substrate. The first dielectric layer includes zinc, tin, and aluminum. A first reflective layer is formed above the dielectric layer. A second dielectric layer is formed above the above the first reflective layer. The second dielectric layer includes zinc, tin, and aluminum. A second reflective layer is formed above the second dielectric layer.
In some embodiments, methods for forming a low-e panel are provided. A transparent substrate is provided. A first dielectric layer is formed above the transparent substrate. The first dielectric layer includes zinc, tin, and aluminum. A first seed layer is formed above the first dielectric layer. The first seed layer includes zinc. A first reflective layer is formed above the first seed layer. A first barrier layer is formed above the first reflective layer. The first barrier layer includes nickel, titanium, and niobium. A second dielectric layer is formed above the first barrier layer. The second dielectric layer includes zinc, tin, and aluminum. A second seed layer is formed above the second dielectric layer. The second seed layer includes zinc. A second reflective layer is formed above the second seed layer. A thickness of the second dielectric layer is at least twice a thickness of the first dielectric layer.
In some embodiments, methods for forming a low-e panel are provided. A transparent substrate is provided. A first dielectric layer is formed above the transparent substrate. The first dielectric layer includes zinc, tin, and aluminum. A first seed layer is formed above the first dielectric layer. The first seed layer includes zinc. A first reflective layer is formed above the first seed layer. A first barrier layer is formed above the first reflective layer. The first barrier layer includes nickel, titanium, and niobium. A second dielectric layer is formed above the first barrier layer. The second dielectric layer includes zinc, tin, and aluminum. A second seed layer is formed above the second dielectric layer. The second seed layer includes zinc. A second reflective layer is formed above the second seed layer. A third dielectric layer is formed above the second reflective layer. The third dielectric layer includes zinc, tin, and aluminum. A thickness of the second dielectric layer is at least twice a thickness of the first dielectric layer and a thickness of the third dielectric layer.
In some embodiments, low-e panels are provided. The low-e panels include a transparent substrate. A first dielectric layer is formed above the transparent substrate. The first dielectric layer includes zinc, tin, and aluminum. A first seed layer is formed above the first dielectric layer. The first seed layer includes zinc. A first reflective layer is formed above the first seed layer. A first barrier layer is formed above the first reflective layer. The first barrier layer includes nickel, titanium, and niobium. A second dielectric layer is formed above the first barrier layer. The second dielectric layer includes zinc, tin, and aluminum. A second seed layer is formed above the second dielectric layer. The second seed layer includes zinc. A second reflective layer is formed above the second seed layer. A thickness of the second dielectric layer is at least twice a thickness of the first dielectric layer.
Although the foregoing examples have been described in some detail for purposes of clarity of understanding, the invention is not limited to the details provided. There are many alternative ways of implementing the invention. The disclosed examples are illustrative and not restrictive.
