Patent Application
20250184188
The present disclosure relates generally to pre-amplifier circuits, and more particularly to low power Direct Current (DC) to Alternating Current (AC) pre-amplifier circuits for high-speed link receivers that enable AC-coupled transmission without additional power consumption.
Conventionally, a receiver may receive data in two modes, including a DC-coupled mode and an AC-coupled mode. In the DC-coupled mode, a common mode level VCM-TX of signals transmitted by a transmitter must be aligned with a common mode level VCM-RX of the receiver. In the AC-coupled mode, the common mode level VCM-TX of signals transmitted by the transmitter is not necessarily aligned with the common mode level VCM-RX of the receiver, which requires use of additional circuitry that consumes additional power. More particularly, in conventional on-chip DC-AC coupling schemes, a switchable internal common mode generation circuit must be added to provide AC-coupled data transmission along with DC coupled data transmission. For example, the common mode generation circuit includes resistors and a level shifter. Addition of the common mode generation circuit results in additional power consumption overhead when a link is operating in an AC-coupled mode.
According to the present disclosure, a DC-AC pre-amplifier circuit for a high-speed link receiver does not include an input common mode generation circuit that is required by convention receivers, which results in reduced power consumption during AC-coupled transmission compared to convention receivers. To enable reduced power consumption, a DC-AC pre-amplifier circuit according to the present disclosure uses an internal common mode signal to generate an input common mode signal while a high-speed link receiver to which the DC-AC pre-amplifier circuit is electrically coupled is operating in the AC-coupled mode. Thus, no additional current is consumed while the receiver is operating in the AC-coupled mode.
A receiver according to the present disclosure may be characterized as including a pre-amplifier circuit, and an amplifier circuit which, in operation, generates an amplified signal based on output signals provided by the pre-amplifier circuit. The pre-amplifier circuit includes: a first output terminal and a second output terminal that, in operation, provide the output signals to the amplifier circuit; a first input terminal; a second input terminal; a first resistor having a first terminal electrically coupled to the first input terminal, and a second terminal electrically coupled to a first node; a second resistor having a first terminal electrically coupled to the second input terminal, and a second terminal electrically coupled to the first node; a third resistor having a first terminal electrically coupled to the first output terminal, and a second terminal electrically coupled to a second node; a fourth resistor having a first terminal electrically coupled to the second output terminal, and a second terminal electrically coupled to the second node; and a switch having a first terminal electrically coupled to the first node, and a second terminal electrically coupled to the second node.
The pre-amplifier circuit may operate in a direct current coupling mode while the switch is in a non-conductive state, and may operate in an alternating current coupling mode while the switch is in a conductive state.
An average of a voltage at the first output terminal and a voltage at the second output terminal may be provided to the first node while the switch is in a conductive state, and the average of the voltage at the first output terminal and the voltage at the second output terminal may not be provided to the first node while the switch is in a non-conductive state.
A resistance of the first resistor may be equal to a resistance of the second resistor, and a resistance of the third resistor may be equal to a resistance of the fourth resistor.
The pre-amplifier circuit may further include: a fifth resistor having a first terminal electrically coupled to a power supply voltage, and a second terminal electrically coupled to the second output terminal; a sixth resistor having a first terminal electrically coupled to the power supply voltage, and a second terminal electrically coupled to the first output terminal; a first transistor having a first terminal electrically coupled to the second input terminal, a second terminal electrically coupled to the first output terminal, and a third terminal; a second transistor having a first terminal electrically coupled to the first input terminal, a second terminal electrically coupled to the second output terminal, a third terminal electrically coupled to the third terminal of the first transistor; and a third transistor having a first terminal electrically coupled to a bias voltage potential, a second terminal electrically coupled to the third terminal of the first transistor and the third terminal of the second transistor, and a third terminal electrically coupled a ground potential. A resistance of the first resistor may be equal to a resistance of the second resistor, a resistance of the third resistor may be equal to a resistance of the fourth resistor, and a resistance of the fifth resistor may be equal to a resistance of the sixth resistor.
A pre-amplifier circuit according to the present disclosure may be characterized as including: a first input terminal; a second input terminal; a first output terminal; a second output terminal; a first resistor having a first terminal electrically coupled to the first input terminal, and a second terminal electrically coupled to a first node; a second resistor having a first terminal electrically coupled to the second input terminal, and a second terminal electrically coupled to the first node; a first transistor having a first terminal electrically coupled to the second input terminal, a second terminal electrically coupled to the first output terminal, and a third terminal; a second transistor having a first terminal electrically coupled to the first input terminal, a second terminal electrically coupled to the second output terminal, a third terminal electrically coupled to the third terminal of the first transistor; a third resistor having a first terminal electrically coupled to a power supply voltage, and a second terminal electrically coupled to the second output terminal; a fourth resistor having a first terminal electrically coupled to the power supply voltage, and a second terminal electrically coupled to the first output terminal; a fifth resistor having a first terminal electrically coupled to the second output terminal, and a second terminal electrically coupled to a second node; a sixth resistor having a first terminal electrically coupled to the first output terminal, and a second terminal electrically coupled to the second node; and a switch having a first terminal electrically coupled to the first node, and a second terminal electrically coupled to the second node.
Each of the first terminal of the first transistor and the first terminal of the second transistor may be a gate terminal, each of the second terminal of the first transistor and the second terminal of the second transistor may be a drain terminal, and each of the third terminal of the first transistor and the third terminal of the second transistor may be a source terminal.
The pre-amplifier circuit may further include: a third transistor having a first terminal electrically coupled to a bias voltage potential, a second terminal electrically coupled to the third terminal of the first transistor and the third terminal of the second transistor, and a third terminal electrically coupled a ground potential. Each of the first terminal of the first transistor, the first terminal of the second transistor, and the first terminal of the third transistor may be a gate terminal, each of the second terminal of the first transistor, the second terminal of the second transistor, and the second terminal of the third transistor may be a drain terminal, and each of the third terminal of the first transistor, the third terminal of the second transistor, and the third terminal of the third transistor may be a source terminal.
The pre-amplifier circuit may operate in a direct current coupling mode while the switch is in a non-conductive state, and may operate in an alternating current coupling mode while the switch is in a conductive state.
An average of a voltage at the first output terminal and a voltage at the second output terminal may be provided to the first node while the switch is in a conductive state, and the average of the voltage at the first output terminal and the voltage at the second output terminal may not be provided to the first node while the switch is in a non-conductive state.
The pre-amplifier circuit may further include: a first capacitor coupled to the first input terminal; and a second capacitor coupled to the second input terminal. The first capacitor and the second capacitor, in operation, may block direct current signals from entering the first input terminal and the second input terminal.
A resistance of the first resistor may be equal to a resistance of the second resistor, a resistance of the third resistor is equal to a resistance of the fourth resistor, and a resistance of the fifth resistor is equal to a resistance of the sixth resistor.
A method of operating a receiver, which includes a pre-amplifier circuit and an amplifier circuit, according to the present disclosure may be characterized as including: electrically coupling a first output terminal of the pre-amplifier circuit to the amplifier circuit; electrically coupling a second output terminal of the pre-amplifier circuit to the amplifier circuit; electrically coupling a first terminal of a first resistor to a first input terminal of the pre-amplifier circuit; electrically coupling a second terminal of the first resistor to a first node of the pre-amplifier circuit; electrically coupling a first terminal of a second resistor to a second input terminal of the pre-amplifier circuit; electrically coupling a second terminal of the second resistor to the first node of the pre-amplifier circuit; electrically coupling a first terminal of a third resistor to the first output terminal of the pre-amplifier circuit; electrically coupling a second terminal of the third resistor to a second node of the pre-amplifier circuit; electrically coupling a first terminal of a fourth resistor to the second output terminal of the pre-amplifier circuit; electrically coupling a second terminal of the fourth resistor to the second node of the pre-amplifier circuit; electrically coupling a first terminal of a switch to the first node of the pre-amplifier circuit; electrically coupling a second terminal of the switch to the second node of the pre-amplifier circuit.
The method may further include: operating the pre-amplifier circuit in a direct current coupling mode while the switch is in a non-conductive state, and operating the pre-amplifier circuit in an alternating current coupling mode while the switch is in a conductive state.
The method may further include: providing an average of a voltage at the first output terminal and a voltage at the second output terminal to the first node while the switch is in a conductive state. The average of the voltage at the first output terminal and the voltage at the second output terminal may not be provided to the first node while the switch is in a non-conductive state.
A resistance of the first resistor may be equal to a resistance of the second resistor, and a resistance of the third resistor may be equal to a resistance of the fourth resistor.
The method may further include: electrically coupling a first terminal of a fifth resistor to a power supply voltage; electrically coupling a second terminal of a fifth resistor to the second output terminal; electrically coupling a first terminal of a sixth resistor to the power supply voltage; electrically coupling a second terminal of the sixth resistor to the first output terminal; electrically coupling a first terminal of a first transistor to the second input terminal; electrically coupling a second terminal of the first transistor to the first output terminal; electrically coupling a first terminal of a second transistor to the first input terminal; electrically coupling a second terminal of the second transistor to the second output terminal; electrically coupling a third terminal of the second transistor to a third terminal of the first transistor; electrically coupling a first terminal of a third transistor to a bias voltage potential; electrically coupling a second terminal of the third transistor to the third terminal of the first transistor and the third terminal of the second transistor; and electrically coupling a third terminal of the third transistor to a ground potential.
Non-limiting and non-exhaustive embodiments are described with reference to the following drawings. In the drawings, like reference numerals refer to like parts throughout the various figures unless otherwise specified.
For a better understanding of the present disclosure, reference will be made to the following Detailed Description, which is to be read in association with the accompanying drawings:
According to the present disclosure, an output common mode signal from a pre-amplifier stage of a receiver (e.g., high-speed link receiver) is used to provide an input common mode signal for input data when the receiver operates in an AC-coupling mode. Thus, receivers according to the present disclosure do not consume additional current while operating in the AC-coupling mode.
The pre-amplifier circuit 102 includes an input terminal I1 and an input terminal I2 through which the pre-amplifier circuit 102 receives signals transmitted by a transmitter (not illustrated). The input terminal I1 is a positive data input terminal, and the input terminal I2 is a negative data input terminal. The pre-amplifier circuit 102 also includes an output terminal O1 and an output terminal O2 through which the pre-amplifier circuit 102 provides signals to the amplifier circuit 104.
In addition, the pre-amplifier circuit 102 includes a transistor T1, a transistor T2, and a transistor T3. In one or more implementations, each of the transistors T1, T2, and T3 is an N-channel metal-oxide-semiconductor field-effect transistor (MOSFET) that includes a gate terminal, a drain terminal, a source terminal, and a body terminal.
More particularly, the gate terminal of the transistor T1 is electrically coupled to the input terminal I2, the drain terminal of the transistor T1 is electrically coupled to the output terminal O1, and the source terminal of the transistor T1 is electrically coupled to the source terminal of the transistor T2. The gate terminal of the transistor T2 is electrically coupled to the input terminal I1, the drain terminal of the transistor T2 is electrically coupled to the output terminal O2, and the source terminal of the transistor T2 is electrically coupled to the source terminal of the transistor T1. The gate terminal of the transistor T3 is electrically coupled to a bias voltage potential VG, the drain terminal of the transistor T3 is electrically coupled to the source terminal of the transistor T1 and the source terminal of the transistor T2, and the source terminal of the transistor T3 is electrically coupled to a ground potential. Additionally, the body terminals of the transistors T1, T2, and T3 are electrically connected to the ground potential.
The pre-amplifier circuit 102 also includes a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, and a resistor R6. Each of the resistors R1, R2, R3, R4, R5, and R6 includes a first terminal and second terminal. More particularly, the first terminal of the resistor R1 is electrically coupled to the input terminal I1, and the second terminal of the R1 is electrically coupled to a node N1. The first terminal of the resistor R2 is electrically coupled to the input terminal I2, and the second terminal of the resistor R2 is electrically coupled to the node N1. The first terminal of the resistor R3 is electrically coupled to a power supply voltage Vsupply, and the second terminal of the resistor R3 is electrically coupled to the output terminal O2. The first terminal of the resistor R4 is electrically coupled to the power supply voltage Vsupply, and the second terminal of the resistor R4 is electrically coupled to the output terminal O1. The first terminal of the resistor R5 is electrically coupled to the output terminal O2, and the second terminal of the resistor R5 is electrically coupled to a node N2. The first terminal of the resistor R6 is electrically coupled to the output terminal O1, and the second terminal of the resistor R6 is electrically coupled to the node N2.
In one embodiment, each of the resistors R1 and R2 is a 50 Ohm resistor. Each of the resistors R3 and R4 is a 1 KOhm resistor. Each of the resistors R5 and R6 is 10 KOhm resistor. Also, the supply voltage Vsupply is 1.8 Volts.
Additionally, the pre-amplifier circuit 102 includes a switch S including a first terminal, a second terminal, and a third terminal through which the switch S receives a control signal Biasselect from control circuitry (not illustrated). The first terminal of the switch S is electrically coupled to the node N1, and the second terminal of the switch S is electrically coupled to the second node N2. While the control signal Biasselect has a first characteristic (e.g., voltage level), the switch S is in a conductive state in which the first terminal is electrically coupled to the second terminal. While the control signal Biasselect has a second characteristic (e.g., voltage level), the switch S is in a nonconductive state in which the first terminal is not electrically coupled to the second terminal. While the switch S is in the non-conductive state, the pre-amplifier circuit operates 102 in a DC-coupling mode in which DC signals are not blocked from entering the pre-amplifier circuit 102 through the input terminal I1 and the input terminal I2, as will be explained with reference to
The various embodiments described above can be combined to provide further embodiments. Aspects of the embodiments can be modified, if necessary to employ concepts of the various patents, applications and publications to provide yet further embodiments.
These and other changes can be made to the embodiments in light of the above-detailed description. In general, in the following claims, the terms used should not be construed to limit the claims to the specific embodiments disclosed in the specification and the claims, but should be construed to include all possible embodiments along with the full scope of equivalents to which such claims are entitled. Accordingly, the claims are not limited by the disclosure.
| Number | Date | Country | |
|---|---|---|---|
| 63605946 | Dec 2023 | US |
